JPS6360611A - Differential input/differential output type amplifier - Google Patents

Abstract

PURPOSE:To provide the same gain as that of a conventional circuit and to increase the input impedance by combining an input stage receiving directly a differential input and two current mirror circuits so as to form the titled circuit. CONSTITUTION:Differential inputs V1, V2 from input terminals 11, 12 are fed directly to each gate of FETs T3, T4. The input stage FETs T3, T4 are connected respectively to current mirror circuits comprising FETs T1, T5 and FETs T2, T6 respectively. Then the differential outputs V01, V02 are extracted from between the two current mirror circuits. Let the differential input be (V1-V2) and the gain be R2/R1, then the dfferential output (V01-V02) is expressed as (R2/R1)(V1-V2) and the gain R2/R1 is the same as that of a conventional circuit. Since the differential input is directly fed to the input stage FET, the input impedance is increased.

Description

[Detailed Description of the Invention] [Summary] The present invention solves the problem of conventional differential input differential output amplifiers where system stability deteriorates when the input impedance is set high. It is directly supplied to the gates of two manual stage FETs, and the 2f
By configuring the differential output from between them through a current mirror circuit of I, a circuit with the same gain 1q as the conventional one, high input impedance, and good system stability can be obtained. This is how it was done.

[Industrial application field]

The present invention relates to a differential input differential output type amplifier.

In particular, in a differential input differential output type amplifier for small signals, it is important that the input impedance is high, and such an amplifier is needed.

[Conventional technology]

FIG. 6 shows an example of a conventional differential amplifier. Input side child 11
．． The difference between the input voltages V+ and I2 applied to the terminal 12 is taken out as the output voltage Vo at the output terminal 2. The profit 1q of this circuit is as follows, and the output voltage Vo is as follows. Further, if the change in input voltage v1 is ΔVI, and the change in input current 11 is Δr1, then the input impedance Z of this circuit is: [Problem to be solved by the invention] The above conventional circuit has a gain of R2/R1. The resistance R to obtain
1 is directly connected to the input terminal 11.12, and as a result, there is a DC path and current 11.12 flows, resulting in a relatively low input impedance Z.

Also, if you try to increase the input impedance Z while keeping the gain (q) constant, you will inevitably have to increase the values of the resistors R1 and R2, and if you do this, the stability will deteriorate due to the parasitic capacitance of the resistor R2. There was a problem.

[Means for solving problems]

As shown in FIG. 1, the differential input differential output type amplifier according to the present invention has differential inputs (VI, VI,
Two input stage FETs (Ts, I4) are supplied with I2) directly to their respective gates, and an input stage FET (Ts,
A resistor (R+
) and an input stage FET (Ts, T
a) on the respective drains (T+, Ts
, I2, 76) are connected to second constant current sources (I4, 76) with the same current value, respectively.
) is connected to another FET (T+, Ts, and
The output side current circuit has two resistors (R2) of the same resistance value connected in series between the connection point between I2, Ts) and the second constant current source (I4), and the above-mentioned difference in the output side current circuit. Output terminals (21°) from which differential outputs (Vo + , Vo 2 ) are taken out from respective connection points of FET (T+, Ts, and I2.Ta) and the second constant current 11u (Ia). 22).

[Effect]

If the differential input is (VI I2) and the gain is R2/R1, the differential output (V01 V02) is (R2/R1>
・(VI −I2), and the gain R is the same as the conventional circuit.
2/R1, and the differential input is directly connected to the two input stages F.
A differential input differential output type amplifier with high input impedance can be obtained from the supply to ET Ts and I4.

〔Example〕

FIG. 1 shows the first differential input differential output amplifier according to the present invention.
A circuit diagram of an example is shown. In the same figure, the inlet j terminal 11
, 1ztL are directly connected to the gates of MOSFETs T3 and I4, respectively, and the sources of FETs T3 and Ta are commonly connected to constant current source 4 via a resistor R1, and their drains are connected to the drains and gates of MOSFETs T+ and I2. It is connected to the. FET T+, I2
The source of is connected to the power supply, and its train and gate are connected to the gates of MOSFETs Ts, Ts (7). A first current mirror circuit is formed by FET Ta and Ts, and FET T2. A second current mirror circuit is configured at T6.

The sources of the FETs Ts and Ts are connected to the power supply, and the drains thereof are connected to the output terminals 2+ and 22, respectively, and to the constant current source I4. FET
Two resistors R2 are connected in series between the drains of Ts and Ts.

Here, the current amplification factors of FETs Ta, T2, Ts, and Ts are respectively βT1. βT2. βT5. βT6,
Let the mutual conductance of FET T3 and Ta be q
, qIl1, then when the condition T3 is satisfied, the output differential gain is R2/R+
The differential output (Vo + Vo 2 ) is as follows. This will be explained below.

Now, VI = V2 (7) At steady state (7) FET T
Assuming that the source potential of FET T3 is V3A, and the potential of the connection point between constant current source 3 and resistor R1 is VA, if the input terminal 11 fluctuates as shown in VI V2 = Δv1, the source potential of FET T3 will be V3A + Δv1. 1, and the potential at which connection point between constant current source I3 and resistor R+ becomes. This allows the FE
The current flowing through the resistor R1 on the T T3 side is as follows, and the current flowing through the resistor R1 on the FET TA side is as follows. Here, VA A is the source potential of FET Ts.

Therefore, the amount of change in the current flowing through the resistor R+ on the FET Tf side is Δv1 2R+, and the amount of change in the current flowing through the resistor R1 on the FET T4 side is - ΔV1 2R+. The current change amount V+/2R+ flows as a current mirror through FET Ta to t=ET 5, while the current change amount -(ΔV+/2R+) flows as a current mirror through FET T2 to FET Ts. In this case, the current change ΔV1/2R1 flows through the two resistors R2 to the constant current source I4 on the right, and a voltage is generated across the two resistors R2, which is applied to the output terminal 2+
, 22 and a differential output (Vo + Vo
2).

On the other hand, the above conditions, Then, the differential output (Vo + - V02) becomes.

As described above, the differential input differential output type amplifier of the present invention has the gates of MO8FETs T3 and T4 directly connected to the input terminals 11 and 12, so the input impedance is lower than that of the conventional circuit shown in FIG. Is it expensive? (There is no DC path), in this case it has the same gain R2/R+ as the conventional circuit.

Next, FET Ta, Ts or FET
The current mirror circuit is turned off by T2 and Ts! ￥Let's think about electricity. The current mirror circuit of the circuit shown in FIG. 1 is schematically shown in FIG. 2. In the figure, an input current 1 flows through an input transistor Q1, while an output current 2 proportional to the input current 11 flows through an output transistor Q2.

Here, the current amplification factors of transistors Q+ and Q2 are respectively β1. Assuming β2, the output side current I2 is l2-(β2
/β1)■1 (1). Here, if the minute change or real signal component of the input side current 1+ is ΔII, and the DC component (constant) of the input side current 11 is II oc, then the input side current 11 is It = lI DC + Δ11 ■, and the equation (1) , from equation 2, the output side current 12 is l2 = (β2
/β1)・(IIDc+Δ11)■.

By the way, in the present invention, due to the circuit configuration, it is not desirable to extract the DC component of the input side current 11 into the output side current I2. In other words, we primarily want to obtain (β2/β1)·Δ11. In such a case, the term (β2/β1)・IIoc in the above equation 0 is redundant, and the output side current I2 contains this (β2/βI)・IIoc.
A relatively large current called oc flows, causing the inconvenience that the amount of power consumed increases by that amount.

FIG. 3 shows a circuit diagram of a second embodiment of the differential input differential output type amplifier according to the present invention, which eliminates the above-mentioned disadvantages.
Components that are the same as those in FIG. 1 are given the same numbers and symbols.

In the same figure, MO3FET T+' is FET T+
is connected in parallel with MOSFET T2'
is connected in parallel with FET T2. FET
The gates of T+' and T2' are commonly connected to the DC bias terminal 3. In other words, FET T+,
T+', first current mirror circuit at Ts, FE
T T2,, T2'.

A second current mirror circuit is configured at T6.

Now, a schematic diagram of one current mirror circuit is shown in FIG. 4, and a diagram of its principle is shown in FIG.

In FIG. 5, the input current 11 flows as a constant current In to a constant current giA, and also flows as a current 112 through the input transistor Q1. As described above, since the constant current source A is provided, the DC component of the input side current 11 is reduced by the constant current 1 ++ flowing through the constant current source A. Therefore, from the above formula 0, the output side current 12 is: 12 = (β2/β+) ((Itoc-In > 10Δ1
1)), and the power consumption can be reduced by (β2/β1)·111 compared to the circuit shown in the second diagram.

Similarly, in FIG. 4, input current I+ flows through transistor Q3 as current In and through input transistor Q1 as current r12. In this case, the drain saturation region (5
If the slope Ros of the drain-source voltage versus drain-source current characteristic in the
u can be set to any size. Therefore, in the above formula 4), I+oc=h! It is also possible to set the DC component to a completely negligible level.

In this way, the second embodiment shown in the third figure can save more power than the first embodiment shown in the first figure. Since its operation is the same as that in the first embodiment, its explanation will be omitted.

〔Effect of the invention〕

According to the present invention, it is possible to obtain an amplifier that has the same gain as the conventional circuit and has a high input impedance, stabilizes the system 1q compared to the conventional circuit, and furthermore, mainly current mirrors AC signals. This has the advantage of reducing power consumption.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a first embodiment of the present invention, Fig. 2 is a circuit diagram of a general current mirror circuit, Fig. 3 is a circuit diagram of a second embodiment of the present invention, and Fig. 4 is a circuit diagram of a general current mirror circuit. A circuit diagram of a current mirror circuit. FIG. 5 is a principle diagram of a current mirror circuit according to the present invention. FIG. 6 is a conventional circuit diagram. In the figure J3, II and 12 are differential input side terminals, 21.22 are differential output terminals, 3 is DC bias terminal, ■1~Ts, T+', T2' are FETs, R+,
R2 is a resistor, and 13.14 is a constant current source.

Claims (2)

[Claims] (1) The differential inputs (V_1, V_2) coming into the input terminals (1_1, 1_2) are directly supplied to the respective gates.
input stage FETs (T_3, T_4) and the input stage FE
A common first constant current source (I_
3) and another FET (T_1, T_5, and T_2, T_6) at the drain of each of the input stage FETs (T_3, T_4).
A second constant current source (I_4) having the same current value is connected to the other FE through a current mirror circuit composed of
T (T_1, T_5, and T_2, T_6) and the second
An output side current circuit in which two resistors (R_2) having the same resistance value are connected in series between the connection point with the constant current source (I_4), and the above-mentioned other FETs (T_1, T_5) in the output side current circuit , and T_2, T_6) and the second
A differential output (
Output terminal (2_1,
2_2) A differential-input differential-output amplifier comprising: (2) The current mirror circuit has an input side transistor (
Constant current circuits (T_1' and 3) are connected in parallel to T_1 or T_2).
, or T_2' and 3) are connected. The differential input differential output type amplifier according to claim 1, characterized in that the differential input differential output type amplifier is formed by connecting T_2' and 3).