JPS6360517A - Forming method single crystal semiconductor thin film - Google Patents

Forming method single crystal semiconductor thin film

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Publication number
JPS6360517A
JPS6360517A JP20365986A JP20365986A JPS6360517A JP S6360517 A JPS6360517 A JP S6360517A JP 20365986 A JP20365986 A JP 20365986A JP 20365986 A JP20365986 A JP 20365986A JP S6360517 A JPS6360517 A JP S6360517A
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JP
Japan
Prior art keywords
region
high concentration
single crystal
thin film
semiconductor thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP20365986A
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Japanese (ja)
Other versions
JP2505764B2 (en
Inventor
Mitsunori Ketsusako
光紀 蕨迫
Shoji Yadori
章二 宿利
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Hitachi Ltd
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Hitachi Ltd
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Abstract

PURPOSE:To obtain crystal growing means adapted to form a semiconductor element by utilizing the difference of growth rate due to an impurity concentration by providing a high concentration impurity region near a hole including at least part of the hole. CONSTITUTION:A fine high concentration impurity region 26 is formed in an amorphous semiconductor layer 25 over an insulating film 22 from a hole 23. A single crystallization is started from the hole 23, but since the growth rate of the region 26 is high, the crystallization of this region precedes, and a slender single crystal region having the same crystal orientation as a substrate is formed. The crystallization is advanced in two directions from the hole end of the exposed part of the substrate and from the slender region in a region in which an impurity is not doped. In other words, a wide single crystallized region can be obtained in the amount of secondary growth from the region 26. Such a slender high concentration impurity region is formed by a focused ion beam. Thus, a wasteful area for accelerating the crystallization can be eliminated.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は固相成長法によるsQ I(se+n +co
nductorO口1nsulator)構造の形成方
法に関する。さらに詳しくは、半導体素子の高集積化に
好適なSOI傳造の新規な形成方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention provides sQ I (se+n + co
The present invention relates to a method for forming a structure. More specifically, the present invention relates to a novel method for forming SOI fabrication suitable for high integration of semiconductor devices.

〔従来の技術〕[Conventional technology]

絶縁膜上に単結晶半導体薄膜を積層し之いわゆるSOI
 (Semiconductor On In5ula
tor)構造は、従来の半導体装置で逆バイアス状態の
p −n接合でル気的絶縁を実現していた部分を絶縁物
による分離におきかえることができるため、絶縁耐圧の
向上や、また寄生容量の低減による素子の高速化、さら
には素子の積層による回路の三次元化等が可能とな9、
半導体素子に2ける重要な基本構造である。このSOI
構造を実現する方法にはレーザや賦子線などのエネルギ
ビームを用いた溶融・再結晶化による方法や、低温での
非晶質3iからの固相エビタキンヤル成長を利用する方
法などが考案されている。後者は、低温での極めて遅い
結晶化現象を用いているため、SOIの形成速度は1人
/匹程度であるが、溶融状態を通らないため、形成され
る単結晶膜の形状制御性が良く、また不純物拡散が実質
的に起こらないため、高精度のドーパント分布を実現で
きるなど、微細な素子を形成する上で有利な点が多い。
A so-called SOI layered single-crystal semiconductor thin film on an insulating film.
(Semiconductor On In5ula
The tor) structure can replace the conventional semiconductor device's p-n junction in a reverse bias state, which achieves electrical isolation, with isolation by an insulator, improving dielectric strength and reducing parasitic capacitance. It is possible to increase the speed of devices by reducing
This is the second most important basic structure in semiconductor devices. This SOI
Methods to realize this structure include methods using melting and recrystallization using energy beams such as lasers and force beams, and methods using solid-phase Evita kinial growth from amorphous 3i at low temperatures. There is. The latter uses an extremely slow crystallization phenomenon at low temperatures, so the SOI formation rate is about 1 person/individual, but since it does not pass through a molten state, the shape controllability of the formed single crystal film is good. In addition, since impurity diffusion does not substantially occur, highly accurate dopant distribution can be realized, and there are many advantages in forming fine elements.

この固相成長によるSOIの形成には、結晶方位を制御
するために、一定方位に揃った種結晶が必要であり、一
般には第2図に示す如く、半導体基板自体を種結晶とし
ていた。すなわち、第2図(イ)で、単結晶半導体基板
21の上に絶縁膜22が設けられ、その開口部23で基
板に接するように非晶質半導体層24を形成し、絶縁膜
の開口部すなわち、単7清晶半導体基板の露出部を4と
して用いていた。この構造を3iであれば600C前後
に加熱すると、非晶質Siは半結晶基板との接融部23
よシ、単結晶に相転位し、まず第2図げ)に矢印で示す
如く、基板と垂直方向に4祷晶化が進行する。次いで同
図(ロ)に矢印で示す9口く、絶縁膜22に沿って単結
晶化が進行して、絶縁膜上に単結晶化領域25を実現す
ることができる。
Formation of SOI by this solid phase growth requires a seed crystal aligned in a constant direction in order to control the crystal orientation, and generally the semiconductor substrate itself is used as the seed crystal, as shown in FIG. That is, in FIG. 2(A), an insulating film 22 is provided on a single crystal semiconductor substrate 21, an amorphous semiconductor layer 24 is formed so as to be in contact with the substrate at an opening 23 of the insulating film, and the opening of the insulating film is That is, the exposed portion of the AAA crystal semiconductor substrate was used as 4. When this structure is heated to around 600C for 3i, the amorphous Si forms a welded part 23 with the semi-crystalline substrate.
Then, phase transition occurs to a single crystal, and first, as shown by the arrow in Fig. 2, crystallization progresses in the direction perpendicular to the substrate. Next, single crystallization progresses along the insulating film 22 in nine directions indicated by arrows in FIG.

この固相成長シこまって得られる単結晶化領域の広さは
、固相成長の速度と、非晶質半導体層の甲での結晶核発
生速度に依存し、ある温度で結晶核が発生するまでの時
間、その温度での同相成長速度で成長し得る大′き3が
限界となる。通常600C程度のSiの固相成長でFi
4〜5μmであることが却られている。しかし、この成
長距離は不純物の濃度に依存することが矧られ、例えば
第3図に示す9口く、りんを3X102°c!n−3の
1度になるようにイオン打込み等の手段で導入しておく
と、核発生速度は変らずに、成長速度が数倍になるため
に、単結晶成長距離も数倍に拡大することができる。こ
の現象についてはすでに公知である。しかし、このよう
に高濃度の不純物が導入された層はそのま北では半導体
素子を作9込むことはできず、従来は例えば結晶の成長
方向で不純物の導入さ几ていない領域を設けるなどして
、半導体素子の活性頭裁を形成する部分を作るなどの工
夫がなされていた。しかし、この方法では1本質的に不
縄物金ドープしない場合の成長距離以上の大きさでSL
’l領域を形成することはできない。
The size of the single crystallized region obtained by this solid phase growth depends on the rate of solid phase growth and the rate of crystal nucleation in the instep of the amorphous semiconductor layer, and crystal nuclei are generated at a certain temperature. The limit is 3', which can grow at the same phase growth rate at that temperature and time. Fi is usually produced by solid phase growth of Si at about 600C
It is rejected that it is 4 to 5 μm. However, this growth distance is likely to depend on the concentration of impurities; for example, as shown in Fig. 3, the growth distance is 9 x 3 x 102°C! If it is introduced by means such as ion implantation so that the temperature is 1 degree n-3, the growth rate will increase several times, and the single crystal growth distance will also increase several times, without changing the nucleation rate. be able to. This phenomenon is already known. However, it is not possible to fabricate a semiconductor device in a layer into which impurities have been introduced at such a high concentration in the north, and conventional methods have been used, for example, to provide a region in which impurities are not thoroughly introduced in the direction of crystal growth. Therefore, efforts were made to create a portion that would form the active head of a semiconductor device. However, in this method, the SL grows at a size longer than the growth distance when no gold doping is used.
'l region cannot be formed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は、かかる不純物4度による成長速度の差を利用
しつつ、LSIなどの半導体素子を形成するのにより適
した新規な結晶成長手段を提供することを目的とする。
An object of the present invention is to provide a new crystal growth method that is more suitable for forming semiconductor elements such as LSIs while utilizing the difference in growth rate due to the impurity 4 degree.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

本発明は、結晶成長は不純物によって加速されることと
、結晶化の種は小さくても良いという事実に基づいてい
る。
The invention is based on the fact that crystal growth is accelerated by impurities and that the crystallization seeds can be small.

〔作用〕[Effect]

第1図を用いて説明する。まず第1図(イ)のように開
口部23から絶縁膜22上にわたって、非晶質半導体層
24の中に細い高濃度不純物領域26を設ける。単結晶
化は従来法と同じく、開口部23から開始するが、高濃
度不純物領域26の成長速度が速いため、第1図(ロ)
に示すごとく、この領域での結晶化が先行し、基板と同
一の結晶方位をもつ細長い単結晶領域が形成される。不
純物をドープしていない領域では、遅い成長速度で単結
晶化が進行するが、結晶化は基板露出部の開口端からと
、上述の細長い単結晶領域からの2つの方向から進行す
る。すなわち、細い高濃度領域26からの2次的成長の
分だけ広い単結晶化領域を得ることができる。高濃度領
域26は幅を拡くとる必要はなく、単結晶化を先導でき
れば細くてもよく、SOI上に有効に半導体素子を形成
する目的のためには、@い程良い。このような細長い高
濃度不純物領域は公知のリングラフィ及びイオン打込み
によっても形成できるが、集束イオン線を用いればより
容易に形成することができる。
This will be explained using FIG. First, as shown in FIG. 1(a), a thin high concentration impurity region 26 is provided in the amorphous semiconductor layer 24 from the opening 23 to the insulating film 22. Single crystallization starts from the opening 23 as in the conventional method, but since the growth rate of the high concentration impurity region 26 is fast,
As shown in Figure 2, crystallization in this region precedes the formation of an elongated single crystal region having the same crystal orientation as the substrate. In the region not doped with impurities, single crystallization progresses at a slow growth rate, but crystallization progresses from two directions: from the open end of the exposed portion of the substrate and from the above-mentioned elongated single crystal region. That is, it is possible to obtain a single crystallized region that is wider by the amount of secondary growth from the thin high concentration region 26. The high concentration region 26 does not need to be wide, and may be thin as long as it can lead to single crystallization, and for the purpose of effectively forming a semiconductor element on SOI, the more the better. Although such an elongated high concentration impurity region can be formed by known phosphorography and ion implantation, it can be formed more easily by using a focused ion beam.

以上の説明は高濃度領域が単一の場合についてであるが
、複数形成さ几ていても良い。この効果については後述
する。
Although the above explanation is about the case where there is a single high concentration region, a plurality of high concentration regions may be formed. This effect will be discussed later.

〔実施例〕〔Example〕

以下本発明の実施例を示す。 Examples of the present invention will be shown below.

上述の説明に用いた第1図は本発明の一適用例である。FIG. 1 used in the above description is an example of application of the present invention.

基板21にはp杉(100)、10Ω傭のSiを用い、
1000Cの熱酸化で5Qnmの厚さの酸化膜22を形
成し、ホトリングラフィによシ、幅2μmのストライプ
状開口部23を有するパターンを形成し友。次いで、表
面洗浄の後、5X10−’paの超高真空中で8000
,30分の加熱処理の後、基板温度を2000に下げ、
電子ビーム蒸着で0.3μmの非晶質Si膜24を形成
した。真空中で350C,1時間熱処理をした後、空気
中に取出し、ホトレジストを塗布して、上述のストライ
プ状開口部に直交する幅2μmのスリットをエツチング
により形成し、リンをイオン打込みにより60KeVで
2X10”crn−2,130KeVで3X 10 ”
 cm−”打込んで、高濃度領域26を形成した。レジ
スト’2除去した後これを600C,窒素雰囲気で8時
間熱処理したところ、高濃度領域に旧って約20μmの
結晶成長がみられ、高濃度領域の両側に幅2.5μmの
2次的単結晶成長が認められた。また酸化膜のストライ
プ状開口部端からも約5μmの幅で単結晶化が認められ
た。
The substrate 21 is made of pcedar (100) and 10Ω Si.
An oxide film 22 with a thickness of 5 Qnm was formed by thermal oxidation at 1000C, and a pattern having striped openings 23 with a width of 2 μm was formed by photolithography. Then, after surface cleaning, 8000
, After 30 minutes of heat treatment, lower the substrate temperature to 2000℃,
A 0.3 μm amorphous Si film 24 was formed by electron beam evaporation. After heat treatment at 350C in vacuum for 1 hour, it was taken out into the air, photoresist was applied, a slit with a width of 2 μm perpendicular to the above-mentioned striped opening was formed by etching, and 2×10 phosphorus was ion-implanted at 60 KeV. "crn-2, 3X 10 at 130KeV"
cm-" was implanted to form a high-concentration region 26. After removing the resist '2, this was heat-treated at 600C in a nitrogen atmosphere for 8 hours, and crystal growth of approximately 20 μm was observed in the high-concentration region. Secondary single crystal growth with a width of 2.5 μm was observed on both sides of the high concentration region.Single crystal growth was also observed with a width of about 5 μm from the edge of the striped opening of the oxide film.

同様に、0.3μmの非晶質Si層を形成した後、直径
約0.2μmに絞った集束リンイオン線を酸化膜ストラ
イプと直交する方向に走査し、160KeV。
Similarly, after forming an amorphous Si layer of 0.3 μm, a focused phosphorus ion beam focused to a diameter of about 0.2 μm was scanned in a direction perpendicular to the oxide film stripe at 160 KeV.

ラインドーズI X 10” cm−’で、リンイオン
打込みを行い、極細線の高濃度不純物領域26を形成し
た。これを窒素雰囲気で600tll’、8時間熱処理
したところ、リンイオンを走査した線に沿って幅3〜1
0μmの単結晶領域が15μmの長さにわたって得られ
た。
Phosphorus ions were implanted at a line dose of I x 10"cm-' to form a highly concentrated impurity region 26 with an extremely fine line. When this was heat-treated in a nitrogen atmosphere for 600 tll' for 8 hours, phosphorus ions were implanted along the scanned line. width 3~1
A single crystalline region of 0 μm was obtained over a length of 15 μm.

次に、高濃度領域を近接して複数個設けた場合の実施例
について記す。
Next, an example will be described in which a plurality of high concentration regions are provided close to each other.

第4図は、上述と同様に単結晶基板21上にストライプ
状の開口部23を有する酸化膜22を形成し、非晶質8
1層24を形成した構造を示す。
FIG. 4 shows that an oxide film 22 having stripe-shaped openings 23 is formed on a single crystal substrate 21 in the same manner as described above, and an amorphous 8
A structure in which one layer 24 is formed is shown.

上述の例との相違点は、線状に設けた高濃度不純物領域
26.26’が間隔6μmで設けらnていることであり
、ここKはその一部のみを示している。高濃度領域の幅
は狭い方がデバイス形成領域が広くとれるが、一般のホ
トリソグラフィでは1μm程度が限界である。集束イオ
ン線を用いれば、より細い高濃度領域の形成が可能であ
る。第5図は固相成長の様子を示す平面図であり、(イ
)は成長の初期で((ロ)は成長の中期をそれぞれ示す
。非晶質5i24の単結晶化はまず酸化膜開口部で起こ
り、高濃度領域26.26’で(111)ファセットを
形成しながら、単結晶化が独立に開始する。単結晶化が
高濃度領域で進行するにつれ、今度は単結晶化した部分
を種にして、高濃度領域の単結晶化進行方向と直角方向
にノンドープ領域での単結晶化が始まり、やがてこれら
の領域がぶつかり、結晶粒界27が形成される。この結
晶粒界27は小傾角粒界であり、ストライプ状高濃度領
域の間の中央近傍に形成される。このような状態を保ち
つつ結晶化は更に進行し、やがて多結晶核の発生と共に
単結晶領域の拡大は停止する。高濃度領域の間にはほぼ
中央部に小傾角粒界をもつ単結晶が6μm×10μmの
領域で得られる。
The difference from the above example is that linearly provided high concentration impurity regions 26 and 26' are provided at an interval of 6 μm, and K here only shows a part thereof. The narrower the width of the high concentration region, the wider the device formation area, but in general photolithography, the width is about 1 μm. By using a focused ion beam, it is possible to form a narrower high concentration region. Figure 5 is a plan view showing the state of solid phase growth, where (a) shows the early stage of growth and (b) shows the middle stage of growth. Single crystallization begins independently while forming (111) facets in the high concentration region 26.26'.As single crystallization progresses in the high concentration region, the single crystallized portion is then seeded. Then, single crystallization begins in the non-doped region in a direction perpendicular to the direction of single crystallization in the high concentration region, and eventually these regions collide to form a grain boundary 27. This grain boundary 27 has a small inclination angle. This is a grain boundary and is formed near the center between the striped high concentration regions.Crystallization progresses further while maintaining this state, and eventually polycrystalline nuclei are generated and the expansion of the single crystal region stops. Between the high concentration regions, a single crystal having a small tilt grain boundary approximately in the center is obtained in an area of 6 μm×10 μm.

なお、高濃度領域の間隔が10μmを超えると中央付近
に単結晶化されない領域が残るので、高濃度領域の間隔
は10μm以内であることが望ましい。
Note that if the interval between the high concentration regions exceeds 10 μm, a region that is not single crystallized remains near the center, so it is desirable that the interval between the high concentration regions is 10 μm or less.

次Vここの成長を利用した他の実施例について記す。Next, another example utilizing this growth will be described.

第6図は島状に開口部23を有する5i02全形成した
Si基板21の上に、非晶質S i24を形成し、その
上に集束イオン線28によって、りんを線状に打込み、
高濃度領域26.26’、26”等を形成している様子
を示す。島状開口部は1μm×18μmでろシ、開口部
と開口部との間隔は、短辺間が3μmで長辺間が18μ
mである。集束イオン線のスポット径は0.2μmであ
り、線ドーズI X 10”cm−’でリンイオンを6
μml¥0隔で打込んでいる。
In FIG. 6, amorphous Si 24 is formed on a fully formed Si substrate 21 having an island-shaped opening 23, and phosphorus is linearly implanted thereon using a focused ion beam 28.
The figure shows how high concentration regions 26, 26', 26'', etc. are formed. is 18μ
It is m. The spot diameter of the focused ion beam is 0.2 μm, and the phosphorus ion is
It is inserted at μml¥0 intervals.

第7図はこれを固相成長させた後の結晶亜粒界27の形
状を示している。高濃度領域26.26’。
FIG. 7 shows the shape of the crystal subgrain boundary 27 after solid phase growth. High concentration area 26.26'.

26“等に挾まれた領域がほぼ単結晶化し、規則的な結
晶亜粒界の形状が認められる。例えばMO8FETチャ
ネル領域等素子の活性領域にこれらの結晶亜粒界が含ま
れると、素子特性のバラツキが大きくなる。そこで、こ
の実施例では、亜粒界を避けて高濃度領域の直近の@2
μm、長さ10μmの領域29を動作領域として素子を
配置している。更にソース・ドレーン領域等素子の構成
上高濃度のドーピングが必要な領域については、集束イ
オン線による高濃度領域26等と重複する様に配置し、
結晶化の目的のために無駄な面積を生じないように配慮
した。また、集束イオン線による高濃度領域26等を介
した電気的導通が回路構成上不都合を生じる場合には、
当然のことながら、酸化膜上でこの高濃度領域をエツチ
ングまたは酸化により切断した。
26" etc. are almost single-crystalline, and the shape of regular crystal sub-grain boundaries is observed. For example, if these crystal sub-grain boundaries are included in the active region of a device such as a MO8FET channel region, the device characteristics will be affected. Therefore, in this example, we avoided the sub-grain boundary and
The elements are arranged with a region 29 having a length of 10 μm and a length of 10 μm as an operating region. Furthermore, regions that require high concentration doping due to the structure of the device, such as source/drain regions, are arranged so as to overlap with the high concentration region 26 etc. formed by the focused ion beam.
Care was taken not to waste area for the purpose of crystallization. In addition, if electrical continuity via the high concentration region 26 etc. due to the focused ion beam causes problems in the circuit configuration,
Naturally, this high concentration region on the oxide film was cut by etching or oxidation.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明によれば、結晶成長速度の遅い高純
度非晶質Siをその成長限界を超えて単結晶化し、拡大
されたSOI構造を実現することができ、さらK、集束
イオン線の如き手法により極細線の高濃度領域を設ける
ことによって、結晶化促進のための無駄面積を実質的に
無くすることが可能である。
As described above, according to the present invention, it is possible to single-crystallize high-purity amorphous Si, which has a slow crystal growth rate, beyond its growth limit, and realize an expanded SOI structure. By providing a high concentration region of ultra-fine wires using the method described above, it is possible to substantially eliminate wasted area for promoting crystallization.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す鳥W&断面図、第2図
は従来法の固相成長を示す鳥敞断面図、第3図はドーピ
ングによる固相成長領域拡大を示すデータ、第4図は本
発明の他の実施例を示す鳥緻断面図、第5図は第4図の
構造における固相成長の様子金示す平面図、第6図は本
発明の他の実施例の鳥諏説明図、第7図は第6図の構造
における固相成長後の様子を示す平面図である。 21・・・≠結晶半導体基板、22・・・酸化膜、23
・・・酸化膜開口部(基板露出部)、24・・・非晶質
Si層、25・・・固相成長領域、26・・・高濃度不
純物領域、27・・・結晶亜粒界、28・・・集束イイ
ン線、29・・・素子の動作領域の配置位置。 代理人 弁理士 小川勝馬′ ・。 (イ) Z3 相口許 第1図 (ロ) 25  4稽占&イと、頒ナメシ。 ■Z図 (イン 冨 3 図 熱か理叶間(叶匍 蔓 4 図 Z1阜齢晶不尊4本基板 22贅色皓膜 Z3鏝M開り舒 24非晶質手導イl 冨 5 図 (ロ) Z3酔イと、月−5M40部 27梯晶却早
Fig. 1 is a cross-sectional view of a bird W & showing an embodiment of the present invention, Fig. 2 is a cross-sectional view of a bird W & showing solid phase growth using the conventional method, Fig. 3 is data showing expansion of the solid phase growth region by doping, FIG. 4 is a detailed cross-sectional view showing another embodiment of the present invention, FIG. 5 is a plan view showing solid phase growth in the structure of FIG. 4, and FIG. 6 is a schematic cross-sectional view of another embodiment of the present invention. 7 is a plan view showing the structure of FIG. 6 after solid phase growth. 21...≠crystalline semiconductor substrate, 22... oxide film, 23
... Oxide film opening (substrate exposed part), 24 ... Amorphous Si layer, 25 ... Solid phase growth region, 26 ... High concentration impurity region, 27 ... Crystal subgrain boundary, 28... Focusing line, 29... Arrangement position of the operating region of the element. Agent: Patent attorney Katsuma Ogawa'. (A) Z3 Aiguchi Figure 1 (B) 25 4 Sensei & I, and the name of the delivery. ■Z Diagram (In Tomi 3 Diagram Heat or Rikanoma (Kanawa Vine) 4 Diagram Z1 Fulong Crystal Unson 4 Substrates 22 Luxurious Membrane Z3 Trowel M Opening Shu 24 Amorphous Hand Il Fuji 5 Diagram (b) Z3 Drunken and Moon-5M40 Part 27 Kakei Akiyoshi

Claims (1)

【特許請求の範囲】 1、開口部を有する絶縁膜を介して単結晶半導体基板上
に堆積された非晶質半導体薄膜を上記開口部より逐次単
結晶化させる単結晶半導体薄膜の形成方法において、上
記開口部の少なくとも一部を含む開口部の近接領域に高
濃度不純物領域を設けたことを特徴とする単結晶半導体
薄膜の形成方法。 2、特許請求の範囲第1項記載の単結晶半導体薄膜の形
成方法において、高濃度不純物領域を半導体素子の配線
領域に、それ以外の領域の単結晶化部分の少なくとも一
部分を半導体素子の動作領域に用いる如く、開口部及び
高濃度不純物領域を配置したことを特徴とする単結晶半
導体薄膜の形成方法。 3、特許請求の範囲第1項記載の単結晶半導体薄膜の形
成方法において、高濃度不純物領域を集束イオン線にて
描画形成したことを特徴とする準結晶半導体薄膜の形成
方法。 4、特許請求の範囲第1項記載の単結晶半導体薄膜の形
成方法において、高濃度領域は幅1μm以下の線条状で
、間隔が10μmを超えない範囲で複数形成されている
ことを特徴とする単結晶半導体薄膜の形成方法。
[Claims] 1. A method for forming a single crystal semiconductor thin film, in which an amorphous semiconductor thin film deposited on a single crystal semiconductor substrate through an insulating film having an opening is successively single-crystallized from the opening, A method for forming a single crystal semiconductor thin film, characterized in that a high concentration impurity region is provided in a region adjacent to the opening including at least a portion of the opening. 2. In the method for forming a single crystal semiconductor thin film as described in claim 1, the high concentration impurity region is used as the wiring region of the semiconductor element, and at least a part of the single crystallized portion of the other region is used as the operating area of the semiconductor element. 1. A method for forming a single crystal semiconductor thin film, which comprises arranging an opening and a high concentration impurity region, as used in the invention. 3. A method for forming a quasi-crystalline semiconductor thin film according to claim 1, characterized in that the high concentration impurity region is formed by drawing with a focused ion beam. 4. The method for forming a single crystal semiconductor thin film according to claim 1, characterized in that a plurality of high concentration regions are formed in a linear shape with a width of 1 μm or less, with an interval not exceeding 10 μm. A method for forming a single crystal semiconductor thin film.
JP20365986A 1986-09-01 1986-09-01 Method for forming single crystal semiconductor thin film Expired - Fee Related JP2505764B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20365986A JP2505764B2 (en) 1986-09-01 1986-09-01 Method for forming single crystal semiconductor thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20365986A JP2505764B2 (en) 1986-09-01 1986-09-01 Method for forming single crystal semiconductor thin film

Publications (2)

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JPS6360517A true JPS6360517A (en) 1988-03-16
JP2505764B2 JP2505764B2 (en) 1996-06-12

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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008218570A (en) * 2007-03-01 2008-09-18 Toshiba Corp Semiconductor device and manufacturing method therefor
WO2021140849A1 (en) * 2020-01-10 2021-07-15 株式会社ブイ・テクノロジー Polycrystalline film, method for forming polycrystalline film, laser crystallization device and semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008218570A (en) * 2007-03-01 2008-09-18 Toshiba Corp Semiconductor device and manufacturing method therefor
WO2021140849A1 (en) * 2020-01-10 2021-07-15 株式会社ブイ・テクノロジー Polycrystalline film, method for forming polycrystalline film, laser crystallization device and semiconductor device
US20230027404A1 (en) * 2020-01-10 2023-01-26 V Technology Co., Ltd. Polycrystalline film, method for forming polycrystalline film, laser crystallization device and semiconductor device
US11791160B2 (en) 2020-01-10 2023-10-17 Kyushu University, National University Corporation Polycrystalline film, method for forming polycrystalline film, laser crystallization device and semiconductor device

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