JPS6360479B2 - - Google Patents

Info

Publication number
JPS6360479B2
JPS6360479B2 JP56097804A JP9780481A JPS6360479B2 JP S6360479 B2 JPS6360479 B2 JP S6360479B2 JP 56097804 A JP56097804 A JP 56097804A JP 9780481 A JP9780481 A JP 9780481A JP S6360479 B2 JPS6360479 B2 JP S6360479B2
Authority
JP
Japan
Prior art keywords
memory chip
magnetic bubble
bubble memory
board
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56097804A
Other languages
Japanese (ja)
Other versions
JPS57212686A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9780481A priority Critical patent/JPS57212686A/en
Publication of JPS57212686A publication Critical patent/JPS57212686A/en
Publication of JPS6360479B2 publication Critical patent/JPS6360479B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • G11C19/085Generating magnetic fields therefor, e.g. uniform magnetic field for magnetic domain stabilisation

Description

【発明の詳細な説明】 本発明は歪の発生を少くして基板上に固定せし
め磁気バブルメモリチツプの搭載法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for mounting a magnetic bubble memory chip on a substrate while reducing distortion.

磁気バブルメモリチツプは厚さ約500μmの非磁
性ガーネツト結晶ウエハー例えばガドリニウム・
ガリウム・ガーネツト(Gd3Ga5O12)単結晶より
なるウエハー上に必要とする磁気特性をもつ磁性
ガーネツトを数μm程度の厚さにエピタキシヤル
成長せしめ、この上に薄膜蒸着技術と写真蝕刻技
術(ホトリソグラフイ)を用いて導体パターン層
と駆動パターン層をそれぞれ絶縁して層形成した
後メモリチツプ毎に切断したもので微小結晶膜上
に回路形成されたものよりなつている。
Magnetic bubble memory chips are made of non-magnetic garnet crystal wafers with a thickness of approximately 500 μm, such as gadolinium.
Magnetic garnet with the required magnetic properties is epitaxially grown on a wafer made of single crystal gallium garnet (Gd 3 Ga 5 O 12 ) to a thickness of several μm, and then thin film deposition technology and photo-etching technology are applied on this wafer. It consists of a conductor pattern layer and a drive pattern layer that are insulated and formed using (photolithography) and then cut into memory chips, with circuits formed on a microcrystalline film.

例えばメモリ媒体として直径3μmの磁気バブル
を用いる記憶容量64Kビツトのメモリチツプの場
合、そのチツプの大きさは6mm×5mm程度であり
直径1.9μmの磁気バブルを用いる1Mビツトメモ
リの場合、チツプの大きさは10mm×10mm程度であ
り、チツプの厚さは基板結晶の厚さにより決つて
いるので、個々のチツプは極めて薄い磁性結晶膜
より形成されているとしてよい。
For example, in the case of a memory chip with a storage capacity of 64K bits that uses magnetic bubbles with a diameter of 3 μm as the memory medium, the size of the chip is approximately 6 mm x 5 mm, and in the case of a 1M bit memory that uses magnetic bubbles with a diameter of 1.9 μm, the chip size is The size is approximately 10 mm x 10 mm, and the thickness of the chip is determined by the thickness of the substrate crystal, so each chip may be formed from an extremely thin magnetic crystal film.

かゝるメモリチツプは印刷配線基板(以下略し
て基板)上に接着され配線接続が行われた後に磁
気バブルメモリとしてのパツケージングが行われ
る。
Such a memory chip is bonded onto a printed wiring board (hereinafter referred to as the board for short), wiring connections are made, and then packaging as a magnetic bubble memory is performed.

第1図はかゝるメモリチツプを搭載する基板で
Aはこの正面図、BはこのA−A′線における断
面図である。
FIG. 1 shows a board on which such a memory chip is mounted, and A is a front view thereof, and B is a sectional view taken along the line A-A'.

第1図においてメモリチツプは基板1の中央凹
部2に接着剤により搭載された後メモリチツプの
配線端子部と基板上の配線端子部とがワイヤボン
デイングにより回路接続され、基板内配線により
基板端子3に導かれパツケージングの際はデユア
ルインライン構造をとる樹脂パツケージの埋込み
端子に溶着接続される構成をとつている。なお
こゝで基板1に設けられている深い切り込み部4
は磁気バブルを転送する駆動磁界形成用の駆動コ
イル挿着用の切り込みである。
In Fig. 1, the memory chip is mounted in the central recess 2 of the board 1 with adhesive, and then the wiring terminal part of the memory chip and the wiring terminal part on the board are connected to each other by wire bonding, and the wiring is connected to the board terminal 3 by the wiring inside the board. When packaging the cable, it is welded and connected to the embedded terminals of the resin package, which has a dual in-line structure. Note that the deep notch 4 provided in the substrate 1
is a notch for inserting a drive coil for forming a drive magnetic field for transferring magnetic bubbles.

さて従来かゝる基板1へのメモリチツプの搭載
は上記のように接着剤を用いて行われているが、
加熱硬化形接着剤を用いる場合はメモリチツプ内
の位置により熱硬化速度が異なり均一に硬化が行
われないために歪を生じ一方常温硬化形接着剤を
用いる場合は硬化に時間を要する以外にこの場合
も樹脂の収縮によりメモリチツプに歪を生じ何れ
の場合もメモリチツプの磁気特性を劣化させてい
る。
Now, conventionally, memory chips are mounted on the substrate 1 using an adhesive as described above.
When using a heat-curing adhesive, the heat curing speed varies depending on the location within the memory chip, and the curing does not occur uniformly, resulting in distortion.On the other hand, when using a room-temperature-curing adhesive, it takes time to cure, and in this case, In both cases, the shrinkage of the resin causes distortion in the memory chip, deteriorating the magnetic properties of the memory chip.

第2図は第1図の基板1の中央凹部2にメモリ
チツプ5を接着剤6を用いて装着した際に発生す
る歪によつてメモリチツプ5を彎曲した状態を示
している。すなわち硬化は加熱硬化又は常温硬化
の何れの場合もメモリチツプ5に接している接着
剤6の周辺部より起るために歪みが生ずるが、メ
モリチツプ5の厚さが薄いために彎曲が生じ、こ
の彎曲による機械的歪みはメモリチツプ5の磁気
的特性に直接に影響を及ぼし磁気バブルメモリに
おける動作磁界領域の減少特にコラプス磁界領域
側の減少となつて現われる。
FIG. 2 shows a state in which the memory chip 5 is bent due to the distortion that occurs when the memory chip 5 is attached to the central recess 2 of the substrate 1 shown in FIG. 1 using an adhesive 6. That is, in both heat curing and room temperature curing, distortion occurs because the curing occurs from the periphery of the adhesive 6 that is in contact with the memory chip 5, but since the memory chip 5 is thin, curvature occurs, and this curvature The mechanical distortion caused by this directly affects the magnetic properties of the memory chip 5, and appears as a reduction in the operating magnetic field area in the magnetic bubble memory, particularly in the collapse magnetic field area.

さてメモリチツプを搭載する基板1として従来
はアルミナ磁器が多く用いられているが最近はガ
ラスエポキシ或はポリイミド樹脂よりなる基板が
加工性、耐熱性などの特徴を活して多く用いられ
るようになつた。
Conventionally, alumina porcelain has often been used as the substrate 1 on which memory chips are mounted, but recently substrates made of glass epoxy or polyimide resin have come into widespread use due to their characteristics such as workability and heat resistance. .

こゝで磁気バブルメモリチツプの熱膨張係数が
9.5×10-6deg-1であるのに対して上記樹脂の熱膨
張係数は使用温度範囲では3〜7×10-1deg-1
比較的少いが高温では急激に増加する性質があ
る。
Here, the coefficient of thermal expansion of the magnetic bubble memory chip is
9.5×10 -6 deg -1 , whereas the thermal expansion coefficient of the above resin is relatively small at 3 to 7×10 -1 deg -1 in the operating temperature range, but it has the property of increasing rapidly at high temperatures. .

第3図は上記耐熱樹脂の熱膨張係数の温度依存
性を示したもので160℃以上では急激に増大する
特徴がある。
FIG. 3 shows the temperature dependence of the thermal expansion coefficient of the heat-resistant resin, which is characterized by a rapid increase above 160°C.

本発明は従来メモリチツプを基板へ搭載する
際、接着により生ずる歪によつて磁気特性の劣化
を来しているが、この劣化を避けることを目的と
し、そのためにガラスエポキシ或はポリイミドな
どの耐熱樹脂の熱膨張係数が高温において急激に
増加する性質を利用し、高温に加熱して充分に基
板が膨張した状態でメモリチツプを基板の凹部に
嵌入し次にこれを常温にまで下げることにより接
着剤によることなくメモリチツプを基板に搭載す
ることを要旨とするものである。
The purpose of the present invention is to avoid the deterioration of magnetic properties caused by distortion caused by adhesion when mounting a memory chip on a substrate, and for this purpose, heat-resistant resin such as glass epoxy or polyimide is used. Taking advantage of the property that the coefficient of thermal expansion of the substrate increases rapidly at high temperatures, the memory chip is inserted into the recess of the substrate after the substrate is heated to a high temperature and expanded sufficiently, and then the temperature is lowered to room temperature. The gist of this is to mount a memory chip on a board without any problems.

第4図は本発明の実施例を示すもので第1図と
同じ構造をもつガラスエポキシ基板の中央部に10
×10mm角の凹部2があり、これにチツプサイズが
10×10mm角のメモリチツプ5を搭載した場合の断
面形状であり、この場合基板凹部2のサイズはメ
モリチツプ嵌入温度例えば200℃においてメモリ
チツプ5の常温サイズにほゞ等しい値にとつてお
くことが必要である。
Figure 4 shows an embodiment of the present invention.
There is a recess 2 of ×10 mm square, and the chip size is determined in this.
This is the cross-sectional shape when a 10 x 10 mm square memory chip 5 is mounted, and in this case, the size of the substrate recess 2 must be set to a value approximately equal to the room temperature size of the memory chip 5 at the memory chip insertion temperature, for example, 200°C. be.

搭載方法としては基板1を約200℃にまで加熱
すれば基板1が膨張し一方メモリチツプ5は常温
の状態であるから、この状態で嵌入しその後常温
にまで冷却すればメモリチツプ5は基板1により
挾着固定されて搭載が終る。
As for the mounting method, if the board 1 is heated to about 200°C, the board 1 will expand, while the memory chip 5 will be at room temperature, so if it is inserted in this state and then cooled to room temperature, the memory chip 5 will be sandwiched between the board 1. The mounting is completed after it is fixed in place.

第5図は第4図の挾着固定の信頼度を高めた構
造で基板1の凹部2の周辺部に突起部7を設ける
ことによりメモリチツプの挾着固定を確実にして
いる。
FIG. 5 shows a structure in which the reliability of the clamping and fixing shown in FIG. 4 is improved, and by providing a protrusion 7 around the recess 2 of the substrate 1, the clamping and fixing of the memory chip is ensured.

さて磁気メモリチツプのような磁性体を挟着す
る場合は周囲よりの圧力により磁歪が生じこれに
よりメモリチツプの磁気特性が劣化することが考
えられるが、ガラスエポキシ或はポリイミドなど
の樹脂はアルミナ磁器などの剛体と異なり僅かに
弾性があること及び挾着力が比較的弱いことから
本発明の方法を用いて搭載する場合に磁気特性の
劣化は何ら認めることはできなかつた。
Now, when sandwiching a magnetic material such as a magnetic memory chip, magnetostriction may occur due to pressure from the surroundings, which may deteriorate the magnetic properties of the memory chip, but resins such as glass epoxy or polyimide are Unlike a rigid body, it has slight elasticity and the clamping force is relatively weak, so when it was mounted using the method of the present invention, no deterioration in magnetic properties could be observed.

本発明は今までメモリチツプの基板への搭載に
際して歪みの発生を少くするために各種の試みが
なされているが何れも接着剤を用いるもので多少
なりとも凝縮歪の影響を避けることができなかつ
たのに対し接着剤を用いることなく搭載を行うも
のであり、本発明の実施によりメモリチツプ搭載
の際の磁気特性の劣化を避けることができた。
In the present invention, various attempts have been made to reduce the occurrence of distortion when mounting a memory chip on a substrate, but all of them used adhesives, and it was not possible to avoid the effects of condensation distortion to some extent. In contrast, mounting is performed without using adhesive, and by implementing the present invention, it has been possible to avoid deterioration of magnetic properties when mounting memory chips.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は磁気メモリチツプを搭載する印刷配線
基板でAは正面図BはA−A′線における断面図、
第2図は従来の接着歪の発生状況を示す断面図、
第3図は樹脂基板の熱膨張特性、また第4図およ
び第5図は本発明を実施して搭載した断面図であ
る。 図において、1……印刷配線基板、2……メモ
リチツプを搭載する基板凹部、5……メモリチツ
プ、6……接着剤、7……突起部。
Figure 1 shows a printed wiring board on which a magnetic memory chip is mounted, A is a front view, B is a sectional view taken along the line A-A',
Figure 2 is a cross-sectional view showing how conventional adhesive strain occurs.
FIG. 3 shows the thermal expansion characteristics of the resin substrate, and FIGS. 4 and 5 are cross-sectional views of a device mounted on which the present invention is implemented. In the figure, 1...printed wiring board, 2...substrate recess on which a memory chip is mounted, 5...memory chip, 6...adhesive, 7...protrusion.

Claims (1)

【特許請求の範囲】 1 少なくとも磁気バブルメモリチツプの使用温
度範囲では熱膨張係数が小さく、且つ該使用温度
範囲以上の高温において熱膨張係数が急激に増加
する性質を有するガラスエポキシ或はポリイミド
などの耐熱性樹脂からなる磁気バブルメモリ基板
を具備し、該基板は前記磁気バブルメモリチツプ
を収容固定するための凹部を有しており、 前記基板を前記高温に加熱した状態で前記磁気
バブルメモリチツプを前記凹部に嵌入し、しかる
後該基板を冷却することにより接着剤なしにて該
基板の凹部内周面が前記磁気バブルメモリチツプ
の外周面を挾着して該磁気バブルメモリチツプを
固定することを特徴とした磁気バブルメモリチツ
プの搭載法。
[Claims] 1. A material such as glass epoxy or polyimide, which has a small coefficient of thermal expansion at least in the operating temperature range of the magnetic bubble memory chip, and whose thermal expansion coefficient rapidly increases at high temperatures above the operating temperature range. A magnetic bubble memory board made of heat-resistant resin is provided, the board has a recess for accommodating and fixing the magnetic bubble memory chip, and the magnetic bubble memory chip is heated to the high temperature while the board is heated to the high temperature. By fitting into the recess and then cooling the substrate, the inner circumferential surface of the recess of the substrate clamps the outer circumferential surface of the magnetic bubble memory chip without an adhesive, thereby fixing the magnetic bubble memory chip. A method for mounting a magnetic bubble memory chip featuring:
JP9780481A 1981-06-24 1981-06-24 Mounting method for magnetic bubble memory chip Granted JPS57212686A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9780481A JPS57212686A (en) 1981-06-24 1981-06-24 Mounting method for magnetic bubble memory chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9780481A JPS57212686A (en) 1981-06-24 1981-06-24 Mounting method for magnetic bubble memory chip

Publications (2)

Publication Number Publication Date
JPS57212686A JPS57212686A (en) 1982-12-27
JPS6360479B2 true JPS6360479B2 (en) 1988-11-24

Family

ID=14201962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9780481A Granted JPS57212686A (en) 1981-06-24 1981-06-24 Mounting method for magnetic bubble memory chip

Country Status (1)

Country Link
JP (1) JPS57212686A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5821316B2 (en) * 2011-06-21 2015-11-24 三菱化学株式会社 Manufacturing method of resin package for semiconductor light emitting device and manufacturing method of semiconductor light emitting device having the resin package for semiconductor light emitting device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5092052A (en) * 1973-12-12 1975-07-23
JPS54157042A (en) * 1978-05-31 1979-12-11 Fujitsu Ltd Generation system for connection code for a pair of segments
JPS54157047A (en) * 1978-05-31 1979-12-11 Fujitsu Ltd Magnetic bubble unit
JPS554988A (en) * 1978-06-27 1980-01-14 Nec Kyushu Ltd Semiconductor device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS563837Y2 (en) * 1979-11-21 1981-01-28

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5092052A (en) * 1973-12-12 1975-07-23
JPS54157042A (en) * 1978-05-31 1979-12-11 Fujitsu Ltd Generation system for connection code for a pair of segments
JPS54157047A (en) * 1978-05-31 1979-12-11 Fujitsu Ltd Magnetic bubble unit
JPS554988A (en) * 1978-06-27 1980-01-14 Nec Kyushu Ltd Semiconductor device

Also Published As

Publication number Publication date
JPS57212686A (en) 1982-12-27

Similar Documents

Publication Publication Date Title
KR0171438B1 (en) Method for mounting a semiconductor device on a circuit board, and a circuit board with a semiconductor device mounted thereon
US5851845A (en) Process for packaging a semiconductor die using dicing and testing
KR100633195B1 (en) Flexible electronic device and production method of the same
KR100345647B1 (en) pressure sensor and method of manufacturing the same
KR101398404B1 (en) Plastic overmolded packages with mechanically decoupled lid attach attachment
US20050142691A1 (en) Mounting structure of semiconductor chip, semiconductor device and method of making the semiconductor device
JPH09293749A (en) Forming method of connecting structure body
TW200301871A (en) Semiconductor module and production method therefor and module for IC cards and the like
TW202006907A (en) Semiconductor device
US4935086A (en) Process of bonding an electrical device package to a mounting surface
TWI293202B (en) Carrier board structure with semiconductor component embedded therein
KR970007840B1 (en) Semiconductor device
JPS6360479B2 (en)
JP3052899B2 (en) Semiconductor device
US9269594B2 (en) High power ceramic on copper package
JPH0590448A (en) Hybrid integrated circuit
JP2549659B2 (en) Semiconductor device
US3710355A (en) Unitized plate wire memory plane
US9330943B2 (en) Low cost repackaging of thinned integrated devices
JPH0582676A (en) Hybrid integrated circuit
JPH1140710A (en) Semiconductor device
JPH0582677A (en) Hybrid integrated circuit
JPH0582678A (en) Hybrid integrated circuit
JPS6025758Y2 (en) Mounting structure of magnetic bubble memory chip
JPH0590449A (en) Hybrid integrated circuit