JPS6359424U - - Google Patents
Info
- Publication number
- JPS6359424U JPS6359424U JP15491486U JP15491486U JPS6359424U JP S6359424 U JPS6359424 U JP S6359424U JP 15491486 U JP15491486 U JP 15491486U JP 15491486 U JP15491486 U JP 15491486U JP S6359424 U JPS6359424 U JP S6359424U
- Authority
- JP
- Japan
- Prior art keywords
- flip
- flop
- input signal
- inverted output
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001960 triggered effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15491486U JPS6359424U (enExample) | 1986-10-08 | 1986-10-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15491486U JPS6359424U (enExample) | 1986-10-08 | 1986-10-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6359424U true JPS6359424U (enExample) | 1988-04-20 |
Family
ID=31075137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15491486U Pending JPS6359424U (enExample) | 1986-10-08 | 1986-10-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6359424U (enExample) |
-
1986
- 1986-10-08 JP JP15491486U patent/JPS6359424U/ja active Pending