JPS635754U - - Google Patents
Info
- Publication number
- JPS635754U JPS635754U JP9772686U JP9772686U JPS635754U JP S635754 U JPS635754 U JP S635754U JP 9772686 U JP9772686 U JP 9772686U JP 9772686 U JP9772686 U JP 9772686U JP S635754 U JPS635754 U JP S635754U
- Authority
- JP
- Japan
- Prior art keywords
- call signal
- circuit
- clocks
- detecting
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Description
第１図は本考案の実施例の呼出信号検出回路、
第２図は従来の呼出信号と構内交換機からの呼出
信号のタイミング図、第３図は従来の呼出信号検
出回路、第４図は本考案回路の動作説明図、第５
図はアナログ回路への本考案の応用例である。
１：呼出信号入力端子、２，５，６：クロツク
入力端子、４：検出呼出信号出力端子、３：カウ
ンタ、７：アツプダウンカウンタ、８：演算増幅
器。
FIG. 1 shows a calling signal detection circuit according to an embodiment of the present invention.
Fig. 2 is a timing diagram of a conventional calling signal and a calling signal from a private branch exchange, Fig. 3 is a conventional calling signal detection circuit, Fig. 4 is an operation explanatory diagram of the circuit of the present invention, and Fig. 5
The figure shows an example of the application of this invention to an analog circuit. 1: Calling signal input terminal, 2, 5, 6: Clock input terminal, 4: Detection calling signal output terminal, 3: Counter, 7: Up-down counter, 8: Operational amplifier.
Claims (1)
置からの呼出信号を検出する回路において、アツ
プダウンカウンタと周波数の異なる二つのクロツ
クｎ，ｍ（ｍ＞ｎ）とこのクロツクを切替えるア
ンドオア回路を持ち、入力の呼出信号がＯＮの時
はｍクロツクでカウントアツプし、呼出信号がＯ
ＦＦの時はｎクロツクでカウントダウンし、カウ
ント値が一定値以上に達したときに呼出信号のＯ
Ｎを検出することを特徴とした呼出信号検出回路
。 A circuit for detecting a call signal from a network control device in a modem device, a data transmission terminal device, etc. has an up-down counter, two clocks n and m (m>n) with different frequencies, and an AND-OR circuit for switching these clocks. When the input call signal is ON, the m clock counts up and the call signal goes O.
When it is FF, it counts down with the n clock, and when the count value reaches a certain value or more, the call signal O
A calling signal detection circuit characterized by detecting N.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9772686U JPS635754U (en) | 1986-06-27 | 1986-06-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9772686U JPS635754U (en) | 1986-06-27 | 1986-06-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS635754U true JPS635754U (en) | 1988-01-14 |
Family
ID=30964976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9772686U Pending JPS635754U (en) | 1986-06-27 | 1986-06-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS635754U (en) |
-
1986
- 1986-06-27 JP JP9772686U patent/JPS635754U/ja active Pending
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