JPS6356450U - - Google Patents
Info
- Publication number
- JPS6356450U JPS6356450U JP14797186U JP14797186U JPS6356450U JP S6356450 U JPS6356450 U JP S6356450U JP 14797186 U JP14797186 U JP 14797186U JP 14797186 U JP14797186 U JP 14797186U JP S6356450 U JPS6356450 U JP S6356450U
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- cpus
- runaway
- circuit
- printer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Accessory Devices And Overall Control Thereof (AREA)
- Debugging And Monitoring (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14797186U JPS6356450U (lv) | 1986-09-26 | 1986-09-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14797186U JPS6356450U (lv) | 1986-09-26 | 1986-09-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6356450U true JPS6356450U (lv) | 1988-04-15 |
Family
ID=31061815
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14797186U Pending JPS6356450U (lv) | 1986-09-26 | 1986-09-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6356450U (lv) |
-
1986
- 1986-09-26 JP JP14797186U patent/JPS6356450U/ja active Pending