JPS6352350U - - Google Patents
Info
- Publication number
- JPS6352350U JPS6352350U JP14496686U JP14496686U JPS6352350U JP S6352350 U JPS6352350 U JP S6352350U JP 14496686 U JP14496686 U JP 14496686U JP 14496686 U JP14496686 U JP 14496686U JP S6352350 U JPS6352350 U JP S6352350U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- flyback transformer
- voltage
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims 3
- 238000004804 winding Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 1
Description
第１図は本考案に係る過電圧過負荷保護回路の
ブロツク図、第２図は電子選局ユニツトの動作を
示すフローチヤート、第３図はホールドダウン回
路を示す電気回路図、第４図は従来の電源回路を
示すブロツク図である。
１……電子選局ユニツト、２……電源回路、３
……水平偏向回路、３１……フライバツクトラン
ス、４……保護キー制御回路、５……キーマトリ
ツクス。
Fig. 1 is a block diagram of the overvoltage overload protection circuit according to the present invention, Fig. 2 is a flowchart showing the operation of the electronic tuning unit, Fig. 3 is an electric circuit diagram showing the hold-down circuit, and Fig. 4 is a conventional one. FIG. 1...Electronic channel selection unit, 2...Power supply circuit, 3
... horizontal deflection circuit, 31 ... flyback transformer, 4 ... protection key control circuit, 5 ... key matrix.
Claims (1)
する電子選局ユニツト１を具えると共に、電源回
路２とアノードとの間に、フライバツクトランス
３１及び水平出力回路３８を具えた水平偏向回路
３を介装し、電源回路２からの供給電圧Ｂを高圧
に変換してアノードへ送出するテレビジヨン受像
機に於いて、水平偏向回路３には、フライバツク
トランス３１から得られるフライバツクパルスの
波高値が所定値を越えたとき前記水平出力回路３
８の動作を停止せしめるホールドダウン回路３５
を装備し、フライバツクトランス３１にはフライ
バツクトランス３１への入力電圧に比例する出力
検出電圧ＬＢを発生する出力検知器を配備し、該
出力検知器は、フライバツクトランス３１への入
力電圧の低下量が所定値を越えたとき前記出力検
出電圧ＬＢに基づいて保護キー信号を作成する制
御回路４を介して、電子選局ユニツト１のキー信
号入力端に接続し、電子選局ユニツト１には保護
キー信号に基づいて電源停止信号を作成し電源回
路２へ送出する信号処理部が設けられていること
を特徴とするテレビジヨン受像機の過電圧過負荷
保護回路。 出力検知器は、フライバツクトランス３１の
２次側にＬＢ検出巻線６を配設すると共に、該巻
線６の出力を整流回路に接続して構成される実用
新案登録請求の範囲第１項に記載の過電圧過負荷
保護回路。[Claims for Utility Model Registration] The system includes an electronic tuning unit 1 that creates a tuner control signal based on key operations, and also includes a flyback transformer 31 and a horizontal output circuit 38 between the power supply circuit 2 and the anode. In a television receiver that is equipped with a horizontal deflection circuit 3 that converts the supply voltage B from the power supply circuit 2 into high voltage and sends it to the anode, the horizontal deflection circuit 3 includes a high voltage that is obtained from a flyback transformer 31. When the peak value of the flyback pulse exceeds a predetermined value, the horizontal output circuit 3
Hold-down circuit 35 that stops the operation of 8.
The flyback transformer 31 is equipped with an output detector that generates an output detection voltage LB proportional to the input voltage to the flyback transformer 31. It is connected to the key signal input terminal of the electronic tuning unit 1 via the control circuit 4 which creates a protection key signal based on the output detection voltage LB when the amount of decrease exceeds a predetermined value. An overvoltage overload protection circuit for a television receiver, characterized in that a signal processing section is provided for creating a power stop signal based on a protection key signal and sending it to a power supply circuit 2. The output detector is constructed by disposing an LB detection winding 6 on the secondary side of a flyback transformer 31 and connecting the output of the winding 6 to a rectifier circuit. Overvoltage overload protection circuit as described in .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986144966U JP2519356Y2 (en) | 1986-09-19 | 1986-09-19 | Overvoltage and overload protection circuit for TV receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986144966U JP2519356Y2 (en) | 1986-09-19 | 1986-09-19 | Overvoltage and overload protection circuit for TV receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6352350U true JPS6352350U (en) | 1988-04-08 |
| JP2519356Y2 JP2519356Y2 (en) | 1996-12-04 |
Family
ID=31056066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986144966U Expired - Lifetime JP2519356Y2 (en) | 1986-09-19 | 1986-09-19 | Overvoltage and overload protection circuit for TV receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2519356Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01179667U (en) * | 1988-06-08 | 1989-12-22 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6157750U (en) * | 1984-09-20 | 1986-04-18 |
-
1986
- 1986-09-19 JP JP1986144966U patent/JP2519356Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6157750U (en) * | 1984-09-20 | 1986-04-18 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01179667U (en) * | 1988-06-08 | 1989-12-22 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2519356Y2 (en) | 1996-12-04 |
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