JPS6351409B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a noise reduction circuit for reducing noise generated during recording and playback using a tape recorder, and particularly to a noise reduction circuit suitable for being configured as an integrated circuit. Regarding circuits.

Generally, a noise reduction circuit reduces noise and distortion generated in a signal transmission system such as a tape recorder, and apparently expands the dynamic range of the signal transmission system. To do this, for example, encoding processing such as level compression and high frequency enhancement is performed on the input side of the signal transmission system, and decoding processing such as level expansion and high frequency attenuation is performed on the output side.

Especially for noise reduction in tape recorders.
Various types of noise reduction circuits are known, including the Dolby type and the dbx type (both are registered trademarks).

First, the Dolby system (registered trademark) mainly uses compression through amplification and attenuation in the low-level region.
The expansion is performed to enhance high frequencies on the input side and attenuate high frequencies on the output side. This Dolby system can be configured with a relatively simple circuit, and an example is shown in FIG.

In FIG. 1, an input signal supplied to an input terminal 1 is amplified by an inverting amplifier 3 via an adder 2 and sent to an output terminal 4. Next, the changeover switch 5 is switched to the switch terminal e to select the input signal from the input terminal 1 during an encoding operation such as recording, and is switched to the switch terminal d to select the input signal from the input terminal 1 during a decoding operation such as playback. The output signal of is selected. The output from this changeover switch 5 is passed through a variable filter 6, an in-phase amplifier 7, and an adder 2.
is being sent to. Further, a part of the output from the in-phase amplifier 7 is sent to a control terminal 10 of the variable filter 6 via a high-pass filter 8 and a level detector 9. Next, the variable filter 6 connects the control terminal 1
It has a variable resistance element 11 whose resistance value is controlled by a control signal from 0, and a capacitor 12 and a resistor 13.
A high pass filter consisting of a capacitor 14
and a parallel connection circuit with a resistor 15 and a variable resistance element 11
By connecting a variable high-pass filter consisting of
It constitutes a stage filter.

According to such a noise reduction circuit,
Approximately 10 dB of compression and expansion are performed only in the high frequency range, and if we pay attention to the frequency characteristics, we can see it as a filter whose frequency characteristics change depending on the signal level, as shown in Figure 2. FIG. 2 shows the output gain in dB relative to the input level of the input terminal 1 when the changeover switch 5 is connected to the terminal e side to perform an encoding operation. In this Fig. 2, dashed line A,
B and C indicate the gain of the output of the common-mode amplifier 7, and the control voltage applied to the control terminal 10 of the variable filter 3.
When Vc is a constant value Vo, the dashed-dotted line A is set, the dashed-dotted line B becomes Vc>Vo, the dashed-dotted line C becomes Vc<Vo,
Corresponds to each. Also, the broken line D has a gain of 0 dB,
In other words, it represents the input signal itself, and since this input signal and the output from the in-phase amplifier 7 are added by the adder 2, the concatenation gain of the noise reduction circuit in FIG. 1 is expressed by the solid line a in FIG. It is expressed as b, c.

However, in the variable filter 6 of such a noise reduction circuit, the capacitors 12, 1
4, a relatively large capacitance on the μF order is required.
Further, the resistance values of the resistors 13 and 15 are required to have an accuracy of approximately ±5%. Therefore, when integrating a noise reduction circuit, the capacitance must be several tens of pF.
Since the large capacitance capacitors 12 and 14 have to be externally connected, and when the resistors 13 and 15 are configured with diffused resistors in the integrated circuit, the variation in resistance value is ± Since it is about 20%, frequency characteristic deviation caused by this absolute value deviation cannot be avoided. Furthermore, the temperature characteristics of the resistance are also poor.
Therefore, when integrating a conventional noise reduction circuit, there are many external components, which increases the number of pins of the integrated circuit element, which makes wiring work complicated and tends to cause frequency characteristic deviations. Yes, it is not suitable for integration.

The present invention has been made in view of the above-mentioned conventional circumstances, and when it is integrated into an integrated circuit, the number of external parts and the number of pins of the integrated circuit element can be reduced, and the resistance value deviation inside the integrated circuit can be reduced. The purpose of the present invention is to provide a noise reduction circuit that can cancel out the effects of noise and temperature dependence, and is optimal for efficient and high-performance integration.

Hereinafter, a noise reduction circuit according to the present invention will be explained with reference to the drawings.

First, FIG. 3 is a block circuit diagram for explaining the basic configuration of the present invention, in which the variable filter 26
, floating type variable impedance circuit 3
1 and a capacitor 32, and outputs from both terminals 35 and 36 of this variable impedance circuit 31 are connected to in-phase and inverting input terminals 41 and 4 of a differential amplifier 40.
2, respectively.

That is, the input signal from the input terminal 21 is sent to the adder 22, added to the output from the differential amplifier 40, inverted and amplified by the inverting amplifier 23, and sent to the output terminal 24. The changeover switch 25 has one changeover terminal e connected to the input terminal 21 and the other changeover terminal d connected to the output terminal 24.
Either one of these inputs and outputs is selectively switched and sent to the variable filter 26. The variable filter 26 includes a floating type variable impedance circuit 31 whose one end 35 is connected to the common terminal (fixed terminal) of the changeover switch 25, and the other end 3 of the floating type variable impedance circuit 31.
A capacitor 32 inserted and connected between 6 and ground
It consists of. Further, outputs from both terminals 35 and 36 of the floating variable impedance circuit 31 are sent to in-phase and inverting input terminals 41 and 42 of a differential amplifier 40, respectively. The output from the differential amplifier 40 is sent to the adder 22, and the output from the differential amplifier 40 is detected by the level detector 29 via the high-pass filter 28 and becomes a control signal that is floated. is sent to the control terminal 30 of the variable impedance circuit 31,
Control the impedance value.

Here, the transfer function T(s) of the variable filter 26
(However, s=jω.) is the changeover switch 25
T(s) due to the output voltage Vin(s) from the common terminal of , and the potential difference Vr(s) between both terminals 35 and 36 of the floating type variable impedance circuit 31.
=Vr(s)/Vin(s). When the resistance value of the variable impedance circuit 31 is R and the capacitance value of the capacitor 32 is C, Vr(s) is expressed as Vr(s)=R/R+1/sCVin(s)... Therefore, T(s) =R/R+1/sC =s/s+1/CR... The characteristics of this equation are those of a high-pass filter whose cutoff frequency is the frequency f ₀ (=1/2πCR) when s is 1/CR. Further, since the resistance value R of the floating type variable impedance circuit 31 is controlled according to the output from the differential amplifier 40, filter characteristics approximately as shown in FIG. 2A, B, and C can be obtained, and noise reduction The total gain of the sion circuit is as shown in Fig. 2 a, b, and c.

Next, the variable filter 26, which is a main part of the present invention, will be explained.

FIG. 4 is a block circuit diagram showing the entirety of the noise reduction circuit 20 as a preferred embodiment of the present invention. It consists of a current amplifier 33 and a current amplifier 34. Here, the in-phase input terminal 35 of the voltage-current converter 33 is connected to the common terminal of the changeover switch 25, and the inverting input terminal 36 is connected to the capacitor 32. Further, the differential output current of the voltage-current converter 33 is supplied to the differential input terminals 37 and 38 of the current amplifier 34. An output terminal 39 of the current amplifier 34 is connected to the inverting input terminal 36 to which the capacitor 32 is connected. The current amplification factor of this current amplifier 34 is controlled to be proportional to the control voltage Vc applied to the control terminal 30.

Furthermore, the output from the output terminal 43 of the differential amplifier 40 is passed through a high-pass filter 2 for weighting.
8 and level detector 29 to the control terminal 30. Since the other configurations are the same as those in FIG. 3 described above, the same parts are given the same reference numerals and the explanation will be omitted.

FIG. 5 shows an equivalent circuit of the variable filter 26 of the noise reduction circuit having such a configuration. This Vr in Fig. 5 is the terminal 35, 3 in Fig. 4.
6, and the voltage-current converter 33 is represented as a current source 53 having a transfer conductance that multiplies this potential difference Vr by gm. The output current I (=gmVr) of the current source 53 having the transfer conductance gm is multiplied by Ai by the current source 54 corresponding to the current amplifier 34, and flows to the capacitor 32 via the terminal 36. In addition, selector switch 2
The input signal from 5 is an input signal source 51 of voltage Vin.
has been replaced by

Next, Fig. 6 shows an operational amplifier (OP amplifier) 55.
An equivalent circuit of the variable filter 26 expressed using the conductance 56 and the conductance 56 is shown. In FIG. 6, the value G of the conductance 56 is given as the product of the transfer conductance gm of the voltage-current converter 33 and the current gain Ai of the current amplifier 34 (G=gm·Ai), and is proportional to Ai. conductance value G
changes. Since this conductance value G is the reciprocal of the resistance value R of the floating type variable impedance circuit 31, the transfer function T(s) of the variable filter 26 is calculated from the above formula, T(s)=Vr(s)/Vin (s)=s/s+G/C...
It can be expressed as... Therefore, due to a change in the conductance value G, the frequency characteristics of the variable filter circuit 26 change, and characteristics similar to those shown in FIG. 2 are obtained.

A specific circuit configuration example of the floating type variable impedance circuit 31 used in such a variable filter 26 is shown in FIG.

In FIG. 7, positive and negative circuit power supplies are supplied to power supply terminals 61 and 62, respectively. The voltage-current converter 33 includes a first differential transistor pair 63, an emitter feedback resistor 64 having a resistance value R _p , and two constant current sources 65 and 66 each outputting a current of I _p /2. Here, the base terminals of the first differential transistor pair 63 are the in-phase and inverting input terminals 35 and 36, and the potential difference Vr between these terminals 35 and 36 causes the respective collectors of the differential transistor pair 63 to Output current
i ₁ and i ₂ can be approximately expressed as i ₁ =I _p /2−Vr/R …… i ₂ =I _p /2+Vr/R …….

Next, the current amplifier 34 includes a diode-connected second differential transistor pair 67, a third differential transistor pair 68 whose respective bases are connected to this differential transistor pair 67, and a second differential transistor pair 67. a bias voltage 69 connected to the common emitters of the dynamic transistor pair and a third differential transistor pair 68;
It is composed of a current inversion circuit 70 such as a current mirror connected to the collector of each, and a current source 71 proportionally controlled by a control voltage Vc applied to a control terminal 30. Here, the respective collector currents i ₃ and i ₄ of the third differential transistor pair 68 are calculated by setting the current flowing through the current source 71 as I _c , and
Under the condition that the saturation currents of the second and third differential transistor pairs 67 and 68 are equal, i ₃ = i ₂ · I _c /I _p = I _c /2 + Vr / R _p · I _c /I _p ... ... i ₄ = i ₁ ·I _c /I _p = I _c /2−Vr/R _p ·I _c /I _p ... It is expressed as follows. Here, one collector current i ₃ is converted to the current of the adjacent line by the current inverting circuit ₇₀ .
Therefore, the output current i ₀ supplied to the output terminal 39 of the current amplifier 34 becomes i ₃ −i ₄ , and by subtracting the expression from the equation, i ₀ = 2・Vr/R _p・I _c /I _p It is expressed as... This formula is expressed by the voltage-current converter 3
3 has a value of 2/Ro, and the current gain Ai of the current amplifier 34 is I _c /I _p (i ₀ =gmAiVr). Therefore,
The circuit shown in FIG. 7 operates as a floating type variable impedance circuit. The conductance obtained by this circuit depends on the resistance value R _p of the emitter feedback resistor 64.
Since the current ratio of 5 and 66 is configured to be inversely proportional to the resistance value inside the integrated circuit, each deviation cancels out the absolute value deviation of the resistance element inside the integrated circuit and the influence of temperature dependence. can be significantly reduced.

As is clear from the above description, according to the noise reduction circuit according to the present invention, the input terminal 21
Alternatively, the signal from the output terminal 22 is selectively switched by the changeover switch 25 and sent to the variable filter 26, and the variable filter 26 is configured with a floating type variable impedance circuit 31 and a capacitor 32, and the floating type variable impedance circuit 31 The potential difference Vr between the two terminals 35 and 36 is applied to the in-phase and inverting input terminals 41 and 42 of the differential amplifier 40, and the output from the differential amplifier 40 is sent to the adder 22 and input from the input terminal 25. and is sent to the output terminal 24 via the inverting amplifier 23, and a part of the output from the differential amplifier 40 is level detected and used as a control signal, and this control signal is sent to the control terminal of the floating variable impedance circuit 31. 30 to control its impedance.

Therefore, when integrating such a noise reduction circuit, only one capacitor 32 is required as an external component, and since one end of this capacitor 32 is grounded, it is actually Only one pin of the integrated circuit is required for wiring the capacitor, which reduces the number of pins of the integrated circuit and simplifies the wiring work. Furthermore, the conductance of the floating variable impedance circuit 31 cancels out the effects of resistance value deviation and temperature dependence inside the integrated circuit, thereby increasing the accuracy of the absolute values of circuit elements such as resistors. Therefore, it is possible to integrate a noise reduction circuit with high performance and efficiency without being affected by element value deviation or temperature dependence inside the circuit.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and various other configurations are possible for the floating type variable impedance circuit, for example.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional example of a noise reduction circuit, Fig. 2 is a graph showing an example of frequency characteristics of a variable filter used in the noise reduction circuit, and Fig. 3 shows the basic configuration of the present invention. FIG. 4 is a block circuit diagram showing a preferred embodiment of the invention; FIGS.
FIG. 7 is an equivalent circuit diagram of the variable filter 26 shown in the figure, and FIG. 7 is a circuit diagram showing a specific example of the floating type variable impedance circuit 31 of FIG. 21...Input terminal, 22...Adder, 23...Inverting amplifier, 24...Output terminal, 25...Selector switch, 2
6... Variable filter, 31... Floating type variable impedance circuit, 32... Capacitor, 40...
Differential amplifier.

Claims (1)

[Claims] 1 An adder circuit to which an input signal from an input terminal is supplied, an amplifier that inverts and amplifies the addition output from this adder circuit and sends it to an output terminal, and a signal from either the input terminal or the output terminal is connected to one end. The supplied floating type variable impedance circuit, the capacitor inserted and connected between the other end of this variable impedance circuit and the ground, and the voltages from both ends of the floating type variable impedance circuit are in phase and connected to the inverting input terminal. a differential amplifier that applies voltage, and sends the output from the differential amplifier to the adder, detects the output from the differential amplifier, and sends the detected output as a control signal to the floating variable impedance circuit, A noise reduction circuit characterized by controlling the impedance of this variable impedance circuit.