JPS6350855B2 - - Google Patents
Info
- Publication number
- JPS6350855B2 JPS6350855B2 JP58165253A JP16525383A JPS6350855B2 JP S6350855 B2 JPS6350855 B2 JP S6350855B2 JP 58165253 A JP58165253 A JP 58165253A JP 16525383 A JP16525383 A JP 16525383A JP S6350855 B2 JPS6350855 B2 JP S6350855B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- case
- assembly
- filler
- internal terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000011347 resin Substances 0.000 claims description 24
- 229920005989 resin Polymers 0.000 claims description 24
- 239000004065 semiconductor Substances 0.000 claims description 14
- 239000000945 filler Substances 0.000 claims description 13
- 238000007789 sealing Methods 0.000 claims description 11
- 239000008188 pellet Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 2
- 238000000034 method Methods 0.000 description 8
- 239000002245 particle Substances 0.000 description 8
- 238000009415 formwork Methods 0.000 description 6
- 230000017525 heat dissipation Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000007872 degassing Methods 0.000 description 1
- 239000011796 hollow space material Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の樹脂封止の改良に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in resin sealing of semiconductor devices.
従来、半導体装置の、たとえばブリツジ回路の
組立体を樹脂封止する方法としてケースを用いる
場合には第１図および第２図に示すように４枚の
底面が導体である内部端子板１の端部重ね合わせ
部間に半導体ペレツト３をソルダー付けし、各内
部端子板１に外部端子２を溶着又はソルダー付け
したことからなる組立体４を、第２図に示すよう
な絶縁ケース５内に挿入し、当該絶縁ケース５に
樹脂を充填するという方法によつている。なお、
５１はケース５の内部中央部に設けられたねじ止
めのための突出部である。また、他の方法として
半導体装置の動作中に発生する熱の放熱効果を向
上させるため金属製のケースを用いることがある
が、この場合には金属ケース内底面と内部端子板
との間で絶縁をとる必要があるので、その間に絶
縁板を介挿している。 Conventionally, when a case is used as a method for resin-sealing an assembly of a semiconductor device, for example, a bridge circuit, the ends of an internal terminal board 1 whose bottom surface is a conductor as shown in FIGS. 1 and 2 are used. An assembly 4 consisting of a semiconductor pellet 3 soldered between the overlapping parts and an external terminal 2 welded or soldered to each internal terminal board 1 is inserted into an insulating case 5 as shown in FIG. However, the insulation case 5 is filled with resin. In addition,
Reference numeral 51 denotes a protrusion provided at the center of the interior of the case 5 for screw fastening. Another method is to use a metal case to improve the heat dissipation effect of the heat generated during the operation of the semiconductor device, but in this case, there is insulation between the inner bottom of the metal case and the internal terminal board. Since it is necessary to remove the gap, an insulating plate is inserted between them.
しかし、このような方法では、いづれもケース
を用いることが不可欠であるので、ケースに要す
る費用だけコストアツプになる。また、ケースを
用いた構造では放熱効果を向上させようとして
も、ケースの底面の肉厚は１mm程度以下には薄く
できないので、十分な放熱効果は期待できない。
ケースを使用せず、型枠内に組立体を中空保持し
た状態で、当該型枠内に樹脂を充填し、樹脂硬化
後、型枠を取りはずすという方法も行われている
が、放熱性を向上させるためには、内部端子板が
封止樹脂の底面から露出しないで、かつ底面にな
るべく近く位置するようにする必要があるので、
精度の高い中空保持をする必要があり、実際上は
なかなかむずかしい。 However, since it is essential to use a case in each of these methods, the cost increases by the cost required for the case. Furthermore, even if an attempt is made to improve the heat dissipation effect in a structure using a case, the thickness of the bottom surface of the case cannot be reduced to less than about 1 mm, so a sufficient heat dissipation effect cannot be expected.
Another method is to fill the mold with resin while holding the assembly hollow inside the mold without using a case, and then remove the mold after the resin hardens, but this method improves heat dissipation. In order to do this, it is necessary to ensure that the internal terminal board is not exposed from the bottom of the sealing resin and is located as close to the bottom as possible.
It is necessary to hold the hollow space with high precision, which is difficult in practice.
本発明は、半導体装置の従来の樹脂封止方法に
存する上述のような問題点を解決するためになさ
れたものである。 The present invention has been made in order to solve the above-mentioned problems that exist in the conventional resin sealing method for semiconductor devices.
本発明を第３図および第４図に示した実施例に
従つて説明する。６は型枠で、たとえば第２図に
示すケース５とほゞ同一形状からなる底面閉の四
角形状中空体で、その中央部には当該中空体と同
一高さの突出部６１が一体として設けられてい
る。当該型枠６内に、その高さの、たとえば1/3
程度に迄、たとえば大径の粒径のフイラー７１を
混入した樹脂７を充填した後、たとえば第１図に
示すのと、同一の組立体４を挿入する。１は内部
端子板、２は外部端子、３は半導体ペレツトであ
る。しかる後、全体を真空中に入れ、脱泡処理を
行つて上記樹脂７中の気泡を抜いた後、さらに型
枠６の上面迄樹脂を充填し、樹脂硬化後、型枠６
を取りはずすことによつて本発明にかゝる樹脂封
止半導体装置が得られる。一般に樹脂中には石英
粉末等からなるフイラーが混入されているが、そ
の粒径は通常数μm程度のものである。本発明に
おいては少くとも最初に型枠６内に充填する樹脂
７として、たとえば250μ〜300μm程度の大径の粒
径のフイラー７１を混入したものを用いるので、
その後に型枠６内に挿入された組立体４は少くと
も当該フイラー７１の粒径に相当するだけ型枠６
の内側底面から浮き上つた位置に位置することと
なり、しかも、その後の脱泡処理により樹脂７中
の気泡は抜かれるので、各フイラー間に入り込ん
だ樹脂によつて封止は完全に行われる。その後、
型枠６の上面迄、樹脂を充填、硬化後、型枠６を
取りはずすことによつて、内部端子板１と封止樹
脂底面との間にフイラー７１の粒径にほゞ等しい
絶縁層を有する樹脂封止半導体装置が得られる。
なお、最初に充填する樹脂に混入するフイラー７
１の粒径は装置に要求される絶縁耐圧保証値によ
つて具体的場合の必要により適宜設定されるが、
少くとも50μm以上の任意の値に選べばよい。 The present invention will be explained according to the embodiment shown in FIGS. 3 and 4. Reference numeral 6 denotes a formwork, which is, for example, a rectangular hollow body with a closed bottom and having almost the same shape as the case 5 shown in FIG. It is being Within the formwork 6, for example, 1/3 of its height.
After filling the resin 7 with, for example, a filler 71 of large particle size, the same assembly 4 as shown in FIG. 1 is inserted. 1 is an internal terminal board, 2 is an external terminal, and 3 is a semiconductor pellet. After that, the entire body is placed in a vacuum, and after degassing treatment is performed to remove air bubbles from the resin 7, resin is further filled up to the upper surface of the mold 6, and after the resin hardens, the mold 6 is removed.
By removing this, a resin-sealed semiconductor device according to the present invention can be obtained. Generally, a filler made of quartz powder or the like is mixed into the resin, and the particle size of the filler is usually on the order of several μm. In the present invention, at least as the resin 7 initially filled into the mold 6, a filler 71 with a large particle size of about 250 μm to 300 μm is mixed, so
The assembly 4 then inserted into the formwork 6 is at least as large as the size of the filler 71 in the formwork 6.
Since the air bubbles in the resin 7 are removed by the subsequent defoaming process, the sealing is completely performed by the resin that has entered between each filler. after that,
By filling the resin up to the upper surface of the mold 6 and removing the mold 6 after curing, an insulating layer with a particle size approximately equal to the particle size of the filler 71 is formed between the internal terminal board 1 and the bottom surface of the sealing resin. A resin-sealed semiconductor device is obtained.
In addition, the filler 7 mixed into the resin to be filled first
The particle size of 1 is set as appropriate depending on the needs of the specific case depending on the guaranteed dielectric strength value required for the device.
Any value of at least 50 μm or more may be selected.
本発明によれば
(1) 第１図および第２図に示す従来の装置のごと
くケースを用いる必要がないので、それだけ低
コストでの製造が可能となり、
(2) 内部端子板１と封止樹脂底面との間の絶縁層
の厚みを必要に応じて可及的に小とできるの
で、放熱性の向上を計ることができ、
(3) しかも、低耐圧で大電流用の装置の場合は最
初に充填する樹脂中に混入するフイラーの粒径
を小さく、高耐圧又は小電流用の装置の場合に
はそれらに要求される絶縁耐圧保証値により混
入するフイラーの粒径を適宜選択することによ
つて、それぞれの場合に応じて内部端子板と封
止樹脂底面間の絶縁層の厚みを容易に好ましい
ものとすることができ、
(4) さらに又、従来の型枠を用いる方式のごとく
型枠内で組立体を精度よく中空保持する、とい
う複雑な操作は不要であるので、工程がきわめ
て簡易化され、しかも、放熱性および絶縁性の
面から精度のよい樹脂封止半導体装置を実現で
きる。 According to the present invention, (1) there is no need to use a case as in the conventional device shown in FIGS. Since the thickness of the insulating layer between the bottom surface of the resin and the bottom surface of the resin can be made as small as possible, heat dissipation can be improved. The particle size of the filler mixed in the resin to be filled first is made small, and in the case of equipment for high voltage or small current use, the particle size of the filler mixed in is selected appropriately depending on the guaranteed dielectric strength value required for the device. Therefore, the thickness of the insulating layer between the internal terminal board and the bottom surface of the sealing resin can be easily adjusted depending on each case. Since the complicated operation of accurately holding the assembly hollow within the frame is not necessary, the process is extremely simplified, and moreover, it is possible to realize a resin-sealed semiconductor device with high precision in terms of heat dissipation and insulation properties. .
第１図は半導体装置のブリツジ回路組立体の一
例を示す斜視図、第２図は半導体装置組立体の樹
脂封止用ケースの一例を示す斜視図、第３図は本
発明の実施例を示す縦断面図、第４図は第３図に
おける内部端子板とフイラーと型枠の底部との位
置的関係を示す縦断面図である。
１…底面導体の内部端子、２…外部導出端子、
４…組立体、６…型枠、７…封止樹脂、７１…フ
イラー。
FIG. 1 is a perspective view showing an example of a bridge circuit assembly for a semiconductor device, FIG. 2 is a perspective view showing an example of a resin sealing case for a semiconductor device assembly, and FIG. 3 is a perspective view showing an embodiment of the present invention. FIG. 4 is a vertical cross-sectional view showing the positional relationship between the internal terminal plate, the filler, and the bottom of the formwork in FIG. 3. 1... Internal terminal of bottom conductor, 2... External lead-out terminal,
4... Assembly, 6... Formwork, 7... Sealing resin, 71... Filler.
Claims (1)
ツトと、この内部端子板から導出する外部端子板
とを備えた組立体を樹脂封止して半導体装置を製
造するものにおいて、上面が開口した型枠の内底
面と上記組立体の内部端子板下面との間に粒径が
50μm以上のフイラーを混入した樹脂を介在させ
て組立体を樹脂封止した後に、上記型枠を取外す
ことを特徴とする半導体装置の製造方法。1. In manufacturing a semiconductor device by resin-sealing an assembly comprising a semiconductor pellet soldered to an internal terminal board and an external terminal board led out from the internal terminal board, a mold with an open top is used. There is a grain size between the inner bottom surface and the lower surface of the internal terminal plate of the above assembly.
1. A method of manufacturing a semiconductor device, which comprises sealing the assembly with a resin mixed with a filler of 50 μm or more, and then removing the mold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16525383A JPS6057955A (en) | 1983-09-09 | 1983-09-09 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16525383A JPS6057955A (en) | 1983-09-09 | 1983-09-09 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6057955A JPS6057955A (en) | 1985-04-03 |
| JPS6350855B2 true JPS6350855B2 (en) | 1988-10-12 |
Family
ID=15808792
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16525383A Granted JPS6057955A (en) | 1983-09-09 | 1983-09-09 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6057955A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS566458A (en) * | 1979-06-26 | 1981-01-23 | Mitsubishi Electric Corp | Semiconductor device |
| JPS58184745A (en) * | 1982-04-23 | 1983-10-28 | Hitachi Ltd | Semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54181877U (en) * | 1978-06-13 | 1979-12-22 |
-
1983
- 1983-09-09 JP JP16525383A patent/JPS6057955A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS566458A (en) * | 1979-06-26 | 1981-01-23 | Mitsubishi Electric Corp | Semiconductor device |
| JPS58184745A (en) * | 1982-04-23 | 1983-10-28 | Hitachi Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6057955A (en) | 1985-04-03 |
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