JPS6349852A - Simulation system - Google Patents

Abstract

PURPOSE:To perform the effective test and debug of a control program by producing input data based on signal data prescribed independently for each output signal of a device and with correspondence to the time for each signal state. CONSTITUTION:A data generator 16 produces the input data corresponding to the state of each output signal of a device based on the signal data prescribed independently for each output signal of the device and with correspondence to the time for each signal state and while a control program is simulated by a program simulator 10. These produced input data are inputted to the simulator 10. This signal data can be greatly reduced compared with the input data produced from said signal data since no consideration is required for other signals in a production or alteration mode. Thus it is possible to perform the effective test and debug of the control program.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a simulation system for testing and debugging a control program for controlling an apparatus.

[Prior art] Like a robot system, one
In developing a control system for controlling the above devices, testing and debugging of the control program are often performed before the device is completed.

Generally, such testing and debugging is performed using a simulation system implemented by software on a large-scale computer system.

[Problems to be Solved] In such a conventional simulation system, input data indicating the state of each output signal of a device controlled by a control program must be created and input in advance.

Here, since the output signal of the device controlled by the control program has a meaning for each bit and changes its state asynchronously, the control program should be fully tested under the same conditions as the actual device of the target control system. To perform extensive testing and debugging, it is necessary to generate large amounts of input data.

Moreover, it is necessary to input the state information of the device output signal as byte data into the simulation system.
Input data must be created with mutual understanding of multiple output signals.

In addition, it is often necessary to change the operation of a device in order to reproduce an abnormal state of the device, and in that case, not only the output signals related to the change but also other output signals are processed by the byte. It is necessary to change the input data in units.

For these reasons, when testing and debugging control programs using conventional simulation systems, the amount of work required to create and change input data is enormous, reducing the efficiency of testing and debugging, and ultimately reducing the development time of control programs. This has led to an increase in

[Object of the Invention] Therefore, an object of the present invention is to provide a simulation system that facilitates creation and modification of input data and allows efficient testing and debugging of device control programs.

[Means for Solving the Problems] In order to solve the conventional problems and achieve the object, the simulation system according to the present invention includes a program for simulating a control program for controlling an apparatus. The program simulator corresponds to the state of each output signal of the device during the simulated execution of the control program by the program simulator, based on the signal data that independently describes the state of each output signal of the device in association with time. and a data generator that generates input data and inputs it to the program simulator.

[Operation] As described above, in the simulation system of the present invention, it is not necessary to create and provide the input data itself corresponding to the state of each output signal of the device in advance; Input data is generated and input to the program simulator.

Since this signal data independently describes the state of each output signal of the device in association with time, there is no need to consider other signals when creating or changing the signal data. Further, the amount of data of this signal data can be significantly reduced compared to the input data generated based on it.

Therefore, compared to the conventional case where input data itself is prepared, signal data can be created and changed much more easily, and control programs can be tested and debugged more efficiently.

[Example 1] An example of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic diagram showing a simplified functional configuration of the simulation system of the present invention. FIG. 2 is a simplified system configuration diagram of a computer system that implements this simulation system.

First, referring to FIG. 2, the computer system will be described. Reference numeral 1 denotes a memory, to which a central processing unit (CPU) 3 and a channel 4 are connected via a system bus 2. A magnetic disk device 6 is connected to the channel 4 via a disk controller 5 .

Since the functions of each of the above-mentioned parts are standard, their explanation will be omitted.

Next, this simulation system will be explained with reference to FIG. 1, but since this is realized by software on the computer system, FIG. 2 will also be referred to as appropriate in the following description.

/O is a program simulator for performing simulated execution of a control program. This program simulator/
O is realized by software using the hardware resources of the computer system. A program for this purpose is loaded into a specific area of the memory 1 from a certain magnetic disk device 6 and executed by the CPU 3.

12 is a cycle counter. This cycle counter 12 is reset at the start of simulated execution of the control program by the program simulator/O, and thereafter counts up in synchronization with the machine cycle. Therefore, the cycle counter 12 provides information on the simulated execution time (number of cycles) of the control program.

This cycle counter 12 is realized, for example, by an internal register of the CPU 3 or as a software counter on the memory 1.

A program file 14 is a data file of the program simulator/O, and stores a control program for a control system to be tested and debugged. This program file 14 is actually allocated to a certain magnetic disk device 6, and is stored in a specific area of the memory 1 (program simulator/
(data area of O).

A data generator 16 generates input data from a device controlled by a control program and inputs it to the program simulator/O. This data generator 16 also utilizes the hardware resources of the computer system and is realized by software. The program for this purpose is loaded from a certain magnetic disk device 6 into a specific area of the memory 1, and is executed by the CPU.
3.

18 is a signal data file as a data file of the data generator 16. This signal data file 18 stores signal data in which the state of each output signal of the device controlled by the control program is described independently in association with time.

This signal data will be explained with reference to FIG.

In this figure, 20 indicates an output signal of the device. 22 schematically shows signal data describing this output signal 20.

As is clear from the figure, this signal data 22 basically includes information on the state after the change (1 or 0) and its duration (t/-t2, etc.) each time the output signal 20 changes state. ) information written in 1 byte (this is just an example, and the length is arbitrary) is a data structure in which data is arranged in chronological order. The unit of this duration matches the count-up period of the cycle counter 12.

In addition, for a portion where the output signal 20 repeats the same state change pattern, such as the interval from time t4 to time t8, a byte string that similarly describes the state change pattern, a start mark, the number of repetitions, and an end mark are included. The structure is a combination of each byte to simplify the description of the signal data 22 and compress the amount of data.

Signal data with a similar structure is created independently for all output signals of the device, and the signal data file 1
It is stored in 8.

Such signal data can be created or changed without being aware of other output signals. Further, the amount of data of this signal data is significantly smaller than that of data generated based on it, that is, data that conventionally needs to be created in advance. Therefore, the work of creating and modifying signal data is much easier than the work of creating or modifying conventional data.

Referring again to FIG. 1, the data generator 16 will be explained. This data generator 16 is functionally as follows.
Control unit 26, cycle register 28, data control unit 30
, duration cumulative counters 320 to 327 and frequency counters 340 to 347 related to this data control unit 30,
It consists of a synthesis register 38, a data output register 32, and further signal data buffers 400-407.

Buffers, registers, counters, etc. of such data generator 16 are stored in specific storage areas of memory 1 or C
This is realized using internal registers of the PU3.

Furthermore, signal data describing the corresponding output signals of the device is loaded in advance into the signal data buffers 400 to 407 from the signal data file 18 before the start of the simulated execution of the control program.

Next 1. The simulated execution of the control program and the data generation and input operations in this simulation system will be explained.

The program simulator/O reads and interprets the instructions of the control program (loaded into the memory l) word by word and executes the control program in a simulated manner using the hardware resources of the computer system.

During simulated execution, when the program simulator/O detects an input command to the target device from the access address, it passes control to the data generator 16.

Then, the control unit 26 of the data generator 16
After loading the value of the cycle counter 12 of the program simulator/O (information on the simulated execution time up to this point) into the cycle register 28, the data control unit 30 is activated.

The data control unit 30 compares the value of the cycle register 28 with the value of each duration accumulation counter 320-32.

Here, the value of each duration cumulative counter 320 to 327 is the cumulative value of the state duration of each signal data (loaded into the signal data buffers 400 to 40) used for input data generation up to that point. .

As an example, consider the output signal 20 in FIG. 3 and assume that the current time is between time 1/ and time t2. In this case, the value of the duration cumulative counter corresponding to the signal data of the output signal 20 is tl-to +t2-tz =t2
-to.

Now, for example, if the value of the duration cumulative counter 320 is greater than or equal to the value of the cycle counter 28, the data control unit 30 controls the signal data (
1 byte of the signal data buffer (within 40°) is selected as is, and its status information (1 or 0) is sent to the synthesis register 38.
(8-bit register).

Conversely, if the value of the duration cumulative counter 327 is smaller than the value of the cycle counter 28, for example, the data control unit 30
is the next byte (in the signal data buffer 407) of the byte of signal data that was used for data generation just before that.
is selected and its state information is set in the corresponding bit of the synthesis register 38. Also, for the time indicated by the duration information of the newly selected byte of signal data,
The duration cumulative counter 327 is incremented.

Similar processing is performed for other output signals of the device.

In this way, when the state information regarding all output signals of the device is set in the synthesis register 38, the control unit 26
transfers the contents of the synthesis register 38 (8-bit input data generated from signal data) to the data output register 32, and then returns control to the program simulator IO.

Then, the program simulator/O takes in input data from the data output register 32 (the input data is passed to the control program) and continues the simulated execution of the control program.

Here, the operation of the pattern generator 16 regarding a repeating section of the same state change pattern, such as the section from time tq to time t8 of the output signal 20 shown in FIG. 3, will be described.

Note that the following explanation assumes that signal data describing such an output signal exists in the signal data buffer 400.

When the byte of the signal data that is newly selected is a start mark, the data control unit 30 first calculates the number of times that is the next byte of the start mark to the corresponding number counter 34.
Set to 0.

Next, the next byte of the number value byte is selected, and the value of the corresponding duration cumulative counter 320 is increased by the time indicated by the state duration information. Then, the state information is set in the corresponding bit of the synthesis register 38.

Thereafter, when the control program issues a data input command to the device, the duration cumulative counter 32o
If the value is greater than or equal to the value in cycle register 28, the same byte is selected and its state information is set in synthesis register 38.

If the value of the duration accumulation counter 32o is smaller than the value of the cycle register 28, the data control unit 30 selects the next byte and increases the value of the duration accumulation counter 320 by the value of the state duration information. The state information of the selected byte is also set in the synthesis register 38.

Further, if the newly selected byte is an end mark, the data control unit 30 decrements the value of the number counter 340 by 1 and checks whether the value is zero.

If it is not zero, select the next byte of the number byte before the end mark, add the state duration to the duration accumulation counter 32o, and set the state information in the synthesis register 38.

In this way, input data regarding repeated sections of the same state change pattern is generated.

On the other hand, when the value of the number counter 340 is decremented to zero, the section of the repeated state change pattern has ended, and the next byte data is selected.

Although the embodiments 1-- have been described above, the present invention is not limited thereto.

For example, the structure of the signal data is not limited to the one described above, and may be changed as appropriate.

The configuration of the pattern generator can also be modified depending on the structure of signal data. It is also possible to implement the pattern generator partially or entirely using hardware or firmware.

In addition, the present invention can be modified and implemented in various ways without departing from the spirit thereof.

[Effects of the Invention] As explained above, in the simulator system according to the present invention, it is not necessary to create and provide the input data itself corresponding to the state of each output signal of the device in advance; Input data is generated by a data generator and input to the program simulator based on signal data in which the state is independently described in association with time.

Creating and modifying such signal data does not require consideration of other signals when creating or modifying it, and the amount of data can be significantly smaller than the input data that is generated based on it. is much easier than directly creating or changing the input data itself.

Therefore, according to the simulation system of the present invention, testing and debugging of a control program can be performed more efficiently than when using a conventional simulation system.

As described above, according to the present invention, it is possible to solve the problems of conventional simulation systems and realize a simulation system that can efficiently test and debug device control programs.

[Brief explanation of drawings]

FIG. 1 is a schematic block diagram showing a simplified functional configuration of an embodiment of a simulation system according to the present invention, and FIG. 2 is a simplified system configuration diagram of a computer system in which this simulation system is realized. FIG. 3 is an explanatory diagram for explaining an example of an output signal of the device and the structure of signal data describing the output signal. /O...Program simulator, 12...Cycle counter, 14...Program file, 16...
・Data generator, 18...Signal data file.

Claims (4)

[Claims] (1) A program simulator for simulating execution of a control program for controlling a device; and a program simulator for executing a control program for controlling a device; A simulation system comprising: a data generator that generates input data corresponding to the state of each output signal of the device and inputs it to the program simulator during simulated execution of the control program. (2) The data generator includes a storage unit for storing signal data, and a unit for obtaining information on a simulated execution time of the control program from the program simulator when the program simulator simulates execution of an I/O command of the control program to the device. and a means for obtaining, from the signal data, state information of each output signal of the device corresponding to the simulated execution time obtained by this means, and a method for the program simulator by combining the state information of each output signal obtained by this means. 2. The simulation system according to claim 1, further comprising means for synthesizing input data. (3) The signal data for each output signal is time series data in which information indicating the state of the output signal and the duration of that state is sequentially described for each state change. The simulation system according to item 1 or 2. (4) Signal data for each output signal describes information indicating the state of the output signal and the duration of that state sequentially for each state change, and repetition of the same state change pattern is determined by the state change pattern. The simulation system according to claim 1 or 2, characterized in that the simulation system is time series data described by information indicating a state and duration of the event, and information about the number of repetitions.