JPS6348691A - Magnetic bubble memory element - Google Patents

Abstract

PURPOSE:To reduce an access time without increasing the number of detectors by providing plural memory blocks and operating each read/write gate controlling each memory block at each block independently. CONSTITUTION:Bit number from bubble generators G1, G2 of plural memory blocks A, B to head loop write gates S1, S2 is made identical. Moreover, the bit number from the head loop of read gates R1, R2 of the memory blocks A, B to a detector D used in common for each memory block is made identical. Thus, a required memory block is selected to apply read/write thereby reducing the access time.

Description

[Detailed Description of the Invention] [Summary] This is a magnetic bubble memory element, which has a plurality of memory blocks, and has read and write gates that control each memory block and operates independently for each block. , memory information can be read with one detector common to each bronc, making it possible to shorten access time without increasing the number of detectors.

[Industrial application field]

The present invention relates to a magnetic bubble memory element used in a storage device such as an electronic computing device.

The magnetic bubble memory element is made of gadolinium, for example.

A thin film of magnetic garnet is formed by liquid phase epitaxial growth on a non-magnetic substrate such as a single crystal of gallium garnet, and a pattern such as a half disk type or asymmetric chevron type using a soft magnetic thin film such as permalloy is formed on it in matrix. The bubbles generated according to the information from the bubble transfer path are guided to the transfer path, and the information is stored as "1" if there is a bubble in the pattern and "0" if there is no bubble. It is supposed to be done.

[Conventional technology]

Magnetic bubble memory devices generally have a major-minor configuration that includes a large number of minor loops that store information and major lines that write and read information to and from the minor loops. FIG. 2 is a diagram showing an even/odd type magnetic bubble memory device having blocks having a major/minor configuration. In the figure, A is an odd block, B is an even block, G, G are bubble generators, S, S2 are write gates, and RI.

R2 is a gate for reading, 1-1 to 1□ are minor loops, 2.2' is a major line for writing, 3.3' is a major line for reading, and D is A.

This is a detector commonly used in B block. The minor loops 1-I to 1□+1'-1 to 1'-7 are connected to the major lines 2.2' and 3.3' every 2 bits, and are connected to the bubble generator G1 of the A block. Set the bit length of major line 2 for writing to the beginning of minor loop 1-, , to the beginning of n1 minor loop 1. □If the bit length of the major line 3 for reading from I to the detector is m, then that of the B block is n+1. m-1, the A and B blocks are written or read once every two periods of the driving magnetic field, so that the A and B blocks can be written or read alternately. There is.

[Problem that the invention seeks to solve]

Such magnetic bubble memory elements tend to have higher density and larger capacity year by year, and the access time tends to increase accordingly. Therefore, it is being considered to increase the drive frequency or divide the memory blocks and drive them in parallel.

However, there is a limit to the increase in drive frequency from the viewpoint of coil drive voltage and operating margin, and is thought to be up to 300 KHz at most. Furthermore, dividing the memory block is not very preferable because the number of terminals increases extremely. Furthermore, since the detectors are arranged in the lateral direction of the chip (see Part 3), there are problems such as size limitations.

The present invention was created in view of these points, and an object of the present invention is to provide a magnetic bubble memory device that can shorten access time.

[Means for solving problems]

Therefore, in the present invention, in a major-minor type magnetic bubble memory element having the concept of page length in the frontage direction and address in the depth direction, n memory blocks A and B belonging to one detector are set, respectively. Independent writing game 1'S1. S2 and readout gate) RI, Rz are provided, and bubble generators C, , C belonging to the respective memory blocks A and B are provided.
For each memory block A, the number of bits S from Z to the first loop of the corresponding write gate S+, Sz, and the number R of bits from the first loop of each read gate R, , R2 to the commonly used detector. , B have a common number, and the n memory blocks A and B have a common loop number, and the minor loops belonging to the same number in each memory block A and B conceptually form one minor loop in total. By considering it divided into n parts, selecting in advance the memory block to be driven according to the address to be accessed, and driving only the gates belonging to a specific memory block, the access time can be reduced (in short). It is characterized by a ratio of 1/n.

[For production]

Bubble generator G+ of each of the plurality of memory blocks A and B
, Gz to the fortune-telling gate S of each top loop.
By making the number of bits the same from + to Sz, and by making the number of bits from the top loop of each read gate R+ and Rz of each memory block A and B the same to the detector commonly used for each memory block. , a required memory block can be selected for writing and reading, and access time can be shortened.

〔Example〕

FIG. 1 is a diagram showing an embodiment of the present invention. As shown in the figure, this embodiment has n memory blocks (A, B in the figure) each having a minor loop group consisting of a plurality of minor loops of bit length m. 2). However, each minor loop 1-
1-1-. ．． , 1'-+ to 1'-7 do not necessarily have to have the same bit length m. Each memory block A, B is provided with a write major line 2,2' in which bubble generation z5c, c2 exists, and a read major line 3,3' connected to a common detector,
Each minor loop 1-. ~1-n+1'-l~1'-7
are connected to the write major line 2.2' by the write gates S, S2, and the read major line 3.3' are connected to the read gates R1 and R2, respectively. Then, the number of bits S of the major lines 2 and 2' for writing from the bubble generators G, , G, belonging to each memory block A and B to the first loop of the corresponding write gates Sl and S2, and the number of bits S for each of the reading gates )R,,R2
The number R of bits of the reading measurement line 3.3' from the top loop to the commonly used detection ID is set to be a common number for all memory blocks A and B.

In this embodiment configured in this way, the minor loops at the same position in blocks A and B can be considered as one minor loop, so when accessing, blocks A and B are accessed independently. . In other words, when accessing the address of block A,
and R7, and S! when accessing B block. and R2 are selected and operated. Selection of A block and B block can be easily performed using an appropriate selection circuit since it is always known which address will be accessed when accessing. For example, when it is desired to read or write information belonging to block A, only S and R3 need to be operated via the selection circuit.

Therefore, the access time is 1/2 compared to the case where the total number of bits of minor loops at the same position in blocks A and B is set as one minor loop.

Also, the information read out to the measure line is A block, B block
Since the blocks are also the same binod from the readout gates R+ and Rt to the detector, they can be treated in the same way as if they were in contact, and only one of the A and B blocks could be measured. Since it is not read out on the line, both pieces of information will not be read and collide. In the case of writing, the bubble generator GI of block A and the bubble generator G2 of block B are connected in series,
Make sure to write both address information at the same time,
Only the write gate is set to S when it corresponds to A block.
, can be easily distributed and written by operating only S2 when it corresponds to the B file.

The above description is based on the case where the number of blocks is A, 82, but if the number of blocks is n, the access time can be set to □.

〔Effect of the invention〕

As described above, according to the present invention, the access time can be shortened without increasing the number of detectors due to the extremely simple configuration, which is extremely useful in practice.

[Brief explanation of drawings]

1 (21 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a conventional odd-even number method magnetic bubble memory element, and FIG. 3 is a diagram showing a memory block of the magnetic bubble memory element in FIG. 2 divided into two. In Fig. 1, A and B are memory blocks, D is a detector, G, , G are bubble generators, S, , S2 are write gates, R+ , Rz are gates for reading, 1-1 to lI1.1 +-, ~1'-7 are minor loops, 2.2' is a major line for writing, and 3.3' is a major line for reading. This invention Figure 1 shows an embodiment of the following: A, B - m-memory block D-m-detector GLG2-m-bubble generator s, , s2-m-gate for writing 2.2'-11 for writing Major line 3.3'-11 Reading major line Diagram A showing the major/minor configuration of the conventional odd-even system --- Odd block Bm- Even block D --- Detector G, , G2 --- Bubble generator Sl, 52--Writing gate F'l, R2--Reading gate 1-1 to 1-nj O1 to 1'-, ---Minor loop 2.2'--Writing Measure line 3, 3'--1 Measure line for reading (a) Before division (
Figure A-1 for explaining problems caused by division of memory block after b1 division Odd block Bm-Even block Dm-Detector Gm-9 pull generator

Claims (1)

[Claims] 1. In a major-minor type magnetic bubble memory element having the concept of page length in the width direction and address in the depth direction, memory blocks (A, B) belonging to one detector (D)
is set to n, and each memory block (A, B) is provided with an independent write gate (S_1, S_2) and read gate (R_1, R_2), and bubbles belonging to each memory block (A, B) are generated. vessel (G_1, G
_2) to the corresponding write gates (S_1, S_2
) for each memory block (A, B) A common number for all;
Furthermore, the n memory blocks (A, B) have a common loop number, and the minor loops belonging to the same number in each memory block (A, B) conceptually constitute one minor loop. It is possible to reduce the access time to approximately 1/n by assuming that it is divided into n parts, selecting in advance the memory program to be driven according to the address to be accessed, and driving only the gates belonging to a specific memory block. Features a magnetic bubble memory element.