JPS6344178U - - Google Patents
Info
- Publication number
- JPS6344178U JPS6344178U JP13679586U JP13679586U JPS6344178U JP S6344178 U JPS6344178 U JP S6344178U JP 13679586 U JP13679586 U JP 13679586U JP 13679586 U JP13679586 U JP 13679586U JP S6344178 U JPS6344178 U JP S6344178U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- delay circuit
- outputs
- circuit
- smaller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 230000001934 delay Effects 0.000 claims 2
- 230000003287 optical effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
- Geophysics And Detection Of Objects (AREA)
Description
第1図は、この考案の一実施例に係る基板検出
装置を示すブロツク図である。第2図は、第1図
の装置における各信号の例を示す図である。第3
図は、従来の基板検出装置の一例を部分的に示す
図である。
2…基板、4…発光器、5…光、6…受光器、
8…第1の遅延回路、10…第2の遅延回路、1
2…第1の比較回路、14…第2の比較回路、1
6…第3の比較回路、18…状態記憶回路、S0
〜S6…信号、SR…基準値。
FIG. 1 is a block diagram showing a substrate detection device according to an embodiment of this invention. FIG. 2 is a diagram showing an example of each signal in the device of FIG. 1. Third
The figure is a diagram partially showing an example of a conventional substrate detection device. 2... Substrate, 4... Emitter, 5... Light, 6... Light receiver,
8...First delay circuit, 10...Second delay circuit, 1
2...First comparison circuit, 14...Second comparison circuit, 1
6...Third comparison circuit, 18...State storage circuit, S0
~ S6 ...Signal, SR...Reference value.
Claims (1)
減少によつて光路中に基板が存在することを検出
する装置において、受光器からの信号を遅延させ
て出力する第1の遅延回路と、第1の遅延回路か
らの信号を遅延させて出力する第2の遅延回路と
、第1の遅延回路からの信号を所定の基準値と比
較して前者の方が少さい場合に信号を出力する第
1の比較回路と、受光器からの信号と第2の遅延
回路からの信号を比較して前者の方が小さい場合
に信号を出力する第2の比較回路と、受光器から
の信号と第2の遅延回路からの信号を比較して後
者の方が小さい場合に信号を出力する第3の比較
回路と、第1の比較回路から信号が与えられたと
き、第2の遅延回路から信号が与えられていれば
セツト状態になり第3の遅延回路から信号が与え
られていればリセツト状態になる状態記憶回路と
を備えることを特徴とする基板検出装置。 A first delay circuit that delays and outputs a signal from the light receiver in a device that receives light emitted from a light emitter with a light receiver and detects the presence of a substrate in the optical path based on a decrease in the amount of received light; , a second delay circuit that delays and outputs the signal from the first delay circuit, and a signal from the first delay circuit that is compared with a predetermined reference value and outputs a signal if the former is smaller. a first comparison circuit that compares the signal from the photoreceiver with a signal from the second delay circuit and outputs a signal when the former is smaller; a third comparison circuit that compares the signal from the second delay circuit and outputs a signal if the latter is smaller; and a third comparison circuit that outputs a signal when the latter is smaller; 1. A state storage circuit which enters a set state if a signal is given from the third delay circuit and enters a reset state if a signal is given from a third delay circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13679586U JPS6344178U (en) | 1986-09-06 | 1986-09-06 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13679586U JPS6344178U (en) | 1986-09-06 | 1986-09-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6344178U true JPS6344178U (en) | 1988-03-24 |
Family
ID=31040244
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13679586U Pending JPS6344178U (en) | 1986-09-06 | 1986-09-06 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6344178U (en) |
-
1986
- 1986-09-06 JP JP13679586U patent/JPS6344178U/ja active Pending
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