JPS6342613Y2 - - Google Patents
Info
- Publication number
- JPS6342613Y2 JPS6342613Y2 JP5397683U JP5397683U JPS6342613Y2 JP S6342613 Y2 JPS6342613 Y2 JP S6342613Y2 JP 5397683 U JP5397683 U JP 5397683U JP 5397683 U JP5397683 U JP 5397683U JP S6342613 Y2 JPS6342613 Y2 JP S6342613Y2
- Authority
- JP
- Japan
- Prior art keywords
- focus
- voltage
- circuit
- correction
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 7
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
Landscapes
- Details Of Television Scanning (AREA)
Description
【考案の詳細な説明】
〔考案の利用分野〕
本考案は、テレビ受信機等におけるフオーカス
電圧回路に関するものであり、特に画面内の画像
の幾可学的位置や、画面の明るさ変動にともなう
最適フオーカス電圧の変化分を補正するいわゆる
ダイナミツクフオーカス回路を低コストで実現す
る回路手段に関する。[Detailed description of the invention] [Field of application of the invention] The invention relates to a focus voltage circuit in a television receiver, etc., and is particularly concerned with the focus voltage circuit in a television receiver, etc. The present invention relates to circuit means for realizing a so-called dynamic focus circuit for correcting changes in optimal focus voltage at low cost.
第1図は従来のダイナミツクフオーカス回路を
示す回路図である。同図において、1はブラウン
管、2は高圧電極、3はフオーカス電極、4はコ
ンデンサ、5は補正電圧発生回路、6は水平偏向
回路、7はビーム電流供給源、8はフライバツク
トランス、9はフオーカス調整用可変抵抗器、1
0はスクリーン調整用可変抵抗器である。
FIG. 1 is a circuit diagram showing a conventional dynamic focus circuit. In the figure, 1 is a cathode ray tube, 2 is a high voltage electrode, 3 is a focus electrode, 4 is a capacitor, 5 is a correction voltage generation circuit, 6 is a horizontal deflection circuit, 7 is a beam current supply source, 8 is a flyback transformer, and 9 is a Variable resistor for focus adjustment, 1
0 is a variable resistor for adjusting the screen.
第1図において、ブラウン管1の画面の中央部
と周辺部の最適フオーカス電圧差を補正するため
水平出力回路のS字補正容量(図示せず)の両端
に発生する水平同期のパラボウ電圧(第1A図)
を補正電圧発生回路5として示した増幅回路コン
デンサ4を介して、可変抵抗器9からフオーカス
電極3に印加されるフオーカス電圧に重畳したも
ので、図示したようにフオーカス電圧を水平同期
で変調したものをフオーカス電極3に入力するよ
うにしている。本例の場合、コンデンサ4にはフ
オーカス電極の直流電圧として数KV〜10KV程
度の高電圧が印加されるため(1)コンデンサが高価
であること、(2)安全性確保のため実装上の制約が
多くコスト高になるという欠点があつた。 In FIG. 1, a horizontal synchronization parabow voltage (1A figure)
is superimposed on the focus voltage applied from the variable resistor 9 to the focus electrode 3 via the amplifier circuit capacitor 4 shown as the correction voltage generation circuit 5, and the focus voltage is modulated with horizontal synchronization as shown. is input to the focus electrode 3. In this example, a high voltage of several KV to 10 KV is applied to the capacitor 4 as the DC voltage of the focus electrode, so (1) the capacitor is expensive, and (2) there are mounting restrictions to ensure safety. The disadvantage was that there were many problems and the cost was high.
本考案の目的は、従来技術の欠点を解決し、フ
オーカス電圧の補正を低コストで実現できるよう
にしたフオーカス電圧回路を提供することにあ
る。
SUMMARY OF THE INVENTION An object of the present invention is to provide a focus voltage circuit that solves the drawbacks of the prior art and allows focus voltage correction to be realized at low cost.
本考案は、上記従来技術の欠点を解決するた
め、補正電圧印加のための高耐圧コンデンサを削
除し、代つてシールド線を用い、その芯線と外被
側導線間の分布容量を利用して補正電圧をフオー
カス電圧に重畳するようにしたものである。
In order to solve the above drawbacks of the conventional technology, the present invention eliminates the high voltage capacitor for applying correction voltage, uses a shielded wire instead, and uses the distributed capacitance between the core wire and the outer conductor for correction. The voltage is superimposed on the focus voltage.
次に図を参照して本考案の一実施例を説明す
る。第2図は本考案の一実施例を示す回路図であ
る。同図において、11はシールド線である。第
3図は、第2図におけるシールド線11の概略を
示す斜視図である。同図において、21は芯線、
22は絶縁被膜、23は外被側導線、24は外被
である。
Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a circuit diagram showing an embodiment of the present invention. In the figure, 11 is a shielded wire. FIG. 3 is a perspective view schematically showing the shield wire 11 in FIG. 2. In the same figure, 21 is a core wire;
22 is an insulating coating, 23 is a conductor on the outer covering side, and 24 is an outer covering.
第2図、第3図を参照する。 Please refer to FIGS. 2 and 3.
補正電圧発生回路5からの補正電圧は、シール
ド線11の外被側導線23に接続され、フオーカ
ス電圧はフオーカス調整用可変抵抗9から、芯線
21を介してフオーカス電極3に供給される。 The correction voltage from the correction voltage generation circuit 5 is connected to the outer conductor 23 of the shield wire 11, and the focus voltage is supplied from the focus adjustment variable resistor 9 to the focus electrode 3 via the core wire 21.
フオーカス電極3のインピーダンスは可変抵抗
9,10により決定されるが、通常数10MΩ程度
のハイインピーダンスを使用しており、外被側導
線23と芯線21との間の結合容量として数
10PFの容量を確保することにより、充分低域信
号まで補正電圧をフオーカス電圧に重畳しうる。 The impedance of the focus electrode 3 is determined by the variable resistors 9 and 10, but usually a high impedance of about several tens of MΩ is used, and the coupling capacitance between the outer conductor 23 and the core wire 21 is
By securing a capacity of 10PF, it is possible to superimpose the correction voltage on the focus voltage up to a sufficiently low frequency signal.
以上述べたように本考案によれば、補正電圧印
加のための高耐圧コンデンサを削除し、廉価なシ
ールド線をその代りに使用できるため、フオーカ
ス補正電圧重畳を低コストで実現できるという利
点がある。
As described above, the present invention has the advantage that focus correction voltage superimposition can be realized at low cost because a high-withstand voltage capacitor for applying correction voltage can be removed and an inexpensive shielded wire can be used instead. .
尚本実施例ではフオーカス補正電圧として、画
面の水平方向位置に応じた補正回路の例について
述べたが、補正信号源としてビーム電流検出電
圧、映像信号他種々の応用に使用しうることは述
べるまでもない。 In this embodiment, an example of a correction circuit according to the horizontal position of the screen was described as a focus correction voltage, but it goes without saying that it can be used as a correction signal source for a beam current detection voltage, a video signal, and various other applications. Nor.
第1図は従来のダイナミツクフオーカス回路を
示す回路図、第1A図はS字補正容量の両端に発
生する水平周期のパラボラ電圧の波形図、第2図
は本考案の一実施例を示す回路図、第3図は第2
図におけるシールド線11の斜視図、である。
符号説明、1…ブラウン管、2…高圧電極、3
…フオーカス電極、4…コンデンサ、5…補正電
圧発生回路、6…水平偏向回路、7…ビーム電流
供給源、8…フライバツクトランス、9…フオー
カス調整VR、10…スクリーン調整VR、11
…シールド線、21…芯線、22…絶縁被膜、2
3…外被側導線、24…外被。
Fig. 1 is a circuit diagram showing a conventional dynamic focus circuit, Fig. 1A is a waveform diagram of a horizontally periodic parabolic voltage generated across an S-shaped correction capacitor, and Fig. 2 shows an embodiment of the present invention. Circuit diagram, Figure 3 is the second
It is a perspective view of the shield wire 11 in a figure. Symbol explanation, 1... Braun tube, 2... High voltage electrode, 3
...Focus electrode, 4...Capacitor, 5...Correction voltage generation circuit, 6...Horizontal deflection circuit, 7...Beam current supply source, 8...Flyback transformer, 9...Focus adjustment VR, 10...Screen adjustment VR, 11
...shield wire, 21 ... core wire, 22 ... insulation coating, 2
3...Outer cover side conductor, 24...Outer cover.
Claims (1)
を介してフオーカス電圧を供給するようにしたテ
レビ受信機等におけるフオーカス電圧回路におい
て、外被側導線にフオーカス補正電圧を供給し、
外被と芯線間の結合容量を介して該フオーカス補
正電圧を前記フオーカス電圧に重畳するようにし
たことを特徴とするテレビ受信機等におけるフオ
ーカス電圧回路。 In a focus voltage circuit in a television receiver, etc., which supplies a focus voltage through the core side conductor of a shielded wire consisting of a core wire and an outer sheath, a focus correction voltage is supplied to the sheath side conductor,
1. A focus voltage circuit for a television receiver or the like, characterized in that the focus correction voltage is superimposed on the focus voltage via a coupling capacitance between a jacket and a core wire.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5397683U JPS59161768U (en) | 1983-04-13 | 1983-04-13 | Focus voltage circuit in TV receivers, etc. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5397683U JPS59161768U (en) | 1983-04-13 | 1983-04-13 | Focus voltage circuit in TV receivers, etc. |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59161768U JPS59161768U (en) | 1984-10-30 |
JPS6342613Y2 true JPS6342613Y2 (en) | 1988-11-08 |
Family
ID=30184328
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5397683U Granted JPS59161768U (en) | 1983-04-13 | 1983-04-13 | Focus voltage circuit in TV receivers, etc. |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59161768U (en) |
-
1983
- 1983-04-13 JP JP5397683U patent/JPS59161768U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59161768U (en) | 1984-10-30 |
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