JPS6342239A - Faulty part deciding system - Google Patents

Faulty part deciding system

Info

Publication number
JPS6342239A
JPS6342239A JP18577486A JP18577486A JPS6342239A JP S6342239 A JPS6342239 A JP S6342239A JP 18577486 A JP18577486 A JP 18577486A JP 18577486 A JP18577486 A JP 18577486A JP S6342239 A JPS6342239 A JP S6342239A
Authority
JP
Japan
Prior art keywords
flicker
circuit
state detecting
state
pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18577486A
Other languages
Japanese (ja)
Inventor
Masataka Shimomura
下村 正孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18577486A priority Critical patent/JPS6342239A/en
Publication of JPS6342239A publication Critical patent/JPS6342239A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To decide a faulty part by adding a flicker signal as part of an input data, to a digital transmitter provided with its own station loop back function. CONSTITUTION:A flicker signal outputted from a flicker signal generating circuit 6 is transmitted by a multiplexing circuit 2 and a demultiplexing circuit 3, inputted to a flicker state detecting circuit 9, and also, transmitted by a multiplexing circuit 4 and a demultiplexing circuit 5, and inputted to a flicker state detecting circuit 11. A flicker signal generating circuit 12, a flicker state detecting circuit 15, and a flicker state detecting circuit 17 correspond to the flicker signal generating circuit 6, the flicker state detecting circuit 9, and the flicker state detecting circuit 11, respectively. In such a state, the results of detection from the flicker state detecting circuits 11, 15 are compared with the other station connecting state and its own station loop back testing state. In such a way, where a faulty part exists can be deicided.

Description

【発明の詳細な説明】 (産業上の利用分野〕 本発明は機器の障害判定方式に関し、特にディジタル伝
送装置の障害判定方式に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a failure determination method for equipment, and particularly to a failure determination method for digital transmission equipment.

(従来の技術) 従来、この檜のディジタル伝送装置では、電源系の障害
および同期信号検出手段による同期系の障害に対して障
害部位が判定されていた。
(Prior Art) Conventionally, in this Hinoki digital transmission device, a failure part has been determined for a failure in the power supply system and a failure in the synchronization system by means of a synchronization signal detection means.

(発明が解決しようとする問題点〕 上述した従来のディジタル伝送装置の障害部位判定方式
では、同期信号検出手段による同期系障害の判定はでき
たが、送信側マルチプレクサ回路または受信側デマルチ
プレクサ回路の障害に起因するデータの誤りは、障害と
して判定することが困難であるばかりか、送信側マルチ
プレクサ回路の障害と受信側デマルチプレクサ回路の障
害との区別が困鐙であった。
(Problems to be Solved by the Invention) In the above-mentioned conventional failure location determination method of digital transmission equipment, a synchronization system failure can be determined by the synchronization signal detection means, but it is possible to determine a synchronization system failure by using the synchronization signal detection means. Not only is it difficult to judge data errors caused by a fault as a fault, but it is also difficult to distinguish between a fault in the multiplexer circuit on the transmitting side and a fault in the demultiplexer circuit on the receiving side.

本発明の目的は、自局および相手局のディジタル伝送装
置に対して、送信部入力にフリッカ信号を供給し、相手
局から伝送されてきたフリッカ信号を受信部の出力から
送信部の入力へ折返し、そのフリッカ信号のフリッカ動
作を検出することによって上記欠点金除去し、送信側回
路の障害と受信側回路の障害とを区別することができる
よつ:f−:々成り、カー1÷+! 1K 7警ニ一位
判定−ノ7式を失供することにあイ)。
An object of the present invention is to supply a flicker signal to the input of the transmitter of the digital transmission equipment of the own station and the other station, and return the flicker signal transmitted from the other station from the output of the receiver to the input of the transmitter. By detecting the flicker operation of the flicker signal, it is possible to eliminate the above drawback and distinguish between a fault in the transmitting circuit and a fault in the receiving circuit. 1K 7th police officer 2 first place judgment - No. 7 type was surrendered).

(間:m点を解炊すイ)A−めの−f’ I”++: 
);)−゛発明にJ:る駒゛、q部位刊定万武は一’z
=↑の端局と、−χ・jのフリッカi号龜牛千Bと、−
5c−↑のフリッカ状態検出手段と金l1.備!7、−
]−組一対ので18局を含むディジゲル伝送摸苛の谷部
6rのI散害−♀容易ンこ1′1」別できる」、つにや
み成し/ξもの丁あ2)。
(Pause: Uncook point m) A-f' I”++:
);) - ゛Invention J: Rukoma゛, q part publication Jomanbu is one'z
= ↑'s terminal, -χ・j's flicker i, Kagyu SenB, -
5c-↑ flicker state detection means and gold l1. Be prepared! 7, -
] - I scatter the valley part 6r of the Digigel transmission model containing 18 stations because it is a pair of sets - ♀Easy to separate 1'1', one pair and 18 stations.

−1付の端局−1,ぞ才[、ぞn−に:マルチプレタザ
回路およびデマルブ゛プレクザ回l#i企僧1.7、伝
送路により伝送データの自局1斤声1〜ができるもので
ある。
Terminal station with -1 -1, zo n-: Multiplexer circuit and demultiplexer circuit l #i schemer 1.7, capable of transmitting data from one station to the other using a transmission line It is.

一4工のフリッカ信+i発生手段0・61八一対の端局
のぞit、ぞnrフリッカ信−号を伝jペデータの一部
として付加する丸めのものであ2)。
14 Flicker signals + i generating means 0.61 It is a rounded type that adds the flicker signals of 0.61 and 81 pairs of terminal stations as part of the transmission data 2).

一対のフリッカ状、優検用手段は、一対の端局の−f:
′ノ〕2ぞノ1.でフリッカ14号のイf−了Ei↑央
出するA−めのものである。
A pair of flicker-like, excellent test means are -f of a pair of terminal stations:
'ノ]2zono1. This is the A-th one from the center of Flicker No. 14.

(実 施 例) 次に、不発す[1について図面全だ1世1)れ説明する
(Example) Next, an explanation will be given of the complete drawings for [1] when a misfire occurs.

第1図は、フト発明ζ・CJ罫)障害部位判定方式を実
母1−f霧〕−実施例金示すノ゛ト2ツク図“Q4うン
)。
FIG. 1 is a 2-note diagram illustrating the faulty part determination method of the invention ζ/CJ.

第1IツIUクツ・い−〔、l(づ、既イ↑:のfイジ
タル伝jζ装置、2 、4はそズ1そfL ;、ζ侶側
の1ルチグレクザ回路、′3゜3)(・、j、そズ1ぞ
着、営1i′ii′fllllのf−γルチブト・り4
j、回路?、(jい1ニジは子ズ1.ぞれフリい仁りイ
Ef ””j方、主回路、  9.   Xi   、
  15. 17  は−什〕1.−ぞ=fし:ノリツ
カ状聾恢L1j回路であ2)。
1st Itsu IU shoes [, l (zu, already i ↑: f digital transmission j ζ device, 2, 4 are so 1 so f L;, 1 multigrax circuit on the ζ side, '3゜3) (・、j、Sozu 1st arrival、Business 1i'ii'fllll's f-γ multibutton ri 4
j, circuit? , (J side is the child 1. Each one is free, Ef ””J side, main circuit, 9. Xi,
15. 17 は- 〕1. -zo=fshi: Noritsuka-like deafness L1j circuit 2).

ディジタル伝送P、1夕lは、−・1ル子グ1/クザ回
路2からのIfj力侶杉全ン°τルグブl/ 99 +
!+1路【jへ入力するか、また(・」、マルチグ[/
フサ回路・1の出力伝弓・をディルジープ1/クザ回)
l暦ト\人カし5てお9、CnJCJンツ(自L4」斤
a l−’ at 、’4J v乙エイ)自に1゜診断
dff可能である。
Digital transmission P, 1 time l is - 1 lug 1/Ifj from Kuza circuit 2 °τ lug l/99 +
! +1 path [input to j or (・”, multig[/
Fusa circuit/1 output transmission bow/Diljeep 1/Kuza times)
It is possible to make a 1° diagnosis dff for yourself in the calendar year \ person number 5 and 9, CnJCJ (self L4' 斤a l-' at, '4J v otoei).

ノリツカ信−;づ°も上回1)渚fii、i:、イ1ト
シ纒7−1・・・、−フリッカ(Jり全出力する。、1
j号線7′土のノリッカイイじ−は、マルチプl/り多
′回跪・2おj:びデマルナプ1/クダ°回路;31/
こXつて伝送さメ17、IM号線s −、hに送t11
さi’Lる。情づ巌δ十、の11号は、ノリツカ状態検
出回j!?1i29訃よびマルチプ1/グサ回路4へ入
力される。信号@8上の信ち(伐、マルチプl/クサ回
路4およびデマルチプレクザ回路5に↓つて伝送さit
、信号線10上に送出される。フリッカ信号発生回路1
2.信号線13、信号線14、フリッカ状態検出回路1
5、信号線16、フリッカ状態検出回路17は、千ズ1
−ぞ〕14フリツ力信号発生回路6、信号線7、信号線
8、フリッカ状態検出回路9.11号線101、フリッ
カ状聾瑛出回路11に対応する。
Noritsuka Shin-;zu° also exceeds 1) Nagisa fii, i:, I1 Toshiki 7-1..., - Flicker (J's full output., 1
Route J 7' soil norikkaiji- is multiple l/ri multi' times kneeling, 2 oj: and demarunapu 1/kuda degree circuit; 31/
Transmit this to mail 17, IM line s -, h t11
I'm sorry. The 11th issue of Jozu Iwao δ1 is the Noritsuka state detection episode! ? It is input to the 1i29 output and multiplex 1/gusa circuits 4. The signal on the signal @8 is transmitted via the multiplexer circuit 4 and the demultiplexer circuit 5.
, is sent out on signal line 10. Flicker signal generation circuit 1
2. Signal line 13, signal line 14, flicker state detection circuit 1
5. The signal line 16 and flicker state detection circuit 17 are
14 corresponds to the flicker force signal generation circuit 6, signal line 7, signal line 8, flicker state detection circuit 9, 11 line 101, and flicker-like deafness output circuit 11.

障害ハターンと、、−T:″のときのフリッカ状態の検
出結果とは1、第2図に示すJ:9iCZる。
The detection result of the flicker state when the fault pattern is -T:'' is 1.J:9iCZ shown in FIG.

第2図において、相手局の接続状態とは通常の対向接続
状態であり、自局折返し状態とは自己診断の目的で行う
自局折返し試験状態である。
In FIG. 2, the connection state of the other station is a normal opposite connection state, and the local station return state is a local station return test state performed for the purpose of self-diagnosis.

すなわち、フリッカ状態検出回路11゜15からの横出
結果紮、相手局接続状態と自局折返し試験状態とで比奴
することに!、9、障害部位がマルチプ1./クサ回路
2、デマルチプレフサ回路3%マルチプレクサ回路4%
デマルチプ1/クサ回路5のうちのいノ′庇であるのか
を判定、ζ゛る。パ、とが可能上゛あ、?−1 (発明の効!、i11.) 1ン土説明し7’lTh J:つに本発明し15、自局
折返しく幾11ヒを具備し乃=fAジタル伝送装置に対
してフリッカ債弓ヲご入力f−夕の一部と・して付加し
、出力側θ7:にいては十配信号金折返し2てj、べ信
側へ戻し、フリッカ動作全検出することに、、l:l)
、ディジタル伝送装置の障害を見逃・ずことなく、且つ
、真の障害部位紫’+”u定することかT:ぎると云う
効果がある。
In other words, the side-by-side results from the flicker state detection circuits 11 and 15 are compared with the connection state of the other station and the return test state of the own station! , 9. Fault location is multiple 1. /multiplexer circuit 2, demultiplexer circuit 3% multiplexer circuit 4%
It is determined whether it is the inlet of the demultiplier 1/comb circuit 5, and ζ is performed. Is that possible? -1 (Efficacy of the invention!, i11.) 1st explanation 7'lTh It is added as a part of the input f-even, and on the output side θ7:, the 10th distribution signal is returned to the receiver side, and the flicker operation is fully detected, l:l. )
This has the effect of being able to identify the true fault location without overlooking any faults in the digital transmission equipment.

ま/(−、フリッカ搭シタ全うインモr、夕として安水
)′る仁とに:、!:す、表示状:lil樋が点滅f、
−’ ”Cいるので、正常羽作〜Cあるとラズつ+i証
としても使用−「きると云う効、ψミがある。
Ma/(-, Flicka Toshita Full Inmor, Yasumi Asui) 'Rujin Toni:,! :su, display message: lil gutter flashing f,
-' ``Since there is C, normal feathering ~ If there is C, it is also used as a proof of raztsu + i - ``There is an effect called ``kiruto'', ψ mi.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図υ72、不情明に、J:6障害部立同定方式の一
実施例金示すブロック図である。 第2南は、障害判定衣の一例金示す説明図゛「゛ある。 1・・・ディジタル伝送装置 2,4・・・マルチプレクサ回路 3.5・・・デマルチプレクサ回路 6.12・・・フリッカ信号発生回路 9.11,15.17・・・フリッカ状態構出回路
FIG. 1 υ72 is a block diagram illustrating an embodiment of the J:6 fault identification method. The second south is an explanatory diagram showing an example of failure determination. 1...Digital transmission equipment 2, 4...Multiplexer circuit 3.5...Demultiplexer circuit 6.12...Flicker Signal generation circuits 9.11, 15.17...flicker state configuration circuits

Claims (1)

【特許請求の範囲】[Claims] それぞれにマルチプレクサ回路およびデマルチプレクサ
回路を有して伝送路により伝送データの自局折返しがで
きる一対の端局と、前記一対の端局のそれぞれでフリッ
カ信号を前記伝送データの一部として付加するための一
対のフリッカ信号発生手段と、前記一対の端局のそれぞ
れで前記フリッカ信号の存在を検出するための一対のフ
リッカ状態検出手段とを具備し、前記一対の端局を含む
ディジタル伝送装置の各部位の障害を判別できるように
構成したことを特徴とする障害部位判定方式。
A pair of terminal stations each having a multiplexer circuit and a demultiplexer circuit and capable of returning transmitted data to the own station via a transmission line, and a flicker signal being added as part of the transmitted data at each of the pair of terminal stations. each of the digital transmission apparatuses including a pair of flicker signal generating means and a pair of flicker state detection means for detecting the presence of the flicker signal in each of the pair of terminal stations; A failure part determination method characterized in that it is configured to be able to determine a failure in a part.
JP18577486A 1986-08-07 1986-08-07 Faulty part deciding system Pending JPS6342239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18577486A JPS6342239A (en) 1986-08-07 1986-08-07 Faulty part deciding system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18577486A JPS6342239A (en) 1986-08-07 1986-08-07 Faulty part deciding system

Publications (1)

Publication Number Publication Date
JPS6342239A true JPS6342239A (en) 1988-02-23

Family

ID=16176656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18577486A Pending JPS6342239A (en) 1986-08-07 1986-08-07 Faulty part deciding system

Country Status (1)

Country Link
JP (1) JPS6342239A (en)

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