JPS6341977U - - Google Patents
Info
- Publication number
- JPS6341977U JPS6341977U JP13422586U JP13422586U JPS6341977U JP S6341977 U JPS6341977 U JP S6341977U JP 13422586 U JP13422586 U JP 13422586U JP 13422586 U JP13422586 U JP 13422586U JP S6341977 U JPS6341977 U JP S6341977U
- Authority
- JP
- Japan
- Prior art keywords
- amplification circuit
- ground
- video
- signal
- signal line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims description 11
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
Landscapes
- Picture Signal Circuits (AREA)
Description
第２図は従来の映像増幅回路の一例を示す構成
図、第１図は本考案による映像増幅回路の一実施
例を示す構成図である。
１：バツフア回路、２：電圧増幅回路、２ａ，
２ｈ：カプリングコンデンサ、２ｄ：電圧増幅ト
ランジスタ、３：電力増幅回路、４：整合用終端
抵抗、５：カメラケーブル、６：フローテイング
抵抗。
FIG. 2 is a block diagram showing an example of a conventional video amplification circuit, and FIG. 1 is a block diagram showing an embodiment of the video amplification circuit according to the present invention. 1: Buffer circuit, 2: Voltage amplification circuit, 2a,
2h: coupling capacitor, 2d: voltage amplification transistor, 3: power amplification circuit, 4: matching termination resistor, 5: camera cable, 6: floating resistor.
Claims (1)
ンスの低いバツフア回路と、入力映像信号を所定
の電圧値に増幅する電圧増幅回路と、該信号を出
力するための電力増幅回路で構成された映像増幅
回路において、上記バツフア回路への入力信号の
アース側を該映像増幅回路のアースラインと接続
しないいわゆるフローテイングアースにしてアー
ス信号ラインを形成し上記電圧増幅回路の映像信
号の入力端と極性の異なる入力端に供給し、映像
信号ラインとアース信号ラインに含まれる同位相
信号成分のみを除去することを特徴とする映像増
幅回路。 A video amplification circuit comprising a buffer circuit with high input impedance and low output impedance, a voltage amplification circuit for amplifying an input video signal to a predetermined voltage value, and a power amplification circuit for outputting the signal. The ground side of the input signal to the circuit is set to a so-called floating ground, which is not connected to the ground line of the video amplification circuit, to form a ground signal line, and the ground signal line is supplied to the input end of the voltage amplification circuit whose polarity is different from that of the video signal input end. , a video amplification circuit characterized in that it removes only in-phase signal components contained in a video signal line and a ground signal line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13422586U JPS6341977U (en) | 1986-09-03 | 1986-09-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13422586U JPS6341977U (en) | 1986-09-03 | 1986-09-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6341977U true JPS6341977U (en) | 1988-03-19 |
Family
ID=31035272
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13422586U Pending JPS6341977U (en) | 1986-09-03 | 1986-09-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6341977U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0267960U (en) * | 1988-11-11 | 1990-05-23 |
-
1986
- 1986-09-03 JP JP13422586U patent/JPS6341977U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0267960U (en) * | 1988-11-11 | 1990-05-23 |
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