JPS6341926A - High speed inference system - Google Patents

Abstract

PURPOSE:To speed up inference by providing a state flag set that stores effectiveness and failure of a rule in a bit pattern, updating the state flag set with alteration of a fact base, and finding a conflict set that makes the rule effective by examining updated state flag set. CONSTITUTION:A state flag set D stores effectiveness or failure of a premise part of each rule of rule base A for present fact base B in a bit pattern. It is supposed that an inference mechanism C executes a rule, and the fact base is changed thereby. A collation updating means E is started, and the fact related to alteration is collated with conditional factors of the rule premise part and bits indicating effectiveness (concordance with the fact) or failure (discordance with the fact) are written in the state flag set D. A conflict set preparing means F is started, and bit patterns of effectiveness or failure of each rule of the state flag set are examined, and the rule is effective, the rule is put in the conflict set.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a high-speed inference method for production systems, and can be used in the field of artificial intelligence such as expert systems.

[Overview of i1Jl] This invention is a state analogue storage system that stores the establishment or failure of each rule as a bit pattern in a so-called high-speed inference method for a production system that performs inference by applying production rules to a fact base. By preparing , updating the state flag set according to changes in the fact base, and inspecting the updated state flag set, we are looking for a conflict set that holds the rule.

A conflict set, which is a collection of execution rule candidates, can be completed quickly, and inference can be speeded up.

[Prior Art] A system called a production system or a rule-based system (hereinafter collectively referred to as the production system) has been developed as one of the useful tools for implementing extractive knowledge and moat skills on a computer. There is.

-The production system says, ``What if...
A set of rules (referred to as a rule base or simply a production rule) consisting of a premise part and an action part such as "If so, then..." and a set of facts (facts, situations, assertions) (facts). base) and an inference mechanism that applies rules to facts. The middle stage of reasoning is called the cognitive-behavioral cycle, where products,
It consists of matching, selection, and execution of rules.

I: The reason for hindering the speeding up of the WE theory is the matching processing speed, and for this reason, the i-knee 5-speed method is also known. Typical speed-up methods (e.g. RETEMATCH
In ER), in order to facilitate the evaluation of the antecedent part of a rule due to changes in the fact base, common parts (22 conditions) of the prerequisite part are extracted and linked to form a network. Verification is performed by sending fact-based change information (called a token) to the network.

[Problems to be solved by the invention] The disadvantage of the above-mentioned speed-up method is that although it is theoretically possible to send change information to the network in parallel, computers generally can only process it sequentially, so change information arrives quickly. The problem is that the judgment of conditions and the control of the path of information flow inevitably become sequential processing.

This invention was made to solve these problems, and its object is to further increase the speed of inference by making the most of the waiting characteristics of current sequential electronic computers.

[Means for Solving the Problems] In the machine running blow diagram of the present invention shown in FIG. 1, A is a rule base that stores a set of rules, and B is a fact that stores a set of facts. base, C is an inference mechanism that executes inference, D is a state flag set that stores the matching results of the antecedents of rules in bit patterns for each rule, and E
is a verification update means that, when the fact base is changed, compares the fact related to the change with the condition element of the prerequisite part of rule base A and writes a bit indicating the verification result to the status flag set, F is a status flag set 2)D This is a conflict set creation means that creates a conflict set according to the contents of the conflict set.

[Operation] Now, in the configuration of FIG. 1, the status flag set D is as follows.
It is assumed that whether or not each rule Iij clause of rule base A holds true for current fact base B is stored as a bit pattern.

Now, assume that inference mechanism C executes a certain rule, and as a result, fact base B is changed.

In response, the verification/updating means E is activated, the fact related to the change is verified against the condition element of the rule premise part, and the bit indicating whether the condition element is met (matches the fact) or fails (does not match the fact) is flagged as a status flag. I am thrown into set D.

When the update of the state flag set D is completed, the conflict set creation means F is started, and the bit pattern of whether each rule of the state flag set D is established or not is checked, and if the rule is established, the rule is set as a conflict set. Put it in.

In this way, in unreleased IJI, as in the conventional high-speed method, whether or not one rule holds is determined by checking the input Ll node (root note) on the network.
From there, sequentially towards exit 7-do (terminal note),
This is not done by executing conditional judgments and transmitting information for each element, but by updating and inspecting the bit pattern of the status y3 flag set, which is a process suitable for sequential computers. So it becomes very fast.

In the status flag set D, the item number corresponds to the number of the production rule, the bit number of each item [1 corresponds to the condition element number of the rule, and the length of the - item corresponds to the information processing time of the sequential computer. It is advantageous to configure the table with words. In this case, the validity of one rule can be checked in one machine cycle.

[Example] An example of this invention will be described below with reference to the drawings.
do.

:iS1 Figure 1 shows the overall hardware configuration of this embodiment.A program for the inference configuration of the production system is stored in the internal memory and executed by the CPU2. The rule base and fact base of the production system are stored in an external memory 3 such as a /\-totist, and various command inputs are performed from the six-manpower device 4, which is loaded into the internal memory 1 by the CPU 2 via a load command. Then, necessary information is outputted to the output device 5 as appropriate.

Rule base 2 of the production system is shown in Figure 3.
As shown by reference number 31, IF (premise part, LH3) and T
It is a collection of rules consisting of HEN (behavior department, RH5). An example of individual rules stored in the rule base is shown in FIG. Three rules are illustrated,
A 0 condition element, in which a condition element is shown in parentheses, is composed of an object name (class name) followed by an attribute name and a value string. Here, the conditional elements are connected with each other by AND, and unless all the conditional elements are satisfied, the rule as a whole does not hold.

Note that although there are cases where they are combined using an OR condition, this can be solved by providing a separate rule, so it does not affect the problem solving ability.

In addition, in this embodiment, although a limit is placed on the number of condition elements required for one rule (the maximum is word - 1), by taking the same measures for this element, the number of condition elements can be effectively reduced. It is equivalent to having no limit, and does not affect the problem solving f nearness.

Figure 5 shows the fact base 5 of the production system.
1 is exemplified. The fact-based element is in a format that can be matched with the condition element of the production rule, and therefore consists of an object name followed by an attribute name and value pair sequence. Furthermore, in this embodiment, in order to reduce the number of times of matching, a pointer section is provided for each of the seven (7) ff elements, and this pointer section stores the matching rule number and its condition element number. For example, (01, A
In the pointer section of the fact element of I, Vl), a pair of rule number 11 and condition element number 1 and a pair of rule number 2 and condition element number 2 are stored. Action a'l in Figure 4
l (THEN) (fMODI FY starts with fMODI FY, which means a fact-based change. For example, MOD I FY (01, A3, V3) is "Object name is 0l-tl' Attribute name is For the fact element of A3, set its value to V3.'' This is a poor idea.

In addition to these, there are MAKE, DELETE, and others, but for the sake of explanation, only MODIFY is used.

The configuration of the status flag set 32, which is an essential element of this embodiment, is shown in FIG. The length of is the information processing unit (word),
The final bit is a status bit that indicates whether the rule is used or not. Therefore, the maximum number of condition elements that one rule can have is (word-1). For example, the bit in the first row and first column is shown as "1", which means that the condition Wall of rule l is not satisfied. This indicates that there is a fact element that matches this condition element.

Next, the operation of the embodiment configured as above will be described in the seventh section.
This will be explained with reference to FIGS.

Figure 8 shows the main flow, which executes inference execution by loading the rule base and initializing the state flag set (71), loading the fact base and inserting i'i into the state flag set (72). Preparations for this are completed. Putting the cognitive-behavioral cycle into practice and implementing the 1ft theory 7
3), the inference ends when there are no more successful rules (74).

In the initialization of the two legs (71), all bits of the state flag set are set to zero, as shown in 61 in Fig. 7 and 81 in Fig. 9, and then the rule base is read and the condition is The upper bits are set to 1 by the number of elements (82), that is, it is assumed that conditions W and tE are both negative. This result is shown in No. 7+4, 62.

Then, when reading the fact base (72), the fact base pointer is used to flash together the individual elements of the fact base with the individual condition requirements of each rule, and the result is set in the state flag. In this example,
The status flag set is as shown in the 714th number 63 (because FIG. 5 is the initial status of the fact base).

The flowchart of the inference that continues is shown in 1O1-4.
It is reduced to 91 to 95 are the process of creating conflict rules (conflict cent).
In order to separate the small and current rules of the current number initialized to I (91), refer to the state 5n+ flag set, and only if the bit pattern is all O, enter the conflicting rule. 0 record (92.93), otherwise increment the current rule scent (94), repeat until all rules are complete (95)
), 1-, 92 can be realized in machine language by using the subtraction instruction found in the machine language of most Q machines.

Once the conflict set is completed, in step 96, one rule is selected according to a certain evaluation method (for example, MEA (first stage objective analysis) with the highest number of conditions as a measure) and its action part is executed. (97), At this time, in order to prevent executed rule 1 from being executed twice in the same state, the status be/ ) for this rule in the status flag set is set to "l". In this example, rule 3 is established. Therefore, the action part MODI of rule 3 (63 in Figure 2)
FY (02, AI, V2) is executed, Kono result, 5th
In the fact base of the figure, (02, A1, v4)? J is changed to (02, Al, V2).

Therefore, in this example, it is confirmed that there has been a change in the fact base (98), and the fact tooth end (0
2. A1. Change facts fi, G(o2, A I ,
V 2) Wollj+, the cell to be combined, Kokote is (3, l)
is small, but (1, 2) holds true. This (1,2)
The beat 2 bit "O" that the condition of (3, 1) is satisfied and the bit "l" that the condition of (3,1) is not satisfied are inserted into the status flag set (99)
As a result, the flag set becomes as shown at 64 in FIG.

This completes one cycle of inference. When this cycle is repeated, the status flag is cleared in this embodiment.

The number changes to 65 and 66 in FIG. 7, and no rule holds true, and the inference ends.

[Effect of 1!1] As mentioned above, in the present invention, the matching result of the antecedent part of the production rule is expressed as a bit pattern, so it is very difficult to determine whether each rule of the production rule holds true or not. can be calculated with fewer calculations (number of rules when the bit pattern length is set to medium information processing), speeding up the processing up to the creation of conflict sets, which was an impediment to speeding up the production system. As a whole, we contribute to speeding up inference.

[Brief explanation of the drawing]

Fig. 1 is a mechanical block diagram of this invention, Fig. 2 is a hardware configuration diagram of an embodiment of this invention, Fig. 3 is a diagram explaining the correspondence between each rule of the rule base and the status flag set, and Fig. 4 The figure shows an example of a rule description, Fig. 5 shows a fact-based description example, Fig. 6 shows a configuration diagram of a state flag set, Fig. 7 shows a transition diagram of a state flag set as the example operates, and Fig. 8 shows an implementation example. The main flowchart of the example operation, FIG. 9 is a flowchart of 71 in FIG. 8, and FIG. 10 is a flowchart of inference 73 in FIG. 2...CPtJ, 31...
- Rail base, 32...Status flag set, 51...Fact base. Patent issued by Casio Computer Co., Ltd. wa''-1-・ 2nd 122nd 1 Figure 2 Figure 3 Flash HEN L-L2 T) IEN (MODIFY (02At V+) ---10L
-13 T)IEN (M)DIFY (02Al v2) ---■Figure 4Figure 5Figure 6■ 廿■ Figure 7Figure 8

Claims (1)

[Scope of Claims] A high-speed inference method for a production system that includes a rule base that stores a collection of rules, a fact base that stores a collection of facts, and an inference mechanism that performs inference by applying rules to facts, A status flag set that stores the matching result of the antecedent part of each rule in the rule base as a bit pattern for each rule, and when the above fact base is changed, the fact related to the change is checked against the condition element of the antecedent part of the above rule base. A high-speed inference method characterized by comprising a verification update means for writing a bit indicating a verification result into the state flag set, and a conflict section in which a rule is established using the state flag set updated by the verification update means. .