JPS6340190U - - Google Patents

Info

Publication number
JPS6340190U
JPS6340190U JP13382386U JP13382386U JPS6340190U JP S6340190 U JPS6340190 U JP S6340190U JP 13382386 U JP13382386 U JP 13382386U JP 13382386 U JP13382386 U JP 13382386U JP S6340190 U JPS6340190 U JP S6340190U
Authority
JP
Japan
Prior art keywords
current
detected
average
bias setting
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13382386U
Other languages
Japanese (ja)
Other versions
JPH0623194Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986133823U priority Critical patent/JPH0623194Y2/en
Publication of JPS6340190U publication Critical patent/JPS6340190U/ja
Application granted granted Critical
Publication of JPH0623194Y2 publication Critical patent/JPH0623194Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Rectifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案電流不平衡検出回路の一実施例
を示す回路図、第2図は各スイツチを閉じる各ゲ
ートパルスのタイミングチヤートを示すもので、
第3図及び第4図は従来の電流不平衡検出回路の
一例を示す回路図である。 1……整流器、2……整流部、3……整流部、
4……整流部、5……CT、6……CT、7……
CT、8……ターミナル、9……ターミナル、1
0……ターミナル、11……抵抗、12……スイ
ツチ、13……抵抗、14……スイツチ、15…
…抵抗、16……スイツチ、17……演算増幅器
、18……抵抗、19……平均電流演算回路、2
0……パルス発振器、21……パルス分配器、2
2〜26……抵抗、27……バイアス設定器、2
7……比較器。
Figure 1 is a circuit diagram showing one embodiment of the current imbalance detection circuit of the present invention, and Figure 2 is a timing chart of each gate pulse that closes each switch.
FIGS. 3 and 4 are circuit diagrams showing an example of a conventional current imbalance detection circuit. 1... Rectifier, 2... Rectifier, 3... Rectifier,
4... Rectifier section, 5... CT, 6... CT, 7...
CT, 8...Terminal, 9...Terminal, 1
0...terminal, 11...resistance, 12...switch, 13...resistance, 14...switch, 15...
...Resistor, 16...Switch, 17...Operation amplifier, 18...Resistor, 19...Average current calculation circuit, 2
0...Pulse oscillator, 21...Pulse distributor, 2
2 to 26...Resistor, 27...Bias setting device, 2
7... Comparator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 各整流素子を並列接続してなる整流器と、前記
各整流素子に流れる電流を検出する電流検出器と
、前記電流検出器で検出した検出電流を平均電流
に換算する平均電流演算回路と、前記整流素子の
並列接続数に等しい数のゲート信号を出力するパ
ルス分配器と、前記ゲート信号により前記検出電
流を通過させるスイツチと、前記検出電流と前記
平均電流演算回路の平均出力電流から基準電流を
設定するバイアス設定器と、前記バイアス設定器
から出力する基準電流と前記検出電流を比較する
比較器とからなることを特徴とする電流不平衡検
出回路。
a rectifier formed by connecting each rectifying element in parallel; a current detector that detects the current flowing through each of the rectifying elements; an average current calculation circuit that converts the detected current detected by the current detector into an average current; a pulse distributor that outputs gate signals equal in number to the number of elements connected in parallel; a switch that allows the detected current to pass according to the gate signal; and a reference current that is set from the detected current and the average output current of the average current calculation circuit. 1. A current unbalance detection circuit comprising: a bias setting device that performs a bias setting; and a comparator that compares a reference current outputted from the bias setting device with the detected current.
JP1986133823U 1986-09-01 1986-09-01 Current unbalance detection circuit for bridge rectification circuit by parallel connection rectification element Expired - Lifetime JPH0623194Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986133823U JPH0623194Y2 (en) 1986-09-01 1986-09-01 Current unbalance detection circuit for bridge rectification circuit by parallel connection rectification element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986133823U JPH0623194Y2 (en) 1986-09-01 1986-09-01 Current unbalance detection circuit for bridge rectification circuit by parallel connection rectification element

Publications (2)

Publication Number Publication Date
JPS6340190U true JPS6340190U (en) 1988-03-15
JPH0623194Y2 JPH0623194Y2 (en) 1994-06-15

Family

ID=31034487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986133823U Expired - Lifetime JPH0623194Y2 (en) 1986-09-01 1986-09-01 Current unbalance detection circuit for bridge rectification circuit by parallel connection rectification element

Country Status (1)

Country Link
JP (1) JPH0623194Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101689501B1 (en) * 2016-03-03 2016-12-23 두산중공업 주식회사 Multiple phase controlled rectifiers with fault detecting apparatus for thryster switch and fault detection method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54166529U (en) * 1978-05-15 1979-11-22
JPS55154480U (en) * 1979-04-24 1980-11-07
JPS59161076U (en) * 1983-04-12 1984-10-29 三菱電機株式会社 power supply monitor circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54166529U (en) * 1978-05-15 1979-11-22
JPS55154480U (en) * 1979-04-24 1980-11-07
JPS59161076U (en) * 1983-04-12 1984-10-29 三菱電機株式会社 power supply monitor circuit

Also Published As

Publication number Publication date
JPH0623194Y2 (en) 1994-06-15

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