JPS6336619A - Inter-stage turning circuit for multi-band turner - Google Patents

Abstract

PURPOSE:To uniformize an output level over the entire band by closing/opening a switching diode respectively at the 1st/2nd band reception so as to form a tuning circuit with less loss. CONSTITUTION:Since a varactor diode DV2 and coils L11, L12, L15 at the VHF reception in inter-stage tuning circuits 20, 21 of a multl-band tuner are connected by closing the diode D11, then they are connected by a low impedance and the tuning circuits with less loss are formed. At the UHF reception, the output of a transistor (TR) and the parallel resonance circuit DV2 and the coil L17 are coupled by a small capacitance across the diode D11 in opening and the auxiliary capacitance C19, the impedance viewed from the output of the TR toward the tuning circuit is not lowered and the output level is uniformized over the entire band.

Description

[Detailed description of the invention] <Industrial application field> The present invention relates to an interstage tuning circuit for a multiband tuner.

<Summary of the Invention> The present invention provides an inter-stage tuning circuit of a multi-band tuner that receives a second band having a higher frequency than the first and second bands.
It consists of a coil for the first band connected in parallel to the output of the high frequency transistor, a parallel circuit of a variable capacitance element and a resonant line for the second band connected via a switching diode, and a parallel circuit of a resonant line for the second band. By closing and opening the switching diodes during reception of the second band and the second band, the output of the tuning circuit is made uniform over the entire band.

<Conventional technology> FIG. 3 shows a circuit diagram of a conventional interstage tuning circuit.

Q is a high frequency transistor, and when receiving VHF band, coil L5S + LS6 and variable capacitance element DV,
. A tuned circuit is formed. During UHF band reception, diode D29 is turned on, and variable capacitance element D V + o and resonant line LS? A tuned circuit is formed. Capacitor D73 is a variable capacitance diode DV, 0 when receiving VHF band.
It is used to connect coil L SS + L sb, and UH
In F band, RF) transistor Q6 and parallel circuit D V
lo+L Used for coupling with st.

<Problems to be solved by the invention> In the above conventional example, VF (when receiving F band, capacitor Cuff
It is desirable that the capacity of is large. However, during UHF band reception, if the capacitance is not small, the impedance seen from the drain terminal of transistor Q1 to the tuning circuit side will decrease in the high range, so the output of the tuning circuit will be reduced to the dotted line 3 in Figure 4.
The result will be a curve as shown in 7.

That is, there is a problem in that the output of the tuning circuit decreases particularly in the high range of the UHF band.

Furthermore, when the capacity is large, there is also the problem that the output decreases over the entire band.

An object of the present invention is to provide a tuning circuit for a multi-band tuner that solves the conventional problems.

<Means for Solving the Problems> A tuning circuit for a band tuner according to the present invention is an interstage tuning circuit of a multi-band tuner that receives a first band and a second band having a higher frequency than the first band. The first band consists of a coil for the first band connected in parallel to the output, and a parallel circuit of a variable capacitance element and a resonant line for the second band connected via a switching diode.
The switching diode is configured to be closed and opened during reception of the band and the second band, respectively.

<Operation> When receiving the first band, diode D11 is turned on and the second band is received.
When receiving the frequency band, it is turned off, and the output of the transistor is coupled to the parallel circuit by at least the capacitance between the terminals of the diode DI+, which has a small capacitance, so that it is possible to prevent the output of the tuned circuit from decreasing in the high frequency range.

<Embodiment> FIG. 1 shows a block diagram of an inter-stage double-tuned circuit of a multi-band tuner to which the inter-stage double-tuned circuit according to an embodiment of the present invention is applied.

16 is an input filter, 17 is a VHF single-tuned circuit, 18 is a UHF single-tuned circuit, and 19 is a VHF and UHF common (hereinafter simply referred to as U・-■ common) RF amplification medium circuit high frequency amplification circuit)
, 20 is a VHF double tuning circuit, 21 is a UHF double tuning circuit,
22 is a UV shared oscillator, and 23 is a UV shared mixer circuit.

C1 is a variable capacitor for tuning of the tuning circuits 17 and 18 for both UV and UV. C, , C3 are variable capacitors of the double-tuned circuit 20 and 21 for both UV and UV.

The reception of VHF band will be explained. The signal entering terminal 2 is filtered through an input filter, allowing only VHF band signals to pass through.
After being selectively tuned to the frequency of a desired station in the HF single tuning circuit 17 and amplified to a predetermined level in the RFF width circuit 19, it is given a predetermined selectivity characteristic in the double tuning circuit 20 and is supplied to the mixer circuit 23. , 22 with the frequency from the oscillator 22, and the frequency-converted IFF force signal is sent to terminal 1.
Output to 4.

Next, reception of the UHF signal will be explained. The signal entering the terminal 1 is supplied to the single tuning circuit 18, selectively tuned to the frequency of the desired station, and then sent to the U via the RFF width circuit 19.
The signal is supplied to the HF tuning circuit 21, given a predetermined selectivity characteristic, and then supplied to the subsequent circuit. The mixer circuit 23 performs frequency conversion in the same manner as described above, and outputs the IF multiplied signal to the terminal 14.

In this way, the input tuning circuits 17, 18, the interstage tuning circuits 21.
22 and the oscillator 22 whose details will be described later, the variable capacitance element is shared by U and ■, so the number of parts can be reduced.
Furthermore, the tuner itself can be made smaller.

Next, FIG. 2 shows a specific circuit diagram of FIG. 1 including a double-tuned circuit according to an embodiment of the present invention.

The input filter 16 includes coils L+, L2 . It is composed of a low pass filter (LPF) composed of a capacitor C7 and a bypass filter (HPF), passes the VHF band frequency, and is supplied to the next input single tuning circuit 17, 18.

VH with variable capacitance diode DV and coils L3 to L6
This constitutes an F-band single-tuned circuit 17.

Also, inductor (resonant line) LB and variable capacitance diode D
V, constitutes a UHF band single-tuned circuit.

The operation when receiving VHF band will be explained.

When receiving the VHF band, the switching diode D2 is off (non-conductive), and the inductance of the inductor L8 is negligibly small for the VHF band. First, when receiving the low band of the VHF band (channels 1 to 3), no voltage is supplied from the terminal VH, the switching diode D is off, and the tuning circuit is formed by the coils L3 to L6 and the variable capacitance diode DV. The tuning frequency is varied to a desired channel frequency using a tuning voltage supplied from the terminal DT. On the other hand, during bi-band reception (channels 4 to 12), diode D is turned on (conducting state B) by the switching voltage supplied from terminal VH, short-circuiting coil l-41Ls,
The tuning circuit consists of coils L3 and L6 and variable capacitance diode D.
V, and the desired channel (frequency) is tuned and selected by this capacitive diode DV. These selected signals are supplied to the next stage RF amplification circuit 19 via the coupling capacitor C14.

In addition, when receiving low band, capacitor C91CIO
And low band image (208
~220M)Iz) Configure an eliminator for removal,
At the time of high band reception, capacitors Cq, L1° and coils L4 to L6 constitute an eliminator for blocking high band images.

Next, the single tuning circuit 18 and its operation in the UHF band will be explained. When receiving UHF band, voltage is supplied to diode D2 from terminal U, diode D2 is turned on, one end of inductor L8 is grounded with low impedance, and variable capacitance diode DV is connected to the other end.
A coaxial resonator of I/4" J2 is formed. The inductor is an inductor for adjustment. The UHF signal coming from terminal 1 is coiled and inductively coupled to inductor L8, and then connected to variable capacitance diode DV, The frequency of the desired channel is selectively tuned by the variable capacitance of , and the signal is supplied to FET1-transistor Q1 via capacitor CI4.

Since the inductor LB is directly grounded with low impedance by the diode D2, the Q of the tuning circuit can be increased, the tuning output level can be increased, and a drop in the output level can be prevented, especially in the high frequency range.

Incidentally, CIl, C++, are capacitors for DC cut.

The input tuning circuit explained above connects the VHF band and UHF band coils 3 to L6, the inductor 8, and the variable capacitance diode DV in series, and grounds the connection point of the coil Lb and inductor La when receiving the UHF band. Since the configuration is such that the diode D2 is connected, the variable capacitance diode DV can be shared by U and V, and there is an advantage that the space for parts and parts assembly can be reduced.

Next, the RF amplification circuit 19 will be explained. The output from the input single tuning circuit 17.18 is supplied to the first gate 1-Gl of the FET transistor Q, and the second gate G2 is supplied with the AGC voltage from the terminal AGC. R+ and Rz are bias resistors, and D3 is a switching diode.

When receiving the VHF band, the diode D3 is off, and the impedance of the coil L1 is small for the VHF frequency band, but the bias resistors R, , R2
Since it has a high resistance, the impedance seen from the first gate G is high, so the VHF signal is amplified by the transistor Q1 without being attenuated, and is supplied from the drain D to the next-stage double-tuned circuit 20.21. Ru.

On the other hand, when receiving the UHF band, voltage is supplied from the terminal U and the diode D3 is turned on only when receiving the UHF band. The UHF signal input in this state is amplified by Ql and supplied to double tuning circuits 20 and 21.

During UHF reception, in the low frequency range, transistor Q,
The gain is small, and to correct this, an impedance munching coil LIO is connected. The input capacitance of the first gate GI is about 2PF. When receiving the UHF band, diode D3 is turned on, and the coil LIO is grounded via the capacitor cps. Therefore, the G1 power point of the transistor Q is a parallel resonant circuit with the input capacitor ff1 (2PF) and the coil LIO. The resonant frequency is set to 300 MHz(:')ii.

This increases the gain in the low range of the UHF band, making the transistor gain uniform over the entire band.

Next, the double tuning circuits 20 and 21 will be explained.

coil, ~LI5 and capacitors C, , C, 7 are V
A parallel resonant circuit in the HF band is formed, and the inductor Ll? ,
Lllll is a coaxial resonator (resonant line).

The capacitive diode for variable tuning frequency of U and ■ is shared by DV2 and Dv3. Cl61 CI? lCa
1l is a capacitor for grounding, Cl11 is a capacitor for cutting direct current, and CI9 is a capacitor for coupling in the UHF band.

In such a circuit configuration, the circuit operation during VHF band reception will be explained. During low band reception of the VHF band, the voltage from terminal VL is applied to diode D14.
Resistor R3, coil I, ++, L+□.

It is fed through LIS to train D of transistor Q1. At this time, diodes Da and Dq are off. Note that the voltage supplied to terminal B is always applied when receiving the U and ■ signals. The diode D11 is also turned on by the power from the terminal (2). Diode DIG,
DI3 is turned off.

In this state, the primary side tuning circuit of the double tuning circuit consists of coil L+++ L+z+ L+s capacitor CZ6
and a variable capacitance diode Dv2 connected in parallel to these.

In addition, the secondary side tuning circuit of the double tuning circuit includes coils LI3 to
It is formed by LI5, capacitor C27+ cza, and variable capacitance diode DV connected in parallel with them. Note that the inductance of the inductor connected in series with the variable capacitance diode DV is small and can be ignored for the VHF band.

Tuning of this double-tuned circuit is performed by varying the capacitances of the variable capacitance diodes DV2 and DV3 using a variable voltage supplied from the terminal VT.

Next, the high band reception of the VHF band will be explained. The voltage supplied from terminal VH is applied to diode Db and resistor R.
a, the diode Do, and the coil L11, and are supplied to the transistor Q and D. At the same time, diode D9. DJ
turns on, and diode D,. , D13 are off.

The primary side tuning circuit of the double tuning circuit is composed of a parallel circuit of a coil Lll and a variable capacitance diode DV2. The secondary side tuning circuit is composed of a coil LI:l+ and a variable capacitance diode DV3 connected in parallel to a capacitor CZ4.

These multiple circuits have variable capacitance diodes D as described above.
Vz, DV3 tunes to the desired channel frequency.

The output from the duplex circuit in the VHF band is 2 on the inductor.
1. Mixer circuit 23 via matching coil L2□
supplied to

Next, the circuit operation during UHF band reception will be explained. The voltage applied to the terminal U causes the diode D, ~D1゜l
Turn on D+3 and supply voltage to the drain D of transistor Q1. On the other hand, diode DI+ is turned off. Is the primary side tuning circuit the inductor Ll? and a variable capacitance diode DV in parallel.

The secondary side tuning circuit is formed by a parallel circuit of an inductor LI8 and a variable capacitance diode Dv.

L12. L2° is an inductor for adjustment, and the primary side and the secondary side are coupled through a coupling window 28. The output of the double-tuned circuit is I, which is electromagnetically coupled to the inductor Ll11.
z+ and supplied to the mixer circuit 23 at the next stage.

Coupling between the drain D of the transistor Q1 and the UHF band primary side tuning circuit is performed by the inter-terminal capacitance (approximately IPF) of the diode D11 which is turned off and a 2PF capacitor C19. Therefore, the combined capacitance of the coupling is approximately 3PF. If this requires only the capacitance between the terminals of the diode, it is better to omit the capacitor CI1 since the number of parts will be reduced. In this way, drain D and D V z
and L+? Since the parallel circuits are coupled with a small capacitance, there is no drop in impedance when looking at the tuning circuit from the drain D, and this can be prevented especially in the high range, so a drop in the tuned output in the high range can be prevented. The curve of the output of the tuned circuit according to this circuit is shown by the solid line 38 in FIG. Now it looks like a molecule
The output level within the F band (470 to 770 MHz) is equalized.

The coil whose one end is connected to C10 and the other end is grounded for AC is used for peaking. This is used as a tuning coil when receiving VHF, and also as a peaking coil when receiving UHF.

As explained above, the multiple circuits 20 and 21 have the advantage that the variable capacitance diodes DV2 and DV3 are also used in the U and ■ circuits, and the number of components can be reduced.

Since the oscillation circuit 22 and the mixer circuit 23 are not directly related to the present invention, detailed explanations thereof will be omitted.

<Effects of the Invention> The crotch tuning circuit of the multi-band tuner according to the present invention has VH
Variable capacitance diode DV2 and coils Lz, I-1□, L1. during F-band reception. Since it is connected to by closing the diode D, the connection is made with low impedance, and a tuned circuit with low loss can be formed.

Also, when receiving UHF, the output of the transistor and the parallel resonant circuit DV2. The connection with L and □ is an open diode D.
11 terminal capacitance and auxiliary capacitance 'JC+q', there is no drop in impedance from the output of the transistor to the tuned circuit side, and there is no drop in the output of the tuned circuit, especially in high frequencies, all over the band. The output level can be made uniform over the entire range.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram of a tuner to which a crotch double tuning circuit according to the present invention is applied, FIG. 2 is a specific circuit diagram of FIG. 1 including an interstage double tuning circuit according to an embodiment of the present invention, FIG. 3 is a diagram of a conventional tuning circuit, and FIG. 4 is a diagram of output characteristics of the tuning circuit. 20...VHF double tuning circuit, 21...U HF double tuning circuit, LII+ L+5...Coil, L17~L
2゜...Inductor, D8~DII+ Dlff・
...Switching diode, D Vz, D
V3...variable capacitance diode. Figure 4 470 nOA wave clothes [MH-]

Claims (1)

[Claims] In a tuner that receives a first band and a second band having a higher frequency than the first band, a coil for the first band connected to the output of a high frequency transistor; A parallel circuit of a variable capacitance diode shared by the first and second bands and a resonant line for the second band, and a switch interdiode connected between the parallel circuit and the output of the high frequency transistor. The switching diode is closed when receiving the first band, the switching diode is opened when receiving the second band, and the output of the high frequency transistor and the parallel circuit are closed when receiving the second band. An inter-stage tuning circuit for a multi-band tuner, characterized in that co-coupling is minimized by the capacitance between the terminals of the switching diode which is opened.