JPH0718190Y2 - Tuner circuit - Google Patents

Description

[Detailed Description of the Invention] <Industrial field of application> The present invention relates to a tuner circuit provided in a television receiver, a video tape recorder or the like for receiving broadcast radio waves by switching between high band and low band. .

<Prior Art> A conventional tuner circuit of this type is shown in FIG. 2 and described below.

In case of VHF tuner, low band (1 to 3 channels)
In order to cover the entire band from to high band (4 to 12 channels), it is not possible to deal with the capacitance change of varactor diodes (variable capacitance diodes) D ₃ and D ₄ .

Therefore, the high band tuning coils L ₁ and L ₂ and the low band tuning coils L ₃ and L ₄ are provided, and the switching diodes D ₁ and D ₂ for switching the high band / low band are provided to turn on the switching diodes D ₁ and D ₂ .・ By turning off the inductance, it is possible to deal with it.

When a voltage is applied to the high-band channel selection when the high-band selection terminal B _H, the high-band selection terminal B the current supplied from the _H is primary switching diode D ₁ → primary low band tuning coil L ₃ → N-channel type Of the field effect transistor Q ₁ for high frequency amplification of the source bias resistors R ₄ and R _{3 and} the secondary switching diode D ₂ → secondary low band tuning coil L ₄ → source bias resistors R ₄ and R ₃ Flowing. as a result,
When a forward voltage is applied to the switching diodes D ₁ and D ₂ on the primary side and the secondary side, both switching diodes D ₁ and D
₂ becomes conductive.

When the primary side switching diode D ₁ becomes conductive, the primary side high band tuning coil L ₁ and the primary side low band tuning coil
The connection point with L ₃ is grounded via the primary side switching diode D ₁ and the primary side bypass capacitor C _8, and the primary side low band tuning coil L ₃ is short-circuited.

Also, when the secondary side switching diode D ₂ becomes conductive,
The connection point between the secondary high band tuning coil L ₂ and the secondary low band tuning coil L ₄ is the secondary switching diode D _2.
And is grounded via the secondary side bypass capacitor C _9, and the secondary side low-band tuning coil L ₄ is short-circuited.

As a result of the primary side low band tuning coil L ₃ being short-circuited, the primary side high band tuning coil L ₁ becomes active and the primary side low band tuning coil L ₃ becomes inactive, and the high band channel is surrounded by the broken line. The primary side tuning circuit a _H at the time of selection includes tuning capacitors C ₁ and C ₂ , a varactor diode (variable capacitance diode) D ₃ , a primary side high band tuning coil L ₁ , a primary side switching diode D ₁ and a primary side. It is a parallel resonant circuit composed of the side bypass capacitor C ₈ .

Further, as a result of the secondary side low band tuning coil L ₄ being short-circuited, the secondary side high band tuning coil L ₂ becomes active.
Next low band tuning coil L ₄ becomes inactive,
As indicated by the chain double-dashed line, the secondary side tuning circuit b _H when the low band channel is selected is the tuning capacitors C ₃ and C ₄ , the varactor diode D ₄ , the secondary side high band tuning coil L ₂ , and the secondary side switching diode. It is a parallel resonant circuit composed of D ₂ and the secondary side bypass capacitor C ₉ .

The primary side tuning circuit a _H and the secondary side tuning circuit b _H are
The inter-stage double tuning circuit is formed by the mutual induction coupling between the secondary high band tuning coil L ₁ and the secondary high band tuning coil L ₂ .

By the way, in a dual-gate MOS type N-channel type field effect transistor (FET) forming the high frequency amplification field effect transistor Q ₁ , the gate G ₁ is generally at a negative potential with respect to the source S (negative terminal). Since the current flowing through the gate G ₁ can be reduced to zero only at certain times,
It is necessary to keep the potential of the source S at 1 to 2 volts when the potential of G ₁ is zero. Therefore, the bias resistances R ₄ and R ₃ are connected to the source S, and the divided potential of both the resistances R ₄ and R ₃ is applied to the source S.

That is, as described above, the high band selection terminals B _H to 1
The current passing through the secondary side switching diode D ₁ is passed through the primary side low band tuning coil L _3, and the current passing through the secondary side switching diode D ₂ is passed through the secondary side low band tuning coil L _4. The bias current flows through the bias resistors R ₄ and R ₃ of the source S of the high frequency amplification field effect transistor Q ₁ .

The tuning voltage from the tuning voltage terminal V _T is applied to the primary side tuning circuit a _H and the secondary side tuning circuit b _H via resistors R ₁ and R ₂ , respectively, and the tuning voltage increases or decreases. By decreasing or increasing the capacity of the varactor diodes D ₃ and D ₄ , the tuning frequency is changed for each channel desired to be tuned to perform tuning in a high band.

A high-frequency signal (carrier signal for television broadcasting) input to the gate G ₂ via the antenna is high-frequency amplified by the high-frequency amplification field-effect transistor Q ₁ , and the primary side and 2
After selecting the desired channel signal in the high band and removing the interfering channel signal by the interstage double tuning circuit consisting of the tuning circuit a _H and b _H on the next side, the desired channel signal is passed through the coupling capacitor C ₅ and the mixing terminal MIX. Output to the mixing circuit at the next stage.

The mixing circuit mixes the selected channel signal and the local oscillation signal to extract an intermediate frequency signal.

The application of a low-band channel is selected Voltage in the low-band selection terminal B _L, the current supplied from the low-band selection terminal B _L, the source bias resistor
The potential of the source S is kept at 1 to 2 V by flowing to R ₄ and R ₃ and applying the divided voltage to the source S of the high frequency amplification field effect transistor Q ₁ .

In addition, the current supplied from the low band selection terminal B _L is 1
A reverse voltage is applied to the primary switching diode D ₁ via the secondary low band tuning coil L ₃ , and a reverse voltage is applied to the secondary switching diode D ₂ via the secondary low band tuning coil L _4. Both switching diodes D ₁ and D ₂ for switching between high band and low band to apply
Becomes non-conducting.

As a result of the non-conduction of the primary side switching diode D _{1, the} primary side tuning circuit a _L when the low band channel is selected is surrounded by the chain double-dashed line, the tuning capacitors C ₁ and C ₂ , the varactor diode D ₃ , Primary side high band tuning coil L ₁ , 1
Secondary low-band tuning coil L ₃ and primary damping resistor R ₅
And a parallel resonance circuit composed of a parallel circuit and a bypass capacitor C ₇ common to the primary side and the secondary side.

In addition, as a result of the secondary side switching diode D ₂ becoming non-conducting, the secondary side tuning circuit when the low band channel is selected
b _L is a tuning capacitor C ₃ , C ₄ , a varactor diode D ₄ ,
The parallel resonance circuit is composed of the secondary high-band tuning coil L ₂ , the parallel circuit of the secondary low-band tuning coil L ₄ and the secondary damping resistor R ₆ , and the bypass capacitor C ₇ .

The primary side tuning circuit a _L and the secondary side tuning circuit b _L are
An interstage double-tuned circuit is formed by mutual coupling between the high-band tuning coil L ₁ and the low-band tuning coil L ₃ on the secondary side and the high-band tuning coil L ₂ and the low-band tuning coil L ₄ on the secondary side.

Thus, in each of the primary side and secondary side tuning circuits a _L and b _L , by connecting the low band tuning coils L ₃ and L ₄ in series to the high band tuning coils L ₁ and L ₂ , respectively, a varactor diode is obtained. D _3, only the capacitance change of the D ₄ can be extended to the bandwidth that could not be compatible, reduced-capacity varactor diode D _3, D ₄ by increasing and reduction of tuning voltage applied to the tuning voltage terminal V _T By increasing the tuning frequency, the tuning frequency is changed for each channel desired to be tuned to perform tuning in the low band.

As described above, the field effect transistor (FET) Q ₁ is used in the high frequency amplification stage, and in the tuner circuit configured to switch the high band and the low band to select the high frequency signal, Due to the characteristics of the transistor, the gain in the low band is larger than that in the high band.

Therefore, in order to eliminate the gain difference, a primary side tuning circuit that constitutes an interstage double tuning circuit when a low band channel is selected.
In both a _L and the secondary side tuning circuit b _L , primary side and secondary side damping resistors R ₅ and R ₆ are connected across the low band tuning coils L ₃ and L _4, respectively.

<Problems to be solved by the invention> By the way, the tuner circuit configured as described above has an extremely large number of parts and connection points, and has a high mounting density when mounting all parts on a board of a certain area. However, there is a problem that the soldering work is difficult and the yield is low, and the product cost is considerably high due to the component cost and the working cost.

The present invention has been made in view of such circumstances, and particularly, damping resistors R ₅ and R ₆ are arranged in parallel on both the primary side and secondary side low-band tuning coils L ₃ and L _4. Focusing on the connection, reduce the number of parts as much as possible,
It is intended to improve the yield of soldering work and reduce the cost.

<Means for Solving the Problem> In order to achieve such an object, the present invention has the following configuration.

That is, the tuner circuit of the present invention comprises a field effect transistor for high frequency amplification, a primary side tuning capacitor connected to its positive terminal, and a primary side high band tuning which constitutes a parallel resonant circuit together with the primary side tuning capacitor. A series circuit of a coil and a primary side low band tuning coil, and 2 coupled to each of the primary side tuning coils by mutual induction
A series circuit of a secondary high-band tuning coil and a secondary low-band tuning coil, and a secondary tuning capacitor that forms a parallel resonant circuit together with the secondary tuning coils.
A low band selection terminal connected to the negative terminals of both the primary side and secondary side low band tuning coils, a secondary side damping resistor connected in parallel to the secondary side low band tuning coil, and a high side of the primary side. A cathode is connected to a connection point between the band tuning coil and the low band tuning coil, and a primary side switching diode whose anode is connected to a high band selection terminal, and a connection between the secondary side high band tuning coil and the low band tuning coil. The cathode is connected to the point and the anode is connected to the high band selection terminal 2
A secondary switching diode, a ground bias resistor connected between the negative terminal of the high frequency amplification field effect transistor and ground, a connection point between the negative terminal and the ground bias resistor, and a cathode of the primary switching diode. And a biasing / primary-side damping resistor connected between and.

<Operation> The operation of the above configuration of the present invention is as follows.

When selecting a high-band channel, a voltage is applied to the high-band selection terminal to make the switching diodes on the primary side and the secondary side conductive, thereby short-circuiting the low-band tuning coils on the primary side and the secondary side to create a tuning coil. Activates only the primary and secondary highband tuning coils. Current is supplied to the negative terminal (source for N-channel type, drain for P-channel type) of the field effect transistor for high frequency amplification and also to the primary side damping resistor and the grounding side bias resistor via the primary side switching diode. The negative terminal is kept at a predetermined voltage.

When a low band channel is selected, a voltage is applied to the low band selection terminal to make the switching diodes on the primary side and the secondary side non-conductive, so that a high band tuning coil and a low band tuning coil on the primary side and a high side tuning diode on the secondary side are selected. Both the band tuning coil and the low band tuning coil are activated in a state of being connected in series. For the bias and primary side damping resistance and ground bias resistance for the negative terminal of the high-frequency amplification field effect transistor,
Current is supplied through the low band tuning coil to keep the negative terminal at a predetermined voltage.

When the low band channel is selected, the gain of the secondary low band tuning coil is adjusted by the secondary damping resistor connected in parallel with it. Also,
For the primary side low band tuning coil, the bias and 1
By forming a loop through the secondary damping resistor, the ground bias resistor, the ground, and the primary lowband tuning coil, the gain is adjusted by the bias and primary damping resistor connected in parallel to the primary lowband tuning coil.

<Embodiment> An embodiment of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a circuit diagram of a tuner circuit according to an embodiment of the present invention.

A high-frequency amplification field-effect transistor Q ₁ composed of a dual-gate MOS type N-channel field-effect transistor (FET) has a gate G ₁ grounded and a gate G ₂
The high frequency signal (carrier signal) received by the antenna is input to the.

In the drain D (positive terminal) of the field effect transistor Q ₁ for high frequency amplification, the primary side tuning circuit a _H when the high band channel is selected and the primary side tuning circuit a _L when the low band channel is selected are some parts. Are connected in a shared state.

The primary side tuning circuit a _H when the high band channel is selected includes the tuning capacitors C ₁ and C ₂ , the varactor diode D ₃ , the high band tuning coil L ₁ , the switching diode D ₁ and the bypass capacitor C as surrounded by the broken line. _It consists of _eight .

When the low band channel is selected, the primary side tuning circuit a _L includes tuning capacitors C ₁ and C ₂ , a varactor diode D ₃ , a high band tuning coil L ₁ , a low band tuning coil L ₃ and a bypass as surrounded by a chain double-dashed line. It consists of a capacitor C ₇ .

In the primary side tuning circuit a _L , the primary side damping resistor R ₅ in the conventional example is omitted.

The connection point of the primary side tuning capacitors C ₁ and C ₂ and the primary side varactor diode D ₃ is connected to the tuning voltage terminal V _T via the resistor R ₁ .

The connection point between the anode of the primary side switching diode D ₁ and the primary side bypass capacitor C _{8 in the} primary side tuning circuit a _H when the high band channel is selected is the high band selection terminal.
A connection point between the negative terminal of the primary side low band tuning coil L _{3 in} the primary side tuning circuit a _L connected to B _H and the bypass capacitor C ₇ common to the primary side and the secondary side. Is connected to the low band selection terminal B _L.

The secondary side tuning circuit b _H surrounded by the broken line when the high band channel is selected and the secondary side tuning circuit b _L surrounded by the chain double-dashed line when the low band channel is selected are coupled capacitors while sharing some of the components. It is connected to the mixing terminal MIX via C ₅ .

The secondary side tuning circuit b _H at the time of selecting the high band channel is composed of tuning capacitors C ₃ and C ₄ , a varactor diode D ₄ , a high band tuning coil L ₂ , a switching diode D ₂ and a bypass capacitor C ₉ .

In addition, when the low band channel is selected, the secondary side tuning circuit b _L
Is a tuning capacitor C ₃ , C ₄ , a varactor diode D ₄ , a high-band tuning coil L ₂ , a parallel circuit of a low-band tuning coil L ₄ and a damping resistor R ₆ , and a bypass capacitor C ₇
It consists of

The connection point of the secondary side tuning capacitors C ₃ and C ₄ and the secondary side varactor diode D ₄ is connected to the tuning voltage terminal V _T via the resistor R ₂ .

The connection point between the anode of the secondary side switching diode D ₂ and the secondary side bypass capacitor C _{9 in the} secondary side tuning circuit b _H when the high band channel is selected is the high band select terminal.
Is connected to the B _H, and the negative terminal of the secondary low-band tuning coil L ₄ in the secondary side tuned circuit b _L during low-band channel selection, the connection point between the bypass capacitor C ₇ is connected to the low-band selection terminal B _L There is.

Primary side tuning circuit when high band channel is selected
The a _H and the secondary side tuning circuit b _H form an interstage double tuning circuit by the mutual induction coupling between the primary side high band tuning coil L ₁ and the secondary side high band tuning coil L ₂ .

When the low band channel is selected, the primary side tuning circuit a _L and the secondary side tuning circuit b _L are the high side tuning coil L ₁ on the primary side and the low band tuning coil L ₃ and the high side tuning circuit on the secondary side. Coil L ₂ and low band tuning coil L ₄
The inter-stage double-tuned circuit is formed by mutual induction coupling with.

And instead of omitting the primary side damping resistor R ₅ ,
The cathode of the primary side switching diode D _{1 in} the primary side tuning circuit a _H when the high band channel is selected is connected to the source S (negative terminal) of the high frequency amplification field effect transistor Q ₁ via the source bias resistor R _7. , A parallel circuit of a ground source bias resistor R ₃ and a bypass capacitor C ₆ is connected to the connection point.

Comparing this example with the conventional example, the primary side damping resistor R ₅ that was connected in parallel to the primary side low-band tuning coil L ₃ in the conventional example is omitted in this example, and is grounded in the conventional example. Bias resistor R ₄ is the primary side low band tuning coil
In contrast to the connection point between L ₃ and the bypass capacitor C ₇ , the source bias resistor R ₇ is connected to the primary low-band tuning coil L ₃ and the cathode of the primary switching diode D ₁ in this embodiment. Is connected to the connection point of.

As will be apparent from the description of the operation described later, the source bias resistor R ₇ serves as the ground bias resistor R ₄ and the primary side damping resistor R ₅ in the conventional example. Therefore, this resistor R ₇ will be referred to as a source bias / primary side damping resistor R ₇ .

Next, the operation of the tuner circuit of this embodiment will be described.

(I) When a high-band channel is selected When a voltage is applied to the high-band selection terminal B _H , the switching diodes D ₁ and D ₂ on the primary and secondary sides for switching between high band and low band are switched in the same way as in the conventional example. When a directional voltage is applied, both switching diodes D ₁ and D ₂ become conductive, the primary side low band tuning coil L ₃ is short-circuited via the primary side switching diode D ₁ and the bypass capacitor C _8, and the secondary side low band tuning is performed. The coil L ₄ is short-circuited via the secondary side switching diode D ₂ and the bypass capacitor C ₉ .

As a result, only the primary-side high-band tuning coil L ₁ and the primary-side low-band tuning coil L ₃ are active, and as indicated by the broken line, the primary-side tuning circuit a _H and the secondary-side tuning circuit when the high-band channel is selected. A tuning circuit b _H is formed, and each becomes a parallel resonance circuit. And the primary side tuning circuit a _H and 2
The secondary side tuning circuit b _H forms an interstage double tuning circuit by the mutual induction coupling of the primary side high band tuning coil L ₁ and the secondary side high band tuning coil L ₂ .

One side, the current that passed from the high band selection terminal B _H through the primary side switching diode D ₁ , and the secondary side switching diode D ₂ and the secondary side low band tuning coil L ₄ and the primary side low band tuning coil L ₃ . The combined current flows into the source bias / primary side damping resistor R ₇ and the ground source bias resistor R _3, and the divided voltage of the resistors R ₇ and R ₃ is the source S of the high frequency amplification field effect transistor Q ₁ . A bias voltage of 1 to 2 volts is applied to. As a result, the potential of the gate G ₁ can be zero.

The tuning voltage from the tuning voltage terminal V _T is applied to the primary side tuning circuit a _H and the secondary side tuning circuit b _H via resistors R ₁ and R ₂ , respectively, and the tuning voltage increases or decreases. By decreasing or increasing the capacity of the varactor diodes D ₃ and D ₄ , the tuning frequency is changed for each channel desired to be tuned to perform tuning in a high band.

Since the primary side tuning circuit a _H at the time of selecting the high band channel does not include the primary side low band tuning coil L ₃ , the source bias / primary side damping resistor R ₇ functions exclusively as a source bias resistor. , It has no function as a damping resistor.

High frequency signal (carrier signal) input through the antenna
Is amplified by a field effect transistor Q ₁ for high frequency amplification, and an interstage double tuning circuit consisting of primary side and secondary side tuning circuits a _H and b _H selects only a desired channel signal in a high band and an interfering channel signal. Is removed and then output to the next-stage mixing circuit via the coupling capacitor C ₅ and the mixing terminal MIX. The mixing circuit mixes the selected channel signal and the local oscillation signal to extract an intermediate frequency signal.

When a voltage is applied (ii) low-band channels when selecting the low-band selection terminal B _L, the current supplied from the low-band selection terminal B _L, the primary low-band tuning coil L ₃ source biasing and primary damping resistor R via ₇ and the ground source bias resistor R ₃ , and the divided voltage is applied to the source S of the high frequency amplification field effect transistor Q ₁ .

When a voltage is applied to the low band selection terminal B _L , a reverse voltage is applied to the primary side and secondary side primary side switching diodes D ₁ and D ₂ as in the conventional example, and both switching diodes D ₁ , D ₂ become non-conducting, and the primary side high band tuning coil L ₁ , the primary side low band tuning coil L ₃ , the secondary side high band tuning coil L ₂ and the secondary side low band tuning coil L ₄ are all active. Become.

As a result, the primary side tuning circuit a _L and the secondary side tuning circuit b _L at the time of selecting the low band channel are formed as surrounded by the two-dot chain line, and each becomes a parallel resonance circuit. And 1
The secondary-side tuning circuit a _L and the secondary-side tuning circuit b _L are the primary-side high-band tuning coil L ₁ and the low-band tuning coil L ₃ ,
The inter-stage double tuning circuit is formed by mutual induction coupling with the high band tuning coil L ₂ and the low band tuning coil L ₄ on the secondary side.

The gain of the secondary side tuning circuit b _L at the time of selecting the low band channel is reduced by the secondary side damping resistor R ₆ connected in parallel to the secondary side low band tuning coil L _4, and the gain at the secondary side at the time of selecting the high band channel. There is no difference from the gain of the tuning circuit b _H.

Further, since the source bias and primary side damping resistor R ₇ is connected in parallel to the primary side low band tuning coil L ₃ via the bypass capacitors C ₆ and C ₇ , the gain of the primary side tuning circuit a _L is It is lowered by the source bias and primary side damping resistor R ₇ , and there is no difference from the gain of the primary side tuning circuit a _H when the high band channel is selected.

By the way, in the conventional example, the damping resistors R ₅ and R ₆ at the time of selecting the low-band channel are normally adjusted in total gain on the primary side and the secondary side, each of which is several hundred Ω.
It has a resistance value of 2 KΩ. Meanwhile, the ground bias resistor R ₄
Also has a resistance value of 820Ω to 1.8KΩ, which is almost the same. Therefore, the source bias resistor R ₇ may be used also as the source bias / primary side damping resistor R ₇ .

As the high frequency amplification field effect transistor Q ₁ ,
A P-channel type may be used, in which case
The source serves as a positive electrode terminal and the drain serves as a negative electrode terminal.

<Effects of the Invention> According to the present invention, the following effects are exhibited.

When the low band channel is selected, the bias and 1 connected between the cathode of the primary side switching diode and the negative terminal of the high frequency amplification field effect transistor.
Since the damping (gain adjustment) for the primary low-band tuning coil is performed by connecting the secondary damping resistor in parallel to the primary low-band tuning coil, in other words, the ground bias resistor for the negative electrode terminal and the primary bias resistor Since it is also used as the primary side damping resistor for the side low band tuning coil, the primary side damping resistor directly connected in parallel to the primary side low band tuning coil in the conventional example can be omitted, and the number of parts and connection points can be reduced. Can be reduced.

Therefore, it is possible to reduce the component mounting density on a substrate having a certain area, facilitate the soldering work and improve the yield, and reduce the cost of the product by reducing the component cost and the work cost.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a tuner circuit according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional tuner circuit. Q ₁ …… High-frequency amplification field effect transistor, D …… Drain (positive electrode terminal), S …… Source (negative electrode terminal), C ₁ , C ₂
…… Primary side tuning capacitor, D ₃ …… Primary side varactor diode, L ₁ …… Primary side high band tuning coil, L ₃ …… 1
Secondary low-band tuning coil, D ₁ …… Primary side switching diode, R ₇ …… Bias and primary side damping resistor,
C ₃ , C ₄ …… Secondary side tuning capacitor, D ₄ …… Secondary side varactor diode, L ₂ …… Secondary side high band tuning coil, L ₄
…… Secondary side low band tuning coil, D ₂ …… Secondary side switching diode, R ₃ …… Ground bias resistance, R ₆ …… 2
Secondary damping resistance, B _H …… High band selection terminal, B _L …
… Low band selection terminal, V _T …… Tuning voltage terminal

Claims (1)

[Scope of utility model registration request] 1. A high-frequency amplification field effect transistor, a primary side tuning capacitor connected to its positive terminal, a primary side high band tuning coil and a primary side which form a parallel resonance circuit together with the primary side tuning capacitor. Side low band tuning coil, a series circuit with a secondary side high band tuning coil and a secondary side low band tuning coil, which are coupled to each of the primary side tuning coils by mutual induction. A secondary side tuning capacitor that constitutes a parallel resonance circuit together with both tuning coils, a low band selection terminal connected to the negative terminals of both the primary side and secondary side low band tuning coils, and a secondary side low band tuning coil. A secondary side damping resistor connected in parallel, and a cathode at a connection point between the primary side high band tuning coil and the low side tuning coil. Is connected, and a cathode is connected to a connection point between the primary side switching diode whose anode is connected to the high band selection terminal and the secondary side high band tuning coil and the low band tuning coil, and the anode is the high band selection A secondary side switching diode connected to the terminal; a ground bias resistor connected between the negative electrode terminal of the high frequency amplification field effect transistor and ground; and a connection point between the negative electrode terminal and the ground bias resistor, and A tuner circuit comprising a bias and primary side damping resistor connected between the secondary side switching diode and the cathode.