JPS6336248A - Mask for forming circuit - Google Patents

Abstract

PURPOSE:To eliminate the need for an etching process at the time for forming circuits by providing an adhesive agent to the surface of a resin layer lined to a back metal and masking the surface. CONSTITUTION:The adhesive agent 1 is provided on the surface of the resin layer 2 lined by the back metal 3 and the mask for forming the desired circuits is formed when holes 4 are formed to the layer 2 by projecting a laser beam thereto. A circuit substrate is formed without etching if the mask is stuck to a metallic substrate by the adhesive agent 1 and the metal 3 is stripped.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field 1] The present invention relates to a circuit forming mask for forming circuits on a circuit board by a dry process.

[Background technology] Circuit boards that use non-aluminum plates such as ceramics and metals as substrates are designed to respond to the increasing integration of semiconductor devices and the A-functionalization, miniaturization, and cost reduction of electronic devices. Various studies have been conducted to obtain excellent properties in terms of physical strength and mechanical strength. When manufacturing a circuit board using such a non-FF17A board, first a conductor layer is formed on the surface of the board by electroless plating, etc., then an etching resist is provided on the surface of this conductor layer, and then etching is performed. Two steps are required to form a circuit: exposing and developing the resist, and then etching the conductor layer with an etching solution.

However, the process of forming a conductor layer, forming an etching resist, exposing it to light, developing it, and etching it all has the problem of very low productivity, and when forming a circuit by etching, It is said that it is difficult to precisely form fine circuits because impurity ions caused by residual etching liquid can adversely affect properties such as insulation, and the etching liquid tends to wrap around the circuit, causing thinning of the circuit. [Purpose of the Invention] The present invention has been made in view of the above-mentioned point 1.It is an object of the present invention to provide a mask for circuit formation that can form a circuit in a simple manner without the need for etching. This is the purpose.

[Disclosure of the Invention] The circuit forming mask according to the present invention has a resin layer 2 provided with an adhesive 1 on the surface, and a resin layer 2 on the back side of the resin N2.
The present invention will be described in detail below.

Resin 1vI2 is polyimide (PI), which is easy to laser process.
) and polyetheretherketone (PEEK)
, polyphenylene sulfide (pps), polyester (PEs), polyamideimide (FAI), etc., and resin Jt
The back metal lined on the back of 12 is made of An foil, Fe foil, Ni foil, which has high laser reflectance and low cost.
It is formed of Cr foil, Cu foil, foil of an alloy thereof, or the like.

The back metal 3 is laminated on the back of the 01 resin) Ii42 by thermocompression bonding, etc., and the surface of the resin layer 2 is coated with an adhesive 1 having excellent heat resistance such as polyimide or epoxy resin.
is the provision. In this way, a circuit forming mask as shown in FIG. 1(a) can be created. and,
When forming a circuit using the second mask,
First, slit-shaped holes 4 are first formed in the resin layer 2 in a circuit pattern.
Provided as shown in Figure (b). The formation of this hole 4 is carried out in the resin layer 2.
12 This can be done by irradiating the surface with laser light. Since the laser beam is reflected by the back metal 3 (more than 90% is reflected in the case of Al foil), the resin layer 2 is removed without making holes in the back metal 3.
Holes can only be drilled. In addition, since the laser beam can be made into a fine beam, the line width of the hole 4 is set to 25 μm.
It is possible to form the holes 4 at a fine interval of about 30 μm. Of course, this hole machining cannot be performed mechanically.

Therefore, in forming the circuit, first the resin layer 2 of the mask is pasted on the surface of the substrate 5 with adhesive 1 (Fig. 2 (, > (b)). Here, the substrate 5 is made of a material such as a ceramic plate or a metal plate. An inorganic substrate is used, and the ceramic plate is alumina, stair tie) (MgO・5in2
) etc. can be used, and when using a metal plate such as an aluminum plate or a steel plate, the surface needs to be insulated with a resin insulating layer or the like. The resin layer 2 is attached to the substrate 5 while being lined with a back metal 3 to maintain the shape of the hole 4.
After pasting in this manner, the back metal 3 is peeled off from the resin M2 (FIG. 2(C)). Then, a conductor layer 6 is formed from the surface of the resin layer 2 to the surface of the substrate 5 in the hole 4 (tI42
Figure (d)). The conductor layer 6 is formed by vapor deposition, sputtering,
Physical plating methods (P
, V, D; physical vapor
This is done by metallizing with (eposit). Here, the conductor N6 formed by the physical plating method has excellent adhesion to the solid substrate 5 made of ceramic or the like, and the adhesion can be further increased especially when physical plating is performed with the substrate 5 heated. In addition, in the case of sputtering, it is preferable to perform high-speed sputtering to coat at high speed in order to further increase the adhesion. After forming the conductive layer 6 on the surface of the substrate 5 in the holes 4 from the surface of the resin layer 2 in this manner, the 0 (grease M2) is peeled off from the surface of the substrate 5 and removed.

By peeling off this resin 7 + 12, the conductor layer 6 on the surface of resin) @ 2
is also removed at the same time, and only the conductor 716 formed in the hole 4 of the resin layer 2 remains on the surface of the substrate 5 as the circuit 7.
The circuit can be formed by a so-called lift-off method (FIG. 2(e)). In this way, the circuit 7 is formed by the pattern of the holes 4 formed in the resin M2, and the pattern of the circuit 7 can be miniaturized and formed. Further, there is no need to perform an etching process when forming a circuit, which greatly simplifies the process, and also enables precise circuit formation without phenomena such as thinning of the circuit 7 due to the etching solution flowing around.

Furthermore, in manufacturing the circuit board as a multilayer circuit board, a photosensitive resin 8 is coated onto the surface of the board 5 from above the circuit 7, and a pattern mask 9 is set on the surface of the photosensitive resin 8 (see Fig. 2). (f)). The photosensitive resin 8 is used to form an interlayer insulating layer, and the circuit 7 is completely covered with the photosensitive resin 8. As the photosensitive resin 8, photosensitive polyimide, photosensitive epoxy resin, or the like can be used. Then, by exposing and developing (the photosensitive resin 8 is removed in the part covered by the pattern mask 9 and not exposed, the removed part is used as a pie hole 10 to expose a predetermined part of the circuit 7 (second
Figure (g)). Next, do the same as in Figure 1 (aHb) -C (
Using the mask formed with L 4, back metal 3
The resin layer 2 still lined is adhered to the surface of the photosensitive resin 8, and the back metal 3 is further peeled off from the resin layer 2 (FIG. 2 (11)). Then, a second conductor J-11 is formed by a physical plating method from the surface of the resin layer 2 to the surface of the photosensitive resin 8 in the holes 3 of the resin waste 2 (see FIG.
i)). At this time, a part of the conductor layer 11 has a pie hole 10
and is integrally connected to the circuit 7 within the pipe hole]0. In this way, the second conductor layer 1
After forming 1, the oil layer 2 is peeled off from the surface of the photosensitive resin 8 and removed.
The conductor layer 11 on the surface of the fat layer 2 is also removed at the same time, and the resin 71
! Only the conductor layer 11 formed in the second hole 4 remains on the surface of the photosensitive resin 8 as a second circuit 12, and a circuit can be formed. The second circuit 12 is insulated from the first circuit 7 by using a photosensitive resin 8 as an interlayer insulating layer, and is connected to the first circuit 1 and the second circuit 12 through a pie hole 10. A multilayer circuit board having a two-layer circuit structure can be obtained as shown in steps 1 and 2 (Fig. 2 (j)). Here, the photosensitive resin 8 can be subjected to precise light application by photolithography technology, and the circuit 7,
The reliability of the 12 interlayer connections can be ensured. By repeating the steps shown in FIG. 2(f) to FIG. 2(j), a circuit board having a multilayer circuit structure can be obtained.

Next, the present invention will be specifically explained with reference to Examples.

Fire Ivy - Example] - Polyimide film with a thickness of 50 μm (Kapton, manufactured by DuPont) with polyimide adhesive is used as resin N2, and 1001
A 100 μm thick Al foil cut into corners was used as the back metal 3, and the back metal 3 was thermocompression bonded to the non-adhesive surface of the resin layer 2 to create a mask for circuit formation (FIG. 1(a)). At this time, the surface of the crimping mold is made of Teflon and resin/I2
This prevents the adhesive 1 provided on the surface from adhering.

Next, holes 4 are formed in the resin layer 2 of this mask with a wiring pattern by YAG laser processing as shown in FIG. 1 (+1>).

[YAG laser processing] 2 is a HC manufactured by Ultrasound Industry Co., Ltd. as a device.
-1000, with an output beam diameter of 20 to 100μφ, and the hole 4 was adjusted so that the line width was 50μ and the interval was 75μ
100μφ for forming lands, etc.
A small hole was also formed as part of hole 4.

And a 96% pure alumina substrate (manufactured by Kyocera, dimension 7)
5mm x 75mm x 0.63ma+) to the board 5 and L'
For use, a resin layer 2 of a mask was laminated on the surface of this substrate 5 (FIG. 2 (aHb)). After laminating the resin layer 2 on the substrate 5 in this way, the back metal 3 is peeled off from the resin scrap 2, and then copper is sputtered to form the conductor layer 6.
2(c)(d)). Here, the equipment used for copper sputtering is C magnetron type high speed sputtering equipment (SPF-2108) manufactured by 11 Den Anelva.
The vacuum level is 6 x 10'', 'To
rrSAr pressure 3 X 10-”l'orr.

Output 600V, 0.8A, inorganic substrate temperature 200°C1
The conductor layer 6 with a copper thickness of 8 μm was set for 20 minutes.
was formed. Next, the resin layer 2 was peeled off and the conductor layer 6 on the surface of the resin M2 was removed from the substrate 5, leaving only the conductor layer 6 in the hole 4 portion of the resin layer 2 on the surface of the substrate 5 to form a circuit 7. Figure 2(e)). The first layer circuit was formed as described above.

Next, as the photosensitive resin 8, photosensitive polyimide (DN-6) manufactured by Asahi Kasei 1 was used, and the substrate 5 was placed over the circuit 7.
The film 11 was spin-coated at 3000 rpm for 30 seconds to a thickness of 20 μm, and dried in a clean oven at 70°C for 2 hours (Fig. 2 (f)). After exposing 8, it was baked, and then developed and exposed at 140°C for 1 hour and 400°C in a N atmosphere.
℃ for 1 hour to cure the photosensitive resin 8 as an insulating layer between the eyebrows, and expose a part of the circuit 7 through the pie hole 10 formed in the photosensitive resin 8 (see Fig. 2 (g). )). Here, the exposure is 250
200 +n J/c+n using W ultra-pressure mercury lamp
Baking was performed for 2.25 seconds, and baking was performed for 10 minutes in a clean oven at 70°C. Furthermore, development was carried out using a dedicated developer (A-1, 35) for 100 seconds, and rinsing was performed for 60 seconds using a dedicated rinse (C-200).

After this, repeat steps 1' of laminating the resin scraps 2, sputtering the copper, and peeling off the resin layer 2 in the same manner as in the force distribution method to form the second layer of the circuit 12 (see Fig. 2). 11
) to FIG. 2(j)), circuit boards having a two-layer circuit configuration were obtained.

- L was added to the resin layer 2 of the mask formed in the same manner as in Example 1.
Hole 4 was created by mechanical processing using a device in which a scar and a stub were attached to a block for creating SI original drawings. The holes 4 were formed to have a line width of 50 μm and an interval of 75 μm, and the small holes were formed to have a diameter of 150 μφ. The rest was carried out in the same manner as in Example 1 to obtain a circuit board having a two-layer circuit configuration.

A polyetheretherketone film cut into 100Lo+++ squares was used as resin) ft 2, Ap foil cut into 100+nm squares was used as back metal 3, and back metal 3 was thermocompression bonded to the back side of Q (fat)@2. Later, a polyimide adhesive was applied to the surface of the resin layer 2 to create a mask for forming a circuit. The rest was carried out in the same manner as in Example 1 to obtain a circuit board having a two-layer circuit configuration.

In addition, when forming a circuit using a dry process, the third
The circuit forming mask shown in the figure can also be used. This mask is formed by lining the back side of the metal foil 18 with a M fat film 19 by thermocompression bonding (Fig. 3(a)), and the metal foil may be A (foil, Fe foil,
Ni foil, Cr foil, Cu foil, Pb foil, A8 foil, foil of an alloy of these, etc. can be used, and the resin film 1
As the material 9, any material may be used as long as it is chemically resistant and is not attacked by etching solutions. In this case, an eratin brace 20 is provided on the surface of the metal foil 18, and a pattern mask 21 is further set (Fig. 3 (+1)), which is exposed and developed to be covered with the pattern mask 20 and exposed. Remove the parts that are not included (Figure 3 (C))
. Thereafter, the metal foil 18 is etched using an etching solution or the like to form an etching layer (20) on the metal foil 18.
At the same time, the exposed parts not covered with the elatin blisters are removed, and the elatin blesis 20 is dissolved and removed using a solvent or the like. In this way, holes 4 can be formed in the metal foil 18 in a circuit pattern (FIG. 3(d)), and then an adhesive 1 such as epoxy resin or polyimide is applied to the surface of the metal foil 18.

This mask is then used to form a circuit. First, the metal foil 18 of the mask is attached to the surface of the substrate 5 with an adhesive 1.
(Fig. 4(a)).

The metal foil 18 is pasted on the substrate 5 while being lined with a resin film to maintain the shape of the hole 4. After pasting in this way, the metal foil 18 is
8, the resin film 19 is peeled off (FIG. 4(b)).

Then, the circuit can be formed using the lift-off method in the same manner as shown in Figure 2(c) and below to create a circuit board (
In Figure 2 (11), 0 (metal ff11 instead of fat layer 2)
8 is used). In this case, since the metal foil 18 is laminated to the substrate 5, it is durable and can be reused.

Next, circuit formation using this mask will be further explained using a specific example.

Thickness 50 cut into 100+++m square as metal foil 18 on knot
μ aluminum foil is used, and the resin film 19 has a thickness of 5
Using a 00μ polyester film, a resin film 19 was laminated on the back side of the metal foil 18 by thermocompression bonding (see Figure 3).
a)). Next, an etching resist 20 is applied to the surface of the metal foil 18, and a pattern mask 21 is set (Fig. 3(b)), followed by exposure and development (Fig. 3(c)).

Next, the metal foil 18 is etched and the remaining etching resist 20 is removed with a solvent.
Holes 4 of a circuit pattern were formed in (FIG. 3(d)). Thereafter, epoxy resin adhesive 1 was applied to the surface of metal foil 18 (FIG. 3(e)). In this product, the IL4 was formed to have a line width of 50 μm and an interval of 75 μm, and small holes for forming lands etc. were formed to have a diameter of 150 μΦ. Using the mask formed in this way, the rest is
According to the procedure shown in the figure, a circuit board having a two-layer circuit structure was obtained by straining in the same manner as in Example 1.

Civilian fake ↓ Metal foil 18 cut into 100m + o angle, thickness 30μ
The resin film 19 was laminated on the back surface of the metal foil 18 by thermocompression bonding, using an Ag-Ni alloy foil as shown in FIG.

Holes 4 were formed in this metal foil 18 in the same manner as in Example 1. The holes 4 were formed to have a line width of 25 μm and an interval of 30 μm, and the small holes were formed to have a diameter of 50 μΦ. The rest was carried out in the same manner as in Example 1 to obtain a circuit board having a two-layer circuit configuration.

A with a thickness of 50μ cut into 1001 squares as λ Ryo-Kuage metal foil 18
I foil was used, and the resin film 19 had a thickness of 400 μm.
Next, another method of forming a circuit using a polyethylene terephthalate (PET) film using the same method as in Example 1 will be described.

First, a square-shaped resist 22 is applied to the surface of the substrate 5, and a pattern mask 23 is set.
After exposure and development, the portions of the resist 22 covered by the pattern mask 23 and not exposed to light are removed.

In this way, holes 4 are formed in the resist 22 in a circuit pattern (FIG. 5(C)), and a circuit is formed using the resist 22 provided with the holes 4 as a mask for circuit formation. That is, first, a conductor layer 6 is formed from the surface of the resist 22 to the surface of the substrate 5 in the hole 4 by a physical plating method (FIG. 5(d)). After the conductor N6 is thus formed from the surface of the resist 22 to the surface of the substrate 5 within the hole 4, the resist 22 is dissolved in a solvent and removed. By removing this resist 22, the excess conductor layer 6 on the surface of the resist 22 is removed.
are also removed at the same time, and only the conductor layer 6 formed in the hole 4 of the resist 22 remains on the surface of the substrate 5 as a circuit 7, and a circuit can be formed by the so-called lift-off method (FIG. 5(e)). Furthermore, in manufacturing the circuit board as a multilayer circuit board, a photosensitive resin 8 is coated on the surface of the substrate 5 from above the circuit 7, and a pattern mask 9 is formed on the surface of the photosensitive resin 8.
(Fig. 5(f)). Then, by exposing and developing, the photosensitive resin 8 is removed from the portions covered by the pattern mask 9 and not exposed, and the removed portions are used as pie holes 10 to expose a predetermined portion of the circuit 7 (
Figure 5(g)). Next, a resist 22 is coated on the surface of the photosensitive resin 8 and a pattern mask 24 is set (FIG. 5(h)), exposed and developed to remove the resist 22 in the portions covered by the pattern mask 24 and not exposed. do. In this way, holes 4 are formed in the resist 22 with a circuit pattern (see Fig. 5), and a second layer is formed from the surface of the resist 22 to the surface of the photosensitive resin 8 in the holes 4 using the physical plating method. A conductor Jv111 is formed (FIG. 5(j)). At this time, a portion of the conductor 11 enters into the pipe hole 10 and is integrally connected to the circuit 7 within the pipe hole 10. After forming the second conductor layer 11 in this manner, the resist 22 is dissolved in a solvent and removed. By removing this resist 22, the excess conductor 7 on the surface of the resist 22 is removed.
111, 1 is also removed at the same time, and only the conductor layer 11 formed in the hole 4 of the lenost 2 remains on the surface of the photosensitive resin 8 as the second circuit 12, allowing circuit formation. The second circuit 12 is insulated from the first circuit 7 by using the photosensitive resin 8 as an interlayer M/i, and
A first circuit 7 and a second circuit 9 are connected by a pie hole 10.
In this way, a multilayer circuit board having a two-layer circuit structure can be obtained (FIG. 5(k)).

By repeating the steps shown in FIGS. 5(r) to 5(k), a circuit board having a multilayer circuit structure can be obtained.

Next, a circuit forming method using this resist 22 as a mask will be further explained using a specific example.

5-19N - As board 5 75111111X 75mmX0.63
111[0, an alumina substrate with a purity of 96% is used, and a negative liquid resist 22 is applied to the surface of this substrate 5 to a thickness of 12 μm.
The film was coated, exposed and developed (Fig. 5(a) (+1)).

In this way, holes 4 were formed in the resist 22 with a circuit pattern having a line width of 25μ and a line spacing of 30μ (tIrJS
Figure (C)). Next, copper was sputtered from the surface of the resist 22 to the surface of the substrate 5 in the hole 4 to form a conductor layer 6 with a thickness of 8 μm (FIG. 5(d)). Here, copper sputtering is performed using a C magnetron type high speed sputtering device (SPF-2108) manufactured by Nikkei ANELVA.
using, vacuum level 6 x 10' T 0rrs A r pressure 3 x 10 3 Torr, output 600 V, 0.8 A,
The conditions were set such that the temperature of the inorganic substrate was 200° C. and the time was 20 minutes. Furthermore, the resist 22 was removed by dissolving it with a solvent.

When this resist 22 is removed, the excess conductor layer 6 on the surface of the resist 22 is also removed at the same time, and only the conductor layer 6 formed in the hole 4 of the resist 22 remains on the surface of the substrate 5 as a circuit layer. A circuit 7 was formed (FIG. 5(e)). Next, photosensitive polyimide (1)N-6) manufactured by Asahi Kasei Industries, Ltd. was used as the photosensitive resin 8, and spin coating was performed on the surface of the substrate 5 from above the circuit 7 at 13,000 rpm for 30 seconds to obtain a film thickness of 20 μm. It was coated so as to have the following properties and dried in a clean oven at 70°C for 2 hours (Fig. 5(f)).

Next, photosensitivity +1 (Jilt 8) was exposed, baked, developed, and cured by heating at 140°C for 1 hour and 400°C in a N2 atmosphere for 1 hour, and photosensitive wood Wt8 was used as an insulating layer between the eyebrows. While curing and forming, a part of the circuit 7 was exposed through a pipe hole 10 formed in the photosensitive resin 8 with a size of 5oμφ (FIG. 5(g)).Here, the exposure was 200mJ/cm2 using a 250Wffi high-pressure mercury lamp. .25 seconds, and baking was carried out in a clean oven at 70°C for 10 minutes.Furthermore, development was carried out using a special developer (A-135
) for 100 seconds, and a dedicated rinse (C-200) for 60 seconds.

After this, apply the resist 22 in the same manner as above,
The steps of exposure, development, copper sputtering, and removal of the resist 22 are repeated to form the second layer of the circuit 12.
Figures (11) to 5(k)), circuit 2 with two-layer circuit configuration
01 substrate was obtained.

Specific example 2 Using a dry film as the resist 22, the resist 2
Example 1 except that the hole 4 was formed in a circuit pattern with a line width of 50μ and a line spacing of 60μ in the photosensitive resin 8, and the size of the wire hole 10 formed in the photosensitive resin 8 was set to 100μφ. A circuit board with a two-layer circuit configuration was obtained in the same manner as above.

[Effects of the Invention] As described above, by using the circuit forming mask according to the present invention, a circuit can be formed by a dry process without the need for etching, and various steps unlike etching are not required. The circuit can be formed in a simple process without the need for etching, and there is no risk that impurity ions due to residual etching solution will adversely affect properties such as insulation. There is no fear that such problems will occur, and fine circuits can be precisely formed.

[Brief explanation of drawings]

FIGS. 1(a) to 2(b) are cross-sectional views showing one embodiment of the circuit forming mask of the present invention, and FIGS. 2(a) to (j) show each step of circuit formation using the same mask. 3(a) to 3(e) are sectional views showing 91 structures of other circuit forming masks, and FIGS. 4(a) and 4(b) are schematic sectional views showing circuit formation using the same mask. FIGS. 5(a) to 5(k) are schematic cross-sectional views showing a part of the process of forming other circuits. 1 is an adhesive, 2 is a resin layer, and 3 is a back metal.

Claims (2)

[Claims] (1) A mask for circuit formation, characterized in that it is formed of a resin layer provided with an adhesive on the surface and a back metal laminated on the back side of the resin layer. (2) Claim 1, characterized in that the resin layer is a heat-resistant resin that is easy to laser process, such as polyimide, and the back metal is a metal foil with high laser reflectivity, such as Al foil. The mask for forming the circuit described above.