JPS6335346U - - Google Patents

Info

Publication number
JPS6335346U
JPS6335346U JP12786386U JP12786386U JPS6335346U JP S6335346 U JPS6335346 U JP S6335346U JP 12786386 U JP12786386 U JP 12786386U JP 12786386 U JP12786386 U JP 12786386U JP S6335346 U JPS6335346 U JP S6335346U
Authority
JP
Japan
Prior art keywords
bit
switching
control signal
switching control
bit switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12786386U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12786386U priority Critical patent/JPS6335346U/ja
Publication of JPS6335346U publication Critical patent/JPS6335346U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す構成図、第2
図及び第3図はビツト入換回路の構成図、第4図
はスクランブル通信システムの一例を示す図、第
5図は従来例の構成図である。 2はシリアル/パラレル変換器、3は4ビツト
のビツト入換回路、5はパラレル/シリアル変換
器、35A〜35Dは2ビツトのビツト入換回路
、51及び52はセレクタである。
Fig. 1 is a configuration diagram showing one embodiment of the present invention;
3 and 3 are block diagrams of a bit switching circuit, FIG. 4 is a diagram showing an example of a scramble communication system, and FIG. 5 is a block diagram of a conventional example. 2 is a serial/parallel converter, 3 is a 4-bit bit switching circuit, 5 is a parallel/serial converter, 35A to 35D are 2-bit bit switching circuits, and 51 and 52 are selectors.

Claims (1)

【実用新案登録請求の範囲】 切換え制御信号によつてビツト入換が制御され
る2ビツトのビツト入換回路が複数接続されてな
るビツト入換回路を備え、 上記切換制御信号としてキー情報が供給され、
伝送データが暗号化または復号化されることを特
徴とする信号処理装置。
[Claims for Utility Model Registration] A bit switching circuit comprising a plurality of connected 2-bit bit switching circuits whose bit switching is controlled by a switching control signal, and key information is supplied as the switching control signal. is,
A signal processing device characterized in that transmission data is encrypted or decrypted.
JP12786386U 1986-08-22 1986-08-22 Pending JPS6335346U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12786386U JPS6335346U (en) 1986-08-22 1986-08-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12786386U JPS6335346U (en) 1986-08-22 1986-08-22

Publications (1)

Publication Number Publication Date
JPS6335346U true JPS6335346U (en) 1988-03-07

Family

ID=31023021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12786386U Pending JPS6335346U (en) 1986-08-22 1986-08-22

Country Status (1)

Country Link
JP (1) JPS6335346U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998003955A1 (en) * 1996-07-19 1998-01-29 Takaaki Nakamura Digital data shuffling/deshuffling system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52124806A (en) * 1976-04-13 1977-10-20 Oki Electric Ind Co Ltd Switch drive
JPS60164787A (en) * 1984-02-07 1985-08-27 沖電気工業株式会社 Shift cipher system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52124806A (en) * 1976-04-13 1977-10-20 Oki Electric Ind Co Ltd Switch drive
JPS60164787A (en) * 1984-02-07 1985-08-27 沖電気工業株式会社 Shift cipher system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998003955A1 (en) * 1996-07-19 1998-01-29 Takaaki Nakamura Digital data shuffling/deshuffling system

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