JPS6335323U - - Google Patents
Info
- Publication number
- JPS6335323U JPS6335323U JP12900986U JP12900986U JPS6335323U JP S6335323 U JPS6335323 U JP S6335323U JP 12900986 U JP12900986 U JP 12900986U JP 12900986 U JP12900986 U JP 12900986U JP S6335323 U JPS6335323 U JP S6335323U
- Authority
- JP
- Japan
- Prior art keywords
- detection circuit
- intermediate frequency
- receiving
- station detection
- switched
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 230000003321 amplification Effects 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 1
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Superheterodyne Receivers (AREA)
Description
第1図は、本考案の局検知回路を備えたチユー
ナの一実施例の要部回路図であり、第2図は、従
来の局検知回路を備えたチユーナの要部回路図で
あり、第3図は、第2図のチユーナからアンテナ
をみたインピーダンス特性であり、第4図は、第
2図の受信感度特性である。
3:チユーナ、10:中間周波増幅回路、11
:局検知回路、17:トランジスタ。
FIG. 1 is a circuit diagram of a main part of an embodiment of a tuner equipped with a station detection circuit of the present invention, and FIG. 2 is a circuit diagram of a main part of a tuner equipped with a conventional station detection circuit. 3 shows the impedance characteristics seen from the tuner in FIG. 2 to the antenna, and FIG. 4 shows the receiving sensitivity characteristics in FIG. 2. 3: tuner, 10: intermediate frequency amplification circuit, 11
: Station detection circuit, 17: Transistor.
Claims (1)
信号の有無によつて中間周波増幅回路の利得を切
り換えて前記局検知回路に与えられる中間周波信
号のレベルをLo受信時とDx受信時とで切り換
えることを特徴とするチユーナ。 In a tuner equipped with a station detection circuit, the gain of the intermediate frequency amplification circuit is switched depending on the presence or absence of a search signal, and the level of the intermediate frequency signal given to the station detection circuit is switched between when receiving Lo and when receiving Dx. Characterized by Chiyuna.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986129009U JPH0611649Y2 (en) | 1986-08-25 | 1986-08-25 | Chiuna |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986129009U JPH0611649Y2 (en) | 1986-08-25 | 1986-08-25 | Chiuna |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6335323U true JPS6335323U (en) | 1988-03-07 |
JPH0611649Y2 JPH0611649Y2 (en) | 1994-03-23 |
Family
ID=31025198
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986129009U Expired - Lifetime JPH0611649Y2 (en) | 1986-08-25 | 1986-08-25 | Chiuna |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0611649Y2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4721047U (en) * | 1971-03-08 | 1972-11-09 |
-
1986
- 1986-08-25 JP JP1986129009U patent/JPH0611649Y2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4721047U (en) * | 1971-03-08 | 1972-11-09 |
Also Published As
Publication number | Publication date |
---|---|
JPH0611649Y2 (en) | 1994-03-23 |
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