JPS6333293B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to integrated circuits or super integrated circuits (hereinafter both are collectively referred to as integrated circuits) in which a different pattern is formed on a wafer for each chip or each wafer using an electron beam lithography system. This relates to a manufacturing method for circuits.

As the pattern dimensions of integrated circuits become smaller year by year, it has become impossible to manufacture them using conventional mask manufacturing methods using optical exposure technology, and it has become essential to form fine patterns using electron beam lithography equipment instead. Ta. Furthermore, in order to shorten the integrated circuit manufacturing process, a direct writing method using an electron beam has begun to be used without going through a mask manufacturing process.

First, the outline of the integrated circuit manufacturing process using an electron beam lithography system will be explained as follows. A workpiece prepared by placing an etching material, usually an oxide film or a metal film, on a wafer substrate and then coating a resist film on top of the etching material is placed on a sample stage in an electron beam housing, and the part corresponding to the pattern is etched with an electron beam. The beam is moved under computer control and irradiates the material to be processed. The irradiated areas undergo a polymerization reaction with the resist, and if the resist material is positive, it becomes soluble in the developer, and if it is a negative resist, it becomes insoluble. The soluble region then becomes a window for the next etching process to form a diffusion or wiring pattern. When forming the next layer, a pattern is formed by the same operation.

It is natural that the pattern to be drawn in the manufacturing process using the above-mentioned electron beam lithography equipment differs depending on the type of product, but as the range of applications for integrated circuits has recently expanded and the number of different products has become smaller, , the number of types of patterns is extremely large. Therefore, in order to write these patterns using an electron beam lithography system, it is necessary to convert an extremely wide variety of pattern design data into data for driving the system, and in doing so, it is necessary to strictly check the type of wafer. There is.

However, in the past, even though the above conversion process was simply applied to all types, the type of wafer was manually checked for each wafer, so the computer processing time and human labor required for the process were enormous. Therefore, it was easy to make a check error.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a method of manufacturing integrated circuits that includes a patterning technique for efficiently and error-free manufacturing of a wide variety of integrated circuits using an electron beam writing system. There is a particular thing.

The present invention has been made from the following viewpoints to achieve the above object. In other words, among the various products mentioned above are programmable read-only memories PROM (Programmable Read Only memory).
We focused on the fact that there are many products that have a common pattern except for the Memory part, and products that can become new types by partially changing the wiring, such as master slice integrated circuits. We decided to consider the pattern data as one file (named the common file), and keep only the pattern data of small-scale changes in another file (named the small file), and these common files and small files. It is efficient to construct a desired chip pattern by a combination of the following. For this purpose, all or part of the chip is provided with a code marker for distinguishing the type of chip.

According to the present invention, there is provided a method for manufacturing a semiconductor device in which at least two types of chips having desired patterns are formed on a semiconductor wafer by controlled scanning of a loaded beam, The pattern is divided into a common pattern part that is common to all chips and a pattern part that differs depending on the type of chip, and a common file containing the data of the common pattern part and the at least two types of mutually different pattern parts are created. a step of providing a small-scale file having data; a step of forming a code marker on the wafer indicating data of a pattern portion constituting the small-scale file; and a step of scanning the code marker with a charged beam. Analyzing a code from the detection code, and drawing the desired pattern by scanning charged particles in a controlled manner based on data obtained from the small-scale file indicated by the analyzed code and the common file. A method for manufacturing a semiconductor device is obtained, including the steps of:

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a diagram illustrating two examples (a) and (b) of the structure of chips on a wafer used in the manufacturing method of the present invention. In FIG. 1A, a marker detection area 11 is provided in a part of the wafer 10, and information indicating the arrangement and type distinction of chips 12 in which three types of chips A, B, and C are mixed after this area is provided in this area. This is an example of forming a code marker containing
This is an example in which marker detection areas 13, 14, and 15 are provided at three locations.

For example, when a wafer as shown in FIG. Create a scheduler accordingly. After that, electron beam lithography is performed according to the scheduler's instructions.

FIG. 2 is a diagram showing an example of a code marker used in the manufacturing method of the present invention, in which (a) shows the configuration of the code marker, (b) shows the signal detected from the code marker in (a), and (c ) represents the code number, and (d) represents the state in which two types of files corresponding to the two codes are selected. Such codes are sequentially arranged as many times as there are chips arranged on the wafer.

To explain in order below, (a) shows a state in which, for example, an oxide film 21 is formed on a wafer 20 and partially etched to form a 10-bit code. Bit number P ₀ P ₁ at each etching position
...... P ₉ is added so that the files that make up the corresponding chip can be identified. (b) The above (a) was obtained by electron beam scanning.
This represents the signal detected from the code marker. In this case, (c) is P ₀ ………P ₉ is 2 ⁰ ………
2 ⁹ , the total number of positions in the code is 2 ⁰ + ^{2 2} + 2 ³ + 2 ⁸ = 269,
This indicates that the type of file constituting the chip corresponding to this number is selected. (d) shows that it is also possible to associate two or more types of chips with one code marker; in this case, two types of files, No. 13 and No. 256, were selected. An example is shown.

Here, pattern formation will be explained with reference to FIGS. 1 and 2.

The simplest method is to provide only one marker detection area as shown in Fig. 1, and within this area, a code marker indicating chip A, a code marker indicating chip B,
And the code markers indicating chip C are A, B, C,
Chips C, B, A, . . . are formed in the same order as the number of chips to be formed on the same wafer 10. In this case, if the number of code markers is too large to fit into one marker detection area, or if you want to divide them for some reason, create multiple marker detection areas 13, 14, 15 as shown in Figure 1b, and Form code markers.

The most basic form of forming code markers in the marker detection area is to form one code marker each indicating chip A, chip B, and chip C in area 11, with reference to FIG. 1a, and then Form a calling code marker.

In this case, the first bit of the code marker is a bit that distinguishes whether the code marker is a code marker representing chips A, B, or C or a call code marker. In this case, it is distinguished as "0".

Since 2 bits are sufficient to distinguish between the three types of call code markers, A, B, and C, we remove the first bit that distinguishes each type of code marker, and divide the rest into four 2-bit units, each unit being Configure to indicate the type of chip. Furthermore, a plurality of call code markers may be successively formed as necessary.

Note that when the chip type is 5 to 8, the bits may be divided into units of three.

When the number of small-scale circuit files is relatively small and chips of the same type are often arranged consecutively, the number indicated by the first few bits is used as the code number of the small-scale file, as shown in Figure 2 (d). If the number indicated by the last few bits is the number of chips of the same type that appear consecutively thereafter, the number of required code markers can be reduced.

FIG. 3 is a diagram showing the pattern configuration of a chip that is highly effective in the present invention. Only a part of the area 31 of the chip 30 is 32(X) or 3 depending on the product.
3(Y) and 34(Z) are different from each other. For example, the area 31 corresponds to a PROM part,
In the figure, 35 and 36 are contact patterns arranged on the matrix and correspond to the contents of X, Y, and Z. Then, X, Y, and Z are saved as separate pattern data files, and each file is selected when the type is recognized by the method of the present invention.

FIG. 4 shows the flow of a method for manufacturing a semiconductor according to the method of the present invention. The constituent types of the wafer are determined based on the design specifications 41 (41), and a corresponding code marker is created on the wafer by performing an oxidation and etching process (42). The wafer is placed in an electron beam lithography system (43). The electron beam is scanned over the code marker (44), the marker is detected by a detector (45), the code is analyzed from the detection signal (46), and the data file corresponding to the code is read into the data file for drawing ( 47).
The pattern is then drawn under the control of an electronic computer (48).

In the above case, as shown in Figure 1a or b, if information indicating the arrangement and type of chips is stored in one or more locations on the wafer, the data file processing can be done all at once. Furthermore, electron beam lithography and data processing can be performed in parallel without error.

Therefore, according to the semiconductor manufacturing method of the present invention, it is possible to perform data processing related to electron beam lithography very efficiently and error-free when many types of wafers are mixed in small quantities, and the TAT ( Turn-around time) is significantly reduced, which helps improve reliability.

[Brief explanation of the drawing]

FIG. 1 is a diagram illustrating two examples (a) and (b) of the structure of chips on a wafer used in the manufacturing method according to the present invention, and FIG. 2 is a diagram illustrating the encoding of code markers used in the manufacturing method according to the present invention. This shows an example of
(a) is the configuration of the encoded code marker, (b) is the signal detected from the marker in (a), (c) is the code number, (d)
3 represents the state in which two types corresponding to the two codes are selected, respectively. FIG. 3 is a diagram showing the pattern configuration of a chip that is highly effective according to the present invention, and FIG. 4 is a diagram showing the semiconductor manufacturing method according to the method of the present invention. It is a figure showing the flow of a method. Explanation of symbols: 10 is a wafer, 11 is a code marker, 12 is a chip, 13 to 15 are code markers, 20 is a wafer, 21 is an oxide film, 30 is a chip, 31 is a region 32, 33, and 34 that are different from each other. The areas to be entered, 35 and 36, are contact patterns arranged on the matrix, and 41 to 48 represent the respective steps in semiconductor manufacturing.

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device in which at least two types of chips with desired patterns are formed on a semiconductor wafer by controlled scanning of a charged beam, the method comprising: It is divided into a common pattern part that is common to chips and a pattern part that differs depending on the type of chip, and a common file that has data for the common pattern part and a small file that has data for at least two types of mutually different pattern parts. a step of providing a file, a step of forming a code marker indicating data of a pattern portion constituting the small-scale file on the wafer, and a step of generating a code from a detection code obtained by scanning the code marker with a charged beam. and drawing the desired pattern by scanning charged particles in a controlled manner based on data obtained from the small-scale file indicated by the analyzed code and the common file. A method for manufacturing a semiconductor device.