JPS6333217U - - Google Patents

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Publication number
JPS6333217U
JPS6333217U JP12671386U JP12671386U JPS6333217U JP S6333217 U JPS6333217 U JP S6333217U JP 12671386 U JP12671386 U JP 12671386U JP 12671386 U JP12671386 U JP 12671386U JP S6333217 U JPS6333217 U JP S6333217U
Authority
JP
Japan
Prior art keywords
signal
sample
full
peak value
half period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12671386U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12671386U priority Critical patent/JPS6333217U/ja
Publication of JPS6333217U publication Critical patent/JPS6333217U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の周波数変換回路の一実施例を
示す電気回路図、第2図a〜fは上記第1図に示
す周波数変換回路に入力する正弦波及びその全波
整流波及び上記電気回路図における各点における
波形図、第3図a,b,cは従来の回転センサー
からの出力波形をマイコンで処理する場合の不都
合を説明するための概略図である。 1a,1b……コネクタ、3……全波整流器、
11……オペアンプ、12……コンデンサ(サン
プルホールド手段)、13′14……ダイオード
、15……抵抗、16……シユミツトトリガ回路
、17……フリツプフロツプ回路。
FIG. 1 is an electric circuit diagram showing an embodiment of the frequency conversion circuit of the present invention, and FIGS. 2 a to 2f show the sine wave input to the frequency conversion circuit shown in FIG. Waveform diagrams at each point in the circuit diagram, FIGS. 3a, 3b, and 3c, are schematic diagrams for explaining inconveniences when the output waveform from a conventional rotation sensor is processed by a microcomputer. 1a, 1b...connector, 3...full wave rectifier,
11... operational amplifier, 12... capacitor (sample and hold means), 13'14... diode, 15... resistor, 16... Schmitt trigger circuit, 17... flip-flop circuit.

Claims (1)

【実用新案登録請求の範囲】 一周期の前半の半周期及び後半の半周期のそれ
ぞれの時間的中央部でピーク値を有する周期的信
号を発生する周期的信号発生器において、 上記周期的信号を全波整流する手段と、 この全波整流された個々の波形のピーク値にお
いてサンプルホールドする手段と、 このサンプルホールドされた信号をクロツク入
力信号とするフリツプフロツプ回路と、 を具備し、上記周期的信号の2倍の周波数の信号
を取出すようにしたことを特徴とする周波数変換
回路。
[Claims for Utility Model Registration] A periodic signal generator that generates a periodic signal having a peak value at the temporal center of each of the first half period and the second half period of one period, means for full-wave rectification; means for sample-and-holding at the peak value of each of the full-wave rectified waveforms; and a flip-flop circuit that uses the sample-and-held signal as a clock input signal. 1. A frequency conversion circuit characterized in that it extracts a signal with a frequency twice that of .
JP12671386U 1986-08-20 1986-08-20 Pending JPS6333217U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12671386U JPS6333217U (en) 1986-08-20 1986-08-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12671386U JPS6333217U (en) 1986-08-20 1986-08-20

Publications (1)

Publication Number Publication Date
JPS6333217U true JPS6333217U (en) 1988-03-03

Family

ID=31020781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12671386U Pending JPS6333217U (en) 1986-08-20 1986-08-20

Country Status (1)

Country Link
JP (1) JPS6333217U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01221614A (en) * 1988-03-01 1989-09-05 Mitsubishi Electric Corp Crank angle detecting device for engine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01221614A (en) * 1988-03-01 1989-09-05 Mitsubishi Electric Corp Crank angle detecting device for engine

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