JPS6331685U - - Google Patents

Info

Publication number
JPS6331685U
JPS6331685U JP12456086U JP12456086U JPS6331685U JP S6331685 U JPS6331685 U JP S6331685U JP 12456086 U JP12456086 U JP 12456086U JP 12456086 U JP12456086 U JP 12456086U JP S6331685 U JPS6331685 U JP S6331685U
Authority
JP
Japan
Prior art keywords
delay device
output signal
input signal
signal
horizontal scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12456086U
Other languages
Japanese (ja)
Other versions
JPH054376Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12456086U priority Critical patent/JPH054376Y2/ja
Publication of JPS6331685U publication Critical patent/JPS6331685U/ja
Application granted granted Critical
Publication of JPH054376Y2 publication Critical patent/JPH054376Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Picture Signal Circuits (AREA)
  • Television Signal Processing For Recording (AREA)
  • Processing Of Color Television Signals (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の構成を示すブロツ
ク図。第2図は本考案の他の実施例の構成を示す
ブロツク図。第3図は本考案の一実施例の作用の
説明に供する線図。第4図は従来例の構成を示す
ブロツク図。 10……遅延器、QおよびQ……トランジ
スタ、12……差動増幅器。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of another embodiment of the present invention. FIG. 3 is a diagram for explaining the operation of one embodiment of the present invention. FIG. 4 is a block diagram showing the configuration of a conventional example. 10...Delay device, Q1 and Q2 ...Transistor, 12...Differential amplifier.

Claims (1)

【実用新案登録請求の範囲】 (1) 1水平走査周期または2水平走査周期より
も1/2色搬送波周期だけ長時間または短時間、
入力カラー映像信号を遅延させる遅延器と、遅延
器への入力信号と遅延器からの出力信号との和成
分に対し、遅延器への入力信号と遅延器からの出
力信号との差成分の比率を調整可能にした増幅手
段とを備えたことを特徴とする輪郭強調回路。 (2) 遅延器は遅延器の入力信号を遅延器の出力
信号に、ドロツプアウト検出に伴つて切替える切
替え手段を備えたことを特徴とする実用新案登録
請求の範囲第1項記載の輪郭強調回路。
[Claims for Utility Model Registration] (1) Longer or shorter time than one horizontal scanning period or two horizontal scanning periods by 1/2 color carrier wave period;
A delay device that delays the input color video signal, and the ratio of the difference component between the input signal to the delay device and the output signal from the delay device to the sum component of the input signal to the delay device and the output signal from the delay device. An outline enhancement circuit characterized by comprising: an amplification means that allows adjustment of the contour enhancement circuit. (2) The contour emphasizing circuit according to claim 1, wherein the delay device includes switching means for switching the input signal of the delay device to the output signal of the delay device upon detection of a dropout.
JP12456086U 1986-08-15 1986-08-15 Expired - Lifetime JPH054376Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12456086U JPH054376Y2 (en) 1986-08-15 1986-08-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12456086U JPH054376Y2 (en) 1986-08-15 1986-08-15

Publications (2)

Publication Number Publication Date
JPS6331685U true JPS6331685U (en) 1988-03-01
JPH054376Y2 JPH054376Y2 (en) 1993-02-03

Family

ID=31016688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12456086U Expired - Lifetime JPH054376Y2 (en) 1986-08-15 1986-08-15

Country Status (1)

Country Link
JP (1) JPH054376Y2 (en)

Also Published As

Publication number Publication date
JPH054376Y2 (en) 1993-02-03

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