JPS6331140B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase synchronization circuit for obtaining a reference phase synchronization signal necessary for coherent detection demodulation in phase modulation communication, and particularly to a phase synchronization circuit in fourth-order modulation.

In conventional circuits of this type, there is a method of multiplying the input signal to erase phase information, but this method has the drawback that the multiplication order increases in proportion to the number of modulation phases, and the frequency to be handled becomes higher. In addition to this, the input signal is detected using the output of the voltage controlled oscillator as a reference phase, the input received signal is re-modulated using the detection signal to erase phase information, and the phase is compared with the output of the oscillator to generate the oscillator. Furthermore, there are methods that re-modulate the output of a voltage-controlled oscillator using a detection signal, compare the phase of this modulated wave with the input received signal, and then control the oscillator with a signal that corresponds to the phase difference. It is being However, all of them have drawbacks such as complex circuit configurations, time delays during remodulation, and difficulty in adjusting the delay time during high-speed operation. Generally, a demodulation phase synchronization circuit in four-phase modulation requires four phase detection circuits.

The present invention solves these various conventional drawbacks and provides a phase synchronization signal that can obtain a reference phase signal for synchronous detection of a four-phase modulated wave with a simple configuration. It is characterized by using a phase detection circuit.

FIG. 1 is a block diagram showing an embodiment of the demodulation of a four-phase modulated wave according to the present invention. 1 is a signal input terminal, 2, 3 and 4 are phase detectors, 5 and 6 are π/2 radian and π/4 radian phase shifters, respectively, and 7 takes the difference between the output signals of phase detectors 2 and 3. Arithmetic circuit that performs arithmetic operations, 8, 9, 1
0 and 11 are waveform shaping circuits, 12, 13 and 14 are exclusive OR operation circuits, 15 is a low-pass wave generator, 16 is a voltage controlled oscillator, and 17 and 18 are demodulated signal output terminals. The four-phase phase modulated wave inputted from the input terminal 1 is detected by the phase detector 2, using the output phase of the voltage controlled oscillator 16 and a carrier wave having a phase difference of π/4 and π/2 radians with respect to this phase.
Phase detection is performed at 3 and 4. Difference signals between each phase-detected signal and the output signals of phase detectors 2 and 3 are generated by waveform shaping circuits 8, 9, 10 and 1.
1, each is shaped into a digital signal. The output signals of the waveform shaping circuits 8 and 9 are output from the logic circuit 1.
Exclusive OR operation is performed in step 2. Further, the output signals of waveform shaping circuits 10 and 11 are subjected to an exclusive OR operation in logic circuit 13. Furthermore, logic circuit 1
After the output signals of 2 and 13 are subjected to an exclusive OR operation in the logic circuit 14, high frequency components are removed in the low frequency generator 15, and the oscillation frequency of the voltage controlled oscillator 16 is controlled, and the carrier wave for phase detection is is sent to phase detectors 2, 3, and 4.

Furthermore, FIG. 2 is a waveform diagram showing the waveforms of each part of this circuit, and the explanation will be made using this waveform diagram. The output signal of the voltage oscillator 16 and the signal obtained by shifting the phase of this signal by π/2 radians and π/4 radians are used as reference phase signals, respectively, and the input four-phase phase modulated wave (for example, the carrier wave is
= 0, π/2, π, 3π/2) is phase-detected, the output is the transmission phase information φ =
0, π/2, π, and 3π/2, respectively, as shown in FIG. 2 A, B, and C. And A,
The difference calculation output signal waveform of B is as shown in D, and the waveform shaping circuit output of each signal is digitized as shown by the dotted line. Further, the exclusive OR outputs of the waveform shaping circuits 8 and 9 have a waveform as shown in FIG. 2E, and the exclusive OR circuit outputs of the waveform shaping circuits 10 and 11 have a waveform as shown in FIG. 2F. The exclusive OR output of this output and the output of the circuit 12 is as shown in FIG. 2G, and the transmission phase information φ=0, π/2, π,
It remains constant regardless of 3π/2. That is, in this circuit, when .theta.=.pi./4, 3/4.pi., and 5/4.pi., the phase-locked loop is in a balanced state, and demodulated outputs from the output terminals 17 and 18 in FIG. 1 are obtained.

Note that a sum calculation circuit is used instead of the difference calculation circuit 7 in FIG. 1, and a sum calculation circuit is used instead of the π/4 radian phase shifter 6.
The same result can be obtained by using a 3π/4 radian phase shifter. Additionally, in general, a four-phase demodulation circuit requires four phase detection circuits, but
According to the present invention, only three pieces are required.

As described above, according to the phase synchronized circuit of the present invention, the circuit configuration is simplified compared to the conventional inverse modulation method and remodulation method, and the circuit structure is simplified compared to the conventional inverse modulation method and remodulation method.
No PM conversion occurs. Furthermore, since the control signal applied to the voltage controlled oscillator is a square wave, the loop gain can be increased and a wide frequency pull-in range can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a phase synchronization circuit for four-phase phase modulated waves according to the present invention, and FIG. 2 is a waveform diagram showing waveforms of various parts. 1... Signal input terminal, 2, 3, 4... Phase detector, 5... π/2 radian phase shifter, 6... π/4
Radian phase shifter, 7... Difference calculation circuit, 8, 9, 1
0, 11... Waveform shaping circuit, 12, 13, 14...
...Exclusive OR operation circuit, 15...Low pass wave generator, 16...Voltage controlled oscillator, 17, 18...Demodulated signal output terminal.

Claims (1)

[Claims] 1 first, second, and third phase detection circuits that receive and phase-detect four-phase modulated signals, respectively;
and a first and second waveform shaping circuit that respectively receive and waveform-shape the output of the second phase detection circuit; a first exclusive-OR circuit that receives the outputs of both waveform-shaping circuits and performs an exclusive-OR; an arithmetic circuit that receives the outputs of the first and second phase detection circuits and calculates the difference (or sum) thereof; and third and fourth waveform shaping circuits that receive and shape the outputs of the arithmetic circuit and the third phase detection circuit, respectively. a second exclusive OR circuit that receives outputs from both waveform shaping circuits and performs an exclusive OR operation; and a second exclusive OR circuit that receives outputs from the second and first exclusive OR circuits and performs an exclusive OR operation. 3, a voltage controlled oscillator whose oscillation phase is controlled by the exclusive OR circuit output, and an output of the voltage controlled oscillator and the output and π/2 and π/4 (or
3π/4) means for respectively outputting signals having different phases as reference phase signals to the first, second and third phase detection circuits.