JPS63309005A - Phase modulation circuit - Google Patents

Abstract

PURPOSE:To miniaturize and simplify a circuit structure regardless of the number of phases by generating a wave which is phase-modulated according to sent data by using a digital signal obtained by adding sum data based upon the sent data to a counted value of clock pulses. CONSTITUTION:A counter 6 counts clock pulses from a pulse generator 1 and inputs a three-bit sequential binary signal to an adder 7. The adder 7 adds the input binary sequential signal to sum data D1 and D2 inputted from a sum data input terminal 70 and inputs the addition result to a converter 8. The converter 8 converts the sequential binary signal into an artificial sine wave and inputs it to a band-pass filter 5, which reduces its unnecessary frequency components to perform waveform shaping processing so that the wave approximates to a real sine wave. Therefore, the need for a circuit which generates carriers by the phases and an output switching part for the circuit is eliminated, and the circuit constitution is reduced in size and simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase modulation circuit used in a modem of a data terminal V device or the like.

(Prior Art) Generally, a data terminal device is equipped with a modem, and when transmitting data to a data terminal device on the receiving side, the data terminal device on the transmitting side converts the digital signal into an ablog signal to create a carrier wave. At the same time, this carrier wave is transmitted f
The signal is phase-modulated based on the signal and sent to the communication line.

Figure 3 shows the configuration of a conventional four-phase phase modulation circuit used in this type of modem, in which 1 is a pulse generator, 2 is a controller, 3 is a Gi D/A converter, and 4 is a The switching circuit 5 is a band pass filter.

In FIG. 3, a pulse generator 1 generates cock pulses at a constant period.

The performance section 2 receives input from the pulse generator 1 or 1-
] Processing is performed based on the pulse, and digital signals obtained by this processing are input to D/A converters F[3a to 3d, respectively.

1) The /A converters 3a to 3d each generate a pseudo sine wave based on the digital signal input from the abstraction section 2.

In generating the pseudo sine waves from the D/A converters 3a to 3d in this way, the performance cylinder section 2 uses the multiplexed principle to generate the pseudo sine waves from the D/A converters 3a to 3d,
In addition, the effected digital signals are created so that their phases differ by 90'', and the f digital signals are input to each of the D/A converters 3a to 3d.

In this way, the pseudo sine waves generated from the D/A converters 3a to 3d, each having a phase difference of 90", are transferred to the switching circuit 4.
One of them is selected and input to the bandpass filter 5.

At this time, if the connection between the outputs of the D/A converters 3a to 3d and the switching circuit 4 is switched according to the transmission data, a pseudo sine wave whose phase is modulated by the transmission data is obtained at the input of the bandpass filter 5. be able to.

This pseudo sine wave is band-limited by the bandpass filter 5, and is sent out to the line as a modulated wave with unnecessary frequency components removed.

In such a conventional phase modulation circuit, D
/A converters are required for the number of phases, and in particular, as the number of phases increases, the size and complexity of the structure becomes remarkable.

(Problems to be Solved by the Invention) As described above, the conventional phase modulation circuit described above requires D/A converters for each phase to generate pseudo sine waves with different phases, so the circuit structure is It was inevitable that they would become larger and more complex.

The present invention has been made in view of the above-mentioned circumstances, and it is an object of the present invention to provide an A-phase modulation circuit whose circuit structure can be kept small and simple regardless of the number of phases.

[Optical Configuration] (Means for Solving the Problems) The phase modulation circuit of the present invention includes a pulse generator that generates clock pulses of a constant period, and a pulse generator that counts the clock pulses and adds modulation data to the count value. a brightener that outputs 90 points of addition data given according to the adder, and an adder that generates a pseudo sine wave containing a phase modulation component according to the addition data based on the output of the adder.
It is configured to include a pseudo f-sine wave conversion circuit and a band pass means for band-limiting and passing the pseudo sine wave.

(Function) In the phase modulation circuit of the present invention, the addition data is determined according to the modulation data, and when this addition data is input to the adder, the output of the additive value/pseudo sine wave conversion circuit is the addition data. Accordingly, it is possible to obtain a pseudo sine wave that is subphase modulated, and it is possible to reduce the number of N/A converters used in conventional equipment, which are required for each phase to jq such a pseudo sine wave. can.

(Example) Hereinafter, an example of the present invention will be described in detail based on the accompanying drawings.

FIG. 1 is a block diagram showing an embodiment of a phase modulation circuit according to the present invention, and parts having the same functions as those of the conventional phase modulation circuit shown in FIG. 3 are given the same reference numerals. ing.

The phase modulation circuit of the present invention shown in FIG.
and the bandpass filter 5, a 3-bit bi-counter (hereinafter referred to as a counter), 6.3-bit digital adder (hereinafter referred to as an adder), 7.3-bit sequential binary signal/pseudo sine wave converter (hereinafter referred to as an adder) are installed. 8 (referred to as a converter) are connected to each other.

・The adder 7 is provided with an addition data input terminal 7, which receives 2-bit addition data D, r), each having a different value corresponding to each of the four phases. (Here, Dl is the upper bit and ()2 is the one information bit.) are selectively input based on the modulation process of the transmission data by a modulation control circuit (not shown).

The operation of the phase modulation circuit having such a configuration will be described in detail with reference to the timing chart shown in FIG.

First, the pulse generator 1 generates a clock pulse having a frequency eight times the frequency of a carrier wave created through processing as described later.

The counter 6 counts this clock pulse and inputs it to the cylinder 7 as a binary 3-bit sequential biply signal.

The adder 7 receives the sequential biply signal inputted from the counter 6 and the addition data D1 inputted from the addition data input terminal 70.
．． and D2, and the brightening result is input to the converter 8.

Through this brightening process, the input of the converter 8 is the addition data D1. It becomes a sequential binary signal with a larger count value by D2.

The converter 8 then converts this sequential binary signal into a pseudo sine wave and inputs it to the bandpass filter 5.

In this way, the pseudo sine wave inputted from the converter 8 contains unnecessary high frequencies as it is. The bandpass filter 5 reduces these unnecessary frequency components and performs waveform shaping processing to approximate the sine wave of a soldier.

Now, during the period up to the timing -■o shown in FIG. 2(a), the addition data input terminal 70 of the adder 7 is
- Assuming that Dl, D2 = 0°0 is input as D, D, the output S1 of the converter 8 during the period up to this timing ① is as shown in the same figure (b), from the force f Kuntalo to A regular pseudo sine wave (carrier wave) is formed in which the levels of eight levels sequentially and continuously change corresponding to the six levels of the input sequential biply signal.

Here, the numbers written on each level of the pseudo sine wave indicate the number of sequential biply signals manually inputted from the adder 7 at that time.

On the other hand, at the timing -1° shown in FIG.
For example, when a value of Dl,02=1.0 is input, the subsequent output S1 of the converter 8 becomes a pseudo sine wave (
modulated wave).

In the figure (b), immediately after timing 1o, when the chain of sequential biply signals inputted from the adder 7 should be 3 following the previous 2, Dl is added as D, 1]. Since the value D2=1.0 is input, the value becomes 5, which is thicker by that amount (addition t[2), and the number of level stages of the pseudo sine wave output from the converter 8 due to the sequential biply signal is two stages. A waveform that is advanced by ? The way he does this is praised.

Here, the Kaki data D1. D2 consists of 2 bits, D, D, , =0. Olo, 1.1°0.1.
Since it can take four values of 1, each value can be made to correspond to each of the four phases.

Therefore, the brightening data D1. of values corresponding to each phase determined based on the transmission f-ta. Modulate D2 from the decoration data input terminal 70 3i1! If selective input is made in degrees, the output $1 of the converter 8 at this time will include the brightening data D1. D
A quaternary phase modulated pseudo sine wave can be obtained according to the four values of 2.

In this way, the pseudo sine wave output from the converter 8 is band-limited when passing through the bandpass filter 5, and as shown in FIG.
As shown in C), the modulated wave S2 is output.

Incidentally, as is clear from the above-mentioned operation, the phase modulation circuit of Kimihiro Miki performs polyphase modulation by appropriately adjusting the period of the clock pulse for the carrier wave subjected to phase modulation and the bit configuration of the brightening data. It can also easily support phase modulation.

[Effect between lights]

As explained above, according to the phase modulation circuit of the present invention, the digital signal obtained by adding the enhancement data given based on the transmission f-tater to the count value of the clock pulse is directly applied to the transmission data. Since the configuration is such that the phase-modulated modulated wave is outputted accordingly, the circuit that changes the carrier wave to each color and the output switching section of this circuit, which were used in the conventional arrangement, are required. Unnecessary yelling.

This allows the circuit structure to be miniaturized and simplified, and has the excellent advantage that the benefits increase as the number of phases increases.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the phase modulation circuit according to the present invention, FIG. 2 is a timing chart of signals handled in each part of the phase modulation circuit shown in FIG. FIG. 2 is a block diagram showing the configuration of a conventional phase modulation circuit. 1... Pulse generator, 2... Performance section, 3...
・D/A converter, 4... Selection circuit, 5... Band pass filter, 6... 3-bit piping counter, 7.
... 3-bit digital adder, 8... 3-bit sequential biply number 7/pseudo sine wave converter, 70... Decoration data input terminal. Figure 1 Figure 2 Figure 3

Claims (1)

[Scope of Claims] A pulse generator that generates clock pulses of a constant period; an adder that counts the clock pulses and adds and outputs addition data given according to modulation data to the count value; An addition value/pseudo sine wave conversion circuit that generates a pseudo sine wave containing a phase modulation component according to the added data based on the output of the adder, and a band pass means that limits the band of the pseudo sine wave and passes it through. A phase modulation circuit characterized by: