JPS63303530A - Timing correcting circuit - Google Patents

Abstract

PURPOSE:To freely set the correction characteristic of a peak shift by adjusting the amplitude of the intermediate area frequency component of serial digital data. CONSTITUTION:The digital data of A are added to an intermediate area attenuator 1 having a first attenuating pole at the frequency of the 1/4 of a bit rate and the output signal of the attenuator 1 is added to an LPF2. Since the LPF2 has a linear roll off characteristic, the frequency spectrum distribution at a B point when random digital data are inputted is shown by the full line of Fig.2 and the data such as A' goes to B'. A waveform is obtained in which this is re-converted to a binary signal with a zero cross detecting device 3 and only an inverting edge easy to generate the peak shift of the input signal such as A' is moved to an anti-peak shift side such as C'. Consequently, by the characteristic of the attenuator 1, the correction characteristic of the peak shift can be freely set.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a timing correction circuit that performs recording timing correction or transmission timing correction in digital recording or communication.

2. Description of the Related Art Generally, when binary recording and reproduction of random digital data is performed in a high-density magnetic recording and reproducing apparatus, the spectrum of the reproduced signal is as shown by the solid line in FIG. When trying to reproduce this data using integral detection,
When the recording bit rate is fb, the first and second Nyquist criteria are satisfied by equalizing as shown by the broken line in the figure. However, in practice, in order to avoid an increase in high-frequency noise due to equalization, equalization as shown by the dashed line in the figure is often performed at a roll-off rate of O, S or less. When such equalization is performed, even if phase distortion is eliminated, the recorded data as shown in the waveform of FIG. 7 becomes a peak-shifted waveform as shown in waveform E in the same figure after equalization. Then, the data inversion position of the signal after the zero-cross detection is shifted as shown in waveform F in the figure, and the noise margin in that portion is reduced.

Therefore, in conventional magnetic recording and reproducing apparatuses, various recording correction methods have been proposed and studied in order to reduce the amount of peak shift in reproduced signals due to code amount interference. (for example,
Shigefumi Saiyo, “A study of recording correction in digital magnetic recording,” Institute of Electronics and Communication Engineers Technical Research Report MRys-1o). One of these is recording timing correction, which is a method in which the data inversion position where peak shifts are likely to occur is shifted in advance in the anti-peak shift direction.
For example, US Patent No. 3,482,228/1989 and US Pat.
488662/1970) had the disadvantage that it was necessary to detect in advance a pattern that is likely to cause a peak shift, making the circuit configuration complicated. In an attempt to solve this problem, a method has been proposed in which the high-frequency components of the digital signal are cut off, the signal is passed through a phase modulation circuit consisting of a kind of differentiating circuit, and then the zero cross is detected and used as a recording signal (Japanese Patent Publication No. 165910/1982). No.) is being considered. However, this method has a drawback in that it is not possible to perform timing correction when the data changes from consecutive data inversions to consecutive identical data.

Problems to be Solved by the Invention As mentioned above, the present invention solves the problem that in the conventional technology, the complexity of the circuit and the completeness of the correction are contradictory, and achieves more complete timing correction with a simple circuit configuration. That's what I'm trying to do.

Means for Solving the Problems The present invention provides a mid-range frequency component adjustment means for relatively attenuating the energy of mid-range frequency signal components below Z of the bit rate frequency fb of serial digital data; A high frequency cutoff means for connecting and disconnecting the above components, and a zero cross detection means for detecting a zero cross of the serial digital data via the medium frequency component adjustment means and the high frequency cutoff means are provided, and the zero cross detection means This timing correction circuit is characterized in that the output signal is a transmission or recording signal.

Effect By adjusting the amplitude of the mid-range frequency component of the serial digital data with the above configuration, the modulation index when the serial digital data is regarded as a type of low-carrier FM signal is changed, and this high-frequency The signal whose frequency components are cut off becomes a signal obtained by converting the zero-crossing point. By further detecting this zero cross, it becomes possible to shift the inversion phase of the data in the anti-peak shift direction.

EXAMPLE A first example of the present invention will be described below with reference to FIGS. 1 to 3. Note that FIG. 2 is a spectrum diagram when random data is input at point ■ in FIG. 1, and FIG. 3 shows waveform changes at points ■ and ◎ in FIG.

Digital data as shown in Figure 3 (■) is added to the mid-range attenuator 1, which is a transversal type filter having the first attenuation pole at the frequency of the bit rate, and the mid-range attenuator 1, which is the mid-range attenuation means, is The output signal is filtered by LPF2, which is a high-frequency cutoff means.
In addition to

The roll-off frequency of LPF2 is equal to the bit rate frequency, and the characteristics including the aperture effect due to the waveform occupancy rate of input data being 100% are designed to be almost linear roll-off characteristics as shown by the broken line in Figure 2. . Therefore, the frequency spectrum distribution at the 0 point when random digital data is input is as shown by the solid line in Figure 2,
When digital data as shown in FIG. 3 is added, the waveform at the point becomes as shown in FIG. This is reconverted into a binary signal by the zero-cross detector 3, which is a zero-cross detection means, and only the inverted edges that are likely to cause peak shifts in the input signal, as shown in Figure 31 (■), undergo anti-peak shifts as shown in Figure 3 Ω. The waveform is shifted to the side.

As described above, in this embodiment, the peak shift correction characteristics can be freely set depending on the characteristics of the mid-range attenuator 1. Note that the mid-range attenuator 1 can be easily formed into f4 using a transparsal type filter using an analog delay line or the like.

A second embodiment of the present invention will be described below. In this embodiment, the mid-range attenuator 1 in the first embodiment shown in FIG. 1 is constructed by a transpersal filter using a shift register. Its structure consists of a shift register 11, adders 12 and 14, and a coefficient unit 13, as shown in FIG. Note that the adders 12 and 14 and the coefficient multiplier 13 are for analog use, and are implemented using resistors (IJ cross). With the above configuration, when random data and a clock are input to the shift register 11, the frequency spectrum at the output of the adder 14 becomes as shown by the solid line in FIG. Note that the broken line in the figure shows the frequency spectrum of the input random signal itself. As described above, according to this embodiment, the mid-range attenuator is configured using a shift register, and there is no need to use an analog delay line, which has the advantage of simplifying the circuit configuration and stabilizing the operation. In the embodiments described above, the integral effect that occurs during recording is ignored, but if this is also taken into account, timing correction may be performed by subtracting that amount from the correction amount.

Effects of the Invention As described in the embodiments above, the present invention has the effect that almost perfect timing correction can be performed with a simple circuit configuration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a frequency spectrum diagram, and FIG. 3 is a waveform diagram.
Fig. 4 is a block diagram of the mid-range attenuator which is the mid-range adjustment means of the second embodiment, Fig. 5 is a frequency spectrum diagram for explaining its characteristics, and Fig. 6 is a frequency spectrum diagram for explaining the conventional example. The spectrum diagram and FIG. 7 are waveform diagrams for explaining the movement of the data inversion position due to peak shift. 1...Mid-range attenuator, 2...LPF, 3
...Zero cross detector, 4... Recording amplifier, 6-... To, Do, 11... Shift register, 12... Adder , 13...
・Coefficient unit, 14... Adder. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 Figure 4 Figure 5 Kite Ryo A Momme

Claims (2)

[Claims] (1) A mid-range frequency component adjusting means for relatively attenuating the energy of mid-range frequency signal components of 1/2 or less of the bit rate frequency fb of serial digital data, and a means for cutting off components having a bit rate frequency fb or higher. A high-frequency cutoff means, and a zero-cross detection means for detecting a zero-cross of the serial digital data via the mid-range frequency component adjustment means and the high-frequency cutoff means, and the output signal of the zero-cross detection means is used for transmission or recording. A timing correction circuit characterized in that the signal is set as a signal. (2) The timing correction circuit according to claim 1, wherein the mid-range attenuation means is constituted by a transversal filter using a shift register.