JPS6330071A - Picture shift circuit in horizontal direction - Google Patents

Abstract

PURPOSE:To keep the relation between the number of turns of an adjusting variable resistor and a shift quantity constant by converting a frequency of an input synchronizing signal into a voltage, retarding the input synchronizing signal for a time in response to its output voltage so as of make the shift quantity on a picture pattern independently of the frequency of the input synchronizing signal. CONSTITUTION:The input synchronizing signal Hs is fed to a monostable multivibrator 2 and a frequency voltage converting circuit 7. The monostable multivibrator 2 is triggered by the input synchronizing signal Hs, a delay time Td is set by an adjusting variable resistor to trigger a monostable multivibrator 3 thereby generating a delay synchronizing signal with a prescribed pulse width. Then the signal is fed to a horizontal deflection coil via a horizontal AFC circuit 4, a horizontal oscillator 5 and a horizontal output circuit 6. Further, a constant current from a constant current circuit 8 is controlled by an output voltage Vs of the frequency voltage conversion circuit 7. The constant current is fed to the monostable multivibrator 2 as a delay time control signal. The delay time Td is inversely proportional to the frequency (f) of the input synchronizing signal. Since the shift quantity of the picture to the delay time Td is increased in proportion to the frequency (f), the shift quantity of the picture on the picture with respect to the change in a resistor R27 is made nearly constant independently of the frequency (f).

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a horizontal image shift circuit for a monitor receiver to which horizontal synchronizing signals of two or more frequencies are supplied.

[Summary of the invention]

In this invention, in a horizontal image shift circuit to which horizontal synchronization signals of two or more frequencies are supplied, a frequency-voltage conversion circuit converts the frequency of an input synchronization signal into a voltage, and a time period corresponding to the output voltage of the frequency-voltage conversion circuit is provided. , a delay circuit that delays the input synchronization signal is provided, so that even if the frequency of the input synchronization signal is different, the amount of movement of the image on the screen with respect to the image shift volume is constant, and the input synchronization signal of a certain frequency is When the position of the image is adjusted to the center with respect to the screen, the image is positioned approximately at the center of the screen even with respect to input synchronization signals of different frequencies.

[Conventional technology]

so that it can be used as a computer display.
15.7 (kHz), 18 (kHz),
22 ('-kHz), 32 (kHz),
A monitor receiver that can input signals of various horizontal frequencies such as 35 (kHz) (so-called multi-scan monitor)
It has been known.

When an input video signal is displayed on a multi-scan monitor, the image may not be centered on the screen depending on the signal source (computer). To correct this problem, a horizontal image shift circuit is provided that delays the input horizontal synchronization signal.

Since the timing of the video signal relative to the horizontal synchronization signal varies depending on the frequency of the computer or synchronization signal, the variable range of the shift amount, that is, the delay amount, is set in consideration of the frequency of the computer or synchronization signal. In addition, the variable range of this delay amount is 0, which is a value proportional to the period of the horizontal synchronization signal.For example, when the horizontal frequency is 15 (kHz), it is 8Cμ.
5ec), at 32 (kHz), 4 Ctts
ec).

In the conventional image shift circuit, the variable range of the delay amount is set to a predetermined value required at the lowest frequency (15.7 (kHz)).

[Problem that the invention seeks to solve]

FIGS. 6 and 7 show image shifting operations when the horizontal frequencies are different. In FIG. 6, for example, the horizontal frequency is 15.
7 (k)Iz) (period THI), and FIG.
This is the case of 2). Therefore, the relationship is (TH1#2TH2). 6A and 7A show the video signals supplied to the monitor receiver, and FIGS. 6B and 7B respectively.
respectively indicate the horizontal synchronization signals supplied to the monitor receiver. In the image shift circuit that shifts the displayed image to the center of the screen, the horizontal synchronizing signal Hs shown in FIGS. 6B and 7B, respectively, is delayed and the horizontal synchronization signal Hs shown in FIGS. 6C and 7C, respectively, is delayed. A delayed synchronization signal is formed.

The adjustment volume provided in the image shift circuit is rotated from the minimum position to the maximum position, and the delay amount T is added to the horizontal synchronization signal.
When d is given, in the case of 15.7 (kHz),
The image is moved horizontally by, for example, 5 [mouth], and is moved by 32 (k).
Hz), the image moves by 10 (ell). That is, the sensitivity of the volume changes depending on the frequency of the input horizontal synchronizing signal Hs. Also, regarding a signal with a horizontal frequency of 15.7 (kHz), after adjusting the image to the center of the screen, when a signal with a horizontal frequency of 32 (kHz) is input, the amount of shift of the image on the screen is 15. .7 (kHz
), the image would deviate significantly from the center position, and it would be necessary to perform the adjustment operation again.

Therefore, an object of the present invention is to provide a horizontal image shift circuit in which the amount of shift of an image on a screen with respect to a volume for horizontal image shift is constant regardless of the horizontal frequency.

[Means for solving problems]

In the horizontal image shift circuit according to the present invention, the horizontal image shift circuit is supplied with horizontal synchronization signals of two or more frequencies, and includes a frequency-voltage conversion circuit 7 that converts the frequency of the input synchronization signal into a voltage; A delay circuit 2 is provided to delay the input synchronization signal by a time corresponding to the output voltage of the circuit 7.

[Effect]

The input synchronization signal is delayed by a delay circuit, such as a monostable multipipe rake 2, to form a delayed synchronization signal. Further, the input synchronization signal is supplied to the frequency-voltage conversion circuit 7, and the frequency-voltage conversion circuit 7 generates a voltage Vs proportional to the frequency of the input synchronization signal. The delay time of the monomulti 2 is controlled according to the output voltage Vs of the frequency-voltage conversion circuit 7. This delay time is made smaller as the horizontal frequency becomes higher. Therefore, even when the horizontal frequency of the input signal differs, the amount of shift of the image on the screen is kept constant.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, an input synchronization signal Hs is supplied to an input terminal indicated by 1. This input synchronizing signal Hs is supplied to the monomulti 2 and the frequency-voltage conversion circuit 7.

The monomulti 2 is triggered by the input synchronization signal Hs, and a delay time Td set by a variable resistor (volume) for adjustment occurs in the monomulti 2. mono multi 2
Mono multi 3 is triggered by the output signal. The monomulti 3 generates a delayed synchronization signal with a predetermined pulse width. This delayed synchronization signal is supplied to the horizontal AFC circuit 4.

A horizontal oscillator 5 is provided in association with the horizontal AFC circuit 4,
The output signal of the horizontal oscillator 5 is supplied to a horizontal output circuit 6. A horizontal deflection current generated by the horizontal output circuit 6 is supplied to a horizontal deflection coil (not shown).

The output voltage Vs of the frequency-voltage conversion circuit 7 is supplied to the constant current circuit 8, and the constant current generated by the constant current circuit 8 is controlled by the output voltage Vs of the frequency-voltage conversion circuit 7. This constant current is supplied to the monomulti 2 as a delay time control signal. The frequency-voltage conversion circuit 7 is composed of a monomulti and an integrating circuit.

FIG. 2 shows an example of a monomulti. A pair of transistors designated 10 and 11 are provided, transistor 1
A parallel circuit of a capacitor 15 and a resistor 16 is inserted between the base of transistor 11 and the collector of transistor 11, and a capacitor 17 is inserted between the base of transistor 11 and the collector of transistor 10. Transistors 10 and 1
The collector of 1 is connected to the power supply terminal 14 via resistors 12 and 13.
are connected to each. A resistor 30 is inserted between the base of the transistor 11 and the power supply terminal 14. A synchronizing signal Hs is supplied to an input terminal indicated by 18. This synchronizing signal Hs is supplied to the base of the transistor 11 as a trigger signal via a differentiating circuit 19 and a diode 20. Mono multi is triggered at the timing of the front edge of the synchronization signal HsO. An output terminal 21 is led out from the collector of the transistor 11.

FIG. 3 shows the waveforms of each part of the monomulti shown in FIG. 2, and FIG. 3A is the synchronization signal Hs.

A negative differential pulse generated at the leading edge of the synchronization signal Hs is applied to the base of transistor 11.

In steady state, transistor 10 is turned off and transistor 1
1 is on and the output signal is low level. When a negative differential pulse trigger human force is applied, transistor 1
The base potential of transistor 1 is lowered, the collector potential of transistor 11 is increased, and - instantaneously, transistor 10 is turned on and transistor 11 is turned off. At this time, since the voltage across the capacitor 17 does not change, the transistor 10
The potential at one end of the capacitor 17, which was +Vcc when it was off, becomes 0 [V] when the transistor 10 is on, so the potential at the other end of the capacitor 17 changes from ■, t (voltage drop between the base and emitter of the transistor 11). (VIE-V
CC). After this, the capacitor 17 is connected to the resistor 3.
Current flows through 0, and the base voltage of transistor 11 increases with a time constant determined by capacitor 17 and resistor 30. Then, the base voltage of transistor 11 is VIE
When it becomes larger, transistor 11 turns on and the output falls. FIG. 3B shows the change in the base voltage of the transistor 11, and FIG. 3C shows the output signal.

The pulse width T of the output signal is determined by the capacitance C of the capacitor 17 and the value R of the resistor 30, and is approximately 0.7 RC (sec), regardless of the value of the power supply voltage +VCC.

The frequency-voltage conversion circuit 7 is provided with the above-mentioned monomulti, and the duty ratio of the output signal of the mono multi is changed depending on the frequency of the synchronization signal Hs. The output signal of this monomulti is supplied to the integrating circuit, and from the integrating circuit,
The higher the frequency of the synchronization signal Hs, the larger the output voltage Vs can be obtained. This output voltage Vs is supplied to a constant current circuit 8, and a constant current i corresponding to the output voltage Vs is formed in the constant current circuit 8.

FIG. 4 shows the configuration of an example of the constant current circuit 8 and the monomulti 2. The constant current circuit 8 includes a PNP transistor 22.
is provided, and the emitter of the transistor 22 is connected via a resistor 23 to a terminal 24 to which the output voltage Vs is supplied. This terminal 24 is connected to a resistor 25. It is grounded via a diode 26 and a variable resistor (volume) 27. A connection point between the diode 26 and the variable resistor 27 is connected to the heath of the transistor 22, and a capacitor 28 is inserted between this connection point and ground. Resistance 25. A constant current i, which is equal to the current flowing through the series circuit of the diode 26 and the variable resistor 27, flows between the collector and emitter of the transistor 22.

The monomulti 2 is constructed in the same way as the monomulti shown in FIG. However, the resistor 30 in FIG. 2 is not connected, and the connection point between the base of the transistor 11 and the capacitor 17 is connected to the collector of the transistor 22 of the constant current circuit 8. Therefore, the input synchronization signal H shown in FIG.
A trigger pulse is supplied at the front edge of s, and the voltage change after the base voltage of transistor 11 drops by Vcc becomes linear, as shown in FIG. 5B. FIG. 5C shows an output signal taken out to the output terminal 21, and the pulse width of this output signal is the delay amount Td.

The voltage ■ at the connection point between the capacitor 17 and the base of the transistor 11 is expressed as (V
= V cc + t = T d ), then T
d=(Vcc-C)/i... ■Also, the voltage drop across the diode 26 is Vf, and the resistor 23.
If the resistance values of 25 and variable resistor 27 are R23, R25, and R27, respectively, then...■ In equation 0, if (v f = v, t), then (Vs>V, , ). For example, since the voltage ■3 is proportional to the frequency f of the input synchronizing signal Hs, if we rewrite the equation 0 using the constant k determined by the circuit, we can change the equation 0 to the equation 0 when (R23-R25). Finally, Td is ! becomes.

By changing the resistance value R27 of the variable resistor 27, the delay time Td can be varied and the image can be shifted horizontally on the screen. Also, the value of the delay time Td is
It is inversely proportional to the frequency f of the input synchronizing signal. On the other hand, the amount of shift of the image with respect to the delay time Td increases in proportion to the frequency f. Therefore, the amount of shift of the image on the screen with respect to a change in the resistance value R27 is approximately constant regardless of the frequency f.

〔Effect of the invention〕

According to this invention, the amount of shift of the image on the screen is unrelated to the frequency of the input synchronizing signal, so the relationship between the amount of rotation of the adjustment volume and the amount of shift is kept constant, and When the position of the image is adjusted to the center with respect to the input synchronization signal of , the image is positioned approximately at the center of the screen also with respect to input synchronization signals of different frequencies.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIGS. 2 and 3 are connection diagrams of an example of a monomulti and waveform diagrams of each part used to explain its operation, and FIGS. 4 and 5 are a diagram of a monomulti and The connection diagram of the constant current circuit and the waveform diagrams of various parts used to explain its operation, and FIGS. 6 and 7 are waveform diagrams used to explain the image shift operation when the frequency of the input synchronizing signal is different. Explanation of main symbols in the drawings 1; Synchronous signal input terminal, 2, 3; Mono multi, 7:
Frequency-voltage conversion circuit, 8: Constant current circuit. Agent Patent Attorney Tadashi Sugiura Tomo - 1t' Handling t1 + Anatomy 2nd Figure Breathing Section 3 Figure 5 E) Maruko table drinking list 2 times 7 ↓ Figure 4 Figure 6 Figure 7

Claims (1)

[Claims] A horizontal image shift circuit to which horizontal synchronization signals of two or more frequencies are supplied, comprising: a frequency-voltage conversion circuit that converts the frequency of the input synchronization signal into a voltage; and an output voltage of the frequency-voltage conversion circuit. A horizontal image shift circuit comprising: a delay circuit that delays the input synchronization signal by a corresponding amount of time.