JPS63296146A - Pseudo fault producing method - Google Patents

Pseudo fault producing method

Info

Publication number
JPS63296146A
JPS63296146A JP62132103A JP13210387A JPS63296146A JP S63296146 A JPS63296146 A JP S63296146A JP 62132103 A JP62132103 A JP 62132103A JP 13210387 A JP13210387 A JP 13210387A JP S63296146 A JPS63296146 A JP S63296146A
Authority
JP
Japan
Prior art keywords
fault
hardware
test
fault processing
qualification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62132103A
Other languages
Japanese (ja)
Inventor
Takashi Kumakura
熊倉 隆志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62132103A priority Critical patent/JPS63296146A/en
Publication of JPS63296146A publication Critical patent/JPS63296146A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To perform effective test or qualification even for an unexpected fault event or plural faults, by generating a hardware fault report to a fault processing program, and performing the test and the qualification of the fault processing program. CONSTITUTION:A fault factor generated in individual hardware is incorporated in a program. And the test and the qualification of the fault processing program are performed by producing the hardware fault report to the fault processing program based on either an instruction by a command or scheduled test data. Therefore, it is possible to produce a various kinds of fault phenomena arbitrarily, and to clarify a software interface and a hardware interface, and to perform the test and the qualification of fault processing software sufficiently. In such a way, it is possible to improve the enhancement of a fault processing and a fault recovery function in a complicated on-line real time system and the quality of the fault processing software.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は蓄積プログラム制御のオンラインリアルタイム
システムの障害処理ソフトウェアの試験及び検証を行う
擬似障害発生方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pseudo failure generation method for testing and verifying failure handling software for an online real-time system controlled by a stored program.

〔従来の技術〕[Conventional technology]

従来、ソフトウェア障害処理においては、複雑多様化し
ていくハードウェアの進化に追随できない場合が多く、
システムの信頼性にとって最も重要な役割を果たす障害
処理ソフトウェアの機能の不備、動作の不安定性などの
問題が最終評価試験工程になって初めて検出されるか、
システムのリリース後になって実際のハードウェア障害
に遭遇した時点で検出されるという事列が多々見られた
Traditionally, software failure handling has often been unable to keep up with the evolution of hardware, which is becoming increasingly complex and diverse.
Are problems such as functional deficiencies or operational instability in the fault handling software that play the most important role in system reliability detected only during the final evaluation testing process?
In many cases, actual hardware failures were detected only after the system had been released.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来、この種の障害処理ソフトウェアは想定される単一
ハードウェア障害に対応した構成で作成されており、機
能試験及び検証方法としてもそれらの単一ハードウェア
障害をハードウェアによって擬似的に発生させて障害処
理ソフトウェアの試験及び検証を行う方法しかなかった
。従来のソフトウェア障害処理がハードウェアの進化に
追随できない理由はハードウェア障害に依存する構造と
なっており、また試験及び検証手段としても個々の単一
障害を擬似発生させる方法であるため、各ハードウェア
に起因する単一の障害については対応できるがシステム
の複雑多様化とともに発生頻度が高まってきた想定外の
障害事象や複数の障害については有効な試験及び検証手
段がなく詳細に洗い切れないからである。
Conventionally, this type of fault handling software has been created with a configuration that corresponds to an assumed single hardware fault, and as a function test and verification method, it has been used to simulate that single hardware fault using hardware. The only way to do so was to test and verify the fault handling software. The reason why conventional software fault processing cannot keep up with the evolution of hardware is that the structure is dependent on hardware faults, and also as a test and verification method, it is a method of simulating individual single faults. Although it is possible to deal with single failures caused by hardware, it is not possible to thoroughly investigate unexpected failure events and multiple failures, which are occurring more frequently as systems become more complex and diverse, due to the lack of effective testing and verification methods. It is.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の擬似障害発生方法は、個々のハードウェアにつ
いてのあらゆる発生しうる障害要因をプログラムに内蔵
し、コマンドによる指示及び予め計画された試験データ
のいずれかに基づいてハードウェア障害報告を障害処理
プログラムに対して発生させ、前記障害処理プログラム
の試験及び検証を行うことを特徴とする。
The simulated failure generation method of the present invention incorporates all possible failure factors for individual hardware into the program, and handles hardware failure reports based on either command instructions or pre-planned test data. It is characterized in that it is generated in a program, and the fault handling program is tested and verified.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

本発明の一実施例を示す図を参照すると、コマンドまた
は定期的に作成された障害発生用データに従い各障害処
理を起動し、処理の正常性及び障害復旧処理を確認する
。コマンドによる方法は各装置対応の詳細の障害データ
を作成し、単体詳細試験を行うためのものである。定期
的による方法はコマンドでは洗い切れない複数の装置を
組合せる障害データを作成し、複合競合障害試験を行う
ためのものである。
Referring to a diagram showing an embodiment of the present invention, each failure process is activated according to a command or periodically created failure occurrence data, and the normality of the process and failure recovery process are confirmed. The command-based method is used to create detailed failure data for each device and perform detailed tests on each device. The periodic method is used to create fault data that combines multiple devices that cannot be washed out using commands, and to perform complex competitive fault tests.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、ハードウェア障害
をソフトウェアが擬似的に行うことにより、あらゆる種
類の障害現象を任意に発生させることができ、ソフト・
ハードインタフェースの明確化及び障害処理ソフトウェ
アの十分な試験及び検証を行うことができ、複雑なオン
ラインリアルタイムシステムにおける障害処理、障害復
旧機能の充実化向上と障害処理ソフトウェアの品質の向
上とを図ることができる。
As explained above, according to the present invention, all kinds of failure phenomena can be arbitrarily generated by simulating hardware failures using software.
The hardware interface can be clarified and fault handling software can be sufficiently tested and verified, and it is possible to enhance and improve fault handling and fault recovery functions in complex online real-time systems and improve the quality of fault handling software. can.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一実施例を示す図である。 The figure shows an embodiment of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 個々のハードウェアについてのあらゆる発生しうる障害
要因をプログラムに内蔵し、コマンドによる指示及び予
め計画された試験データのいずれかに基づいてハードウ
ェア障害報告を障害処理プログラムに対して発生させ、
前記障害処理プログラムの試験及び検証を行うことを特
徴とする擬似障害発生方法。
All possible failure factors for individual hardware are incorporated into the program, and a hardware failure report is generated to the failure handling program based on either command instructions or pre-planned test data,
A method for generating a pseudo failure, characterized by testing and verifying the failure handling program.
JP62132103A 1987-05-27 1987-05-27 Pseudo fault producing method Pending JPS63296146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62132103A JPS63296146A (en) 1987-05-27 1987-05-27 Pseudo fault producing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62132103A JPS63296146A (en) 1987-05-27 1987-05-27 Pseudo fault producing method

Publications (1)

Publication Number Publication Date
JPS63296146A true JPS63296146A (en) 1988-12-02

Family

ID=15073524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62132103A Pending JPS63296146A (en) 1987-05-27 1987-05-27 Pseudo fault producing method

Country Status (1)

Country Link
JP (1) JPS63296146A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10275330B2 (en) 2015-11-06 2019-04-30 Fujitsu Limited Computer readable non-transitory recording medium storing pseudo failure generation program, generation method, and generation apparatus
CN109947609A (en) * 2019-03-12 2019-06-28 江南大学 A kind of software-hardware synergism acceleration method and system towards direct fault location

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10275330B2 (en) 2015-11-06 2019-04-30 Fujitsu Limited Computer readable non-transitory recording medium storing pseudo failure generation program, generation method, and generation apparatus
CN109947609A (en) * 2019-03-12 2019-06-28 江南大学 A kind of software-hardware synergism acceleration method and system towards direct fault location

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