JPS63294177A - Circuit for correcting sensor output - Google Patents

Circuit for correcting sensor output

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Publication number
JPS63294177A
JPS63294177A JP62128146A JP12814687A JPS63294177A JP S63294177 A JPS63294177 A JP S63294177A JP 62128146 A JP62128146 A JP 62128146A JP 12814687 A JP12814687 A JP 12814687A JP S63294177 A JPS63294177 A JP S63294177A
Authority
JP
Japan
Prior art keywords
output
black
sensitivity
circuit
signal line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62128146A
Other languages
Japanese (ja)
Inventor
Motoji Murakami
村上 元二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62128146A priority Critical patent/JPS63294177A/en
Publication of JPS63294177A publication Critical patent/JPS63294177A/en
Pending legal-status Critical Current

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  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To miniaturize the size of the titled circuit and to simplify the constitution of said circuit, by providing a reproducing, subtracting, and dividing functions attained by arithmetic operation to one nonvolatile memory. CONSTITUTION:A black output Vd is inputted to an AD converter 1 through an analog signal line 5 before an original is read and the digitized output of the converter 1 is written in a black output RAM 3 by opening a gate 2. After these operations are completed, the original is read and the image output Vs+Vd is inputted to the AD converter 1 through the analog signal line 5. When the image output Vs+Vd are inputted, the digitized output of the converter 1 is inputted to the address of a ROM 4 through a digital signal line 6, since the gate 2 is closed. Synchronously with the digitized output, the black output Vd stored in the black output RAM 3 is inputted to the other address of the ROM 4 through a digital signal line 7. In the ROM 4, a sensitivity output Vp=alphaXVd is previously calculated from the black output Vd and the black output Vd is subtracted from the image output Vs+Vd, and then, the Vs/Vp which is obtained by dividing the result Vs of the subtraction Vs+Vd-Vd by the sensitivity output Vp is stored. Therefore, the sensor output correcting circuit having the same accuracy as that of conversional ones have can be reduced in size and simplified in constitution.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は小型かつ高いS/N比(信号対雑音比)を要求
されるカラーまたは多値のファクシミリ等の画像読取り
装置における完全密着形センサの出力補正回路に関する
Detailed Description of the Invention [Industrial Application Field] The present invention is directed to a fully contact type sensor in an image reading device such as a color or multilevel facsimile machine which requires a small size and a high S/N ratio (signal-to-noise ratio). The present invention relates to an output correction circuit.

〔従来の技術〕[Conventional technology]

従来のセンサ出力補正回路については、特開昭61−1
2175号に記載されている。第3図はこの従来例のセ
ンサ出力補正回路の一例を示すブロック図である。第3
図において、1はA/D(アナログ/ディジタル)変換
器、2は黒原稿出力を記憶するときに開くゲート(ディ
ジタルスイッチ)、3は黒原稿読取り時出力記憶用揮発
性メモリ(黒出力RAM )、9は減算回路、10は割
算回路、11は感度出力を記憶するときに開くゲート、
12は感度出力記憶用揮発性メモリ(感度出力RAM 
)である。
Regarding the conventional sensor output correction circuit, see Japanese Patent Application Laid-Open No. 61-1
It is described in No. 2175. FIG. 3 is a block diagram showing an example of this conventional sensor output correction circuit. Third
In the figure, 1 is an A/D (analog/digital) converter, 2 is a gate (digital switch) that opens when storing the output of a black original, and 3 is a volatile memory for storing the output when reading a black original (black output RAM). , 9 is a subtraction circuit, 10 is a division circuit, 11 is a gate that opens when storing the sensitivity output,
12 is a volatile memory for storing sensitivity output (sensitivity output RAM
).

第4図(al〜(e)は完全密着形センサで濃淡パター
ンを含む原稿を読み取った場合の回路各部の波形を例示
する波形図である。第4図(al〜(elにおいて、1
7−1.17−2.17−3は濃淡パターン、]、8 
、1.8−1.18−2.18−3は理想的な受光素子
出力(画出力)、19は黒出力、20.20−1.20
−2 。
FIGS. 4(al) to (e) are waveform diagrams illustrating waveforms of various parts of the circuit when a document containing a shading pattern is read using a fully contact type sensor.
7-1.17-2.17-3 is a shading pattern, ], 8
, 1.8-1.18-2.18-3 is the ideal light receiving element output (image output), 19 is the black output, 20.20-1.20
-2.

20−3は画出力、21は白出力、22 、22−1 
、22−2.22−3は画出力と蒸出力の差、23は感
度出力、24.24−1.24−2.24−3は演算結
果の出力である。第3図の動作を第4図(a)〜(e)
により説明する。第4図(a)は白地の原稿に濃淡パタ
ーン17−1゜17−2 、17−3の順で濃淡パター
ンが描かれているのを示す。この原稿を読み取る受光素
子が図中の読取り位置16にあるとき、第4図(b)に
示すように理想的な受光素子出力(画出力)18はそれ
ぞれ同一の濃度部分の出力18−1.18−2.18−
3が同一の出力振幅とならなければならない。しかし第
4図(c)に示すように実際の画出力20は白と黒の中
間の濃淡パターン出力20−1.20−2.20−3も
含めて、日出力21および蒸出力19とともに不均一と
なる。これは原稿面の光強度不均一性と受光素子間の不
均一性と読取り回路の不均一性によるもので、永続的に
固定な不均一性である。
20-3 is image output, 21 is white output, 22, 22-1
, 22-2.22-3 is the difference between the image output and the evaporation power, 23 is the sensitivity output, and 24.24-1.24-2.24-3 is the output of the calculation result. The operation in Figure 3 is shown in Figures 4 (a) to (e).
This is explained by: FIG. 4(a) shows that shading patterns are drawn in the order of shading patterns 17-1, 17-2, and 17-3 on a white original. When the light-receiving element for reading this document is at the reading position 16 in the figure, the ideal light-receiving element output (image output) 18 is the output 18-1 of the same density portion, as shown in FIG. 4(b). 18-2.18-
3 must have the same output amplitude. However, as shown in FIG. 4(c), the actual image output 20, including the gray pattern output 20-1.20-2.20-3 between white and black, is unbalanced along with the daily output 21 and the evaporation output 19. It becomes uniform. This is due to non-uniformity in light intensity on the document surface, non-uniformity between light receiving elements, and non-uniformity in the reading circuit, and is permanently fixed non-uniformity.

そこで第3図の従来例では、原稿を読み取る前に蒸出力
19をアナログ信号線5を通してA/D変換器1に入力
し、そのディジタル化出力をディジタル信号線6を通し
、ゲート−2を開けてディジタル信号線7を通し、蒸出
力RAM3に書き込む。
Therefore, in the conventional example shown in FIG. 3, before reading the original, the evaporation power 19 is input to the A/D converter 1 through the analog signal line 5, the digitized output is passed through the digital signal line 6, and the gate 2 is opened. The data is written into the evaporation output RAM 3 through the digital signal line 7.

つぎに日出力21を同様にアナログ信号線5を通してA
 / D変換器1に入力し、そのディジクル化出力をデ
ィジタル信号線6を通して減算回路9の被減数側入力に
入力する。このときゲート2は閉じていて、蒸出力RA
M3は読出し状態となり、記憶された蒸出力19がディ
ジタル信号線7を通って減算回路9の減数側入力に入力
する。この2つの入力の差(口出カー黒出力)すなわち
感度出力nをディジタル信号線13を通し、ゲート11
を開けてディジタル信号線14を通し、感度出力RA 
M 12に書き込む。第4図(d)に感度出力23の波
形を示す。
Next, connect the daily output 21 to analog signal line 5 in the same way as A
/ D converter 1, and its digitized output is input to the subtractive side input of the subtraction circuit 9 through the digital signal line 6. At this time, gate 2 is closed and the evaporation power RA
M3 enters the read state, and the stored evaporation power 19 is input to the subtraction side input of the subtraction circuit 9 through the digital signal line 7. The difference between these two inputs (output black output), that is, the sensitivity output n, is passed through the digital signal line 13 to the gate 11.
Open and pass the digital signal line 14 to the sensitivity output RA.
Write in M12. FIG. 4(d) shows the waveform of the sensitivity output 23.

上記の操作の後、第4図(alのように白地に濃淡パタ
ーン]、7−1 、17−2 、17−3を含む原稿を
読取り位置16で読取りを行なうと、アナログ信号線5
には第4図(clの出力20−1.20−2.20−3
を含む画出力20が通り、A/D変換器1によりディジ
タル化された後、減算回路9により画出力20から蒸出
力19を差し引く。この出力22−1.22−2゜22
−3を含む(面出カー黒出力)22の波形を第4・ 3
 ・ 図(d)に上記感度出力23とともに示す。この出力2
2はディジタル信号線13を通るが、ゲート11が閉じ
ていて、割算回路10の被除数側入力に入力する。
After the above operation, when reading the document containing the images 7-1, 17-2, and 17-3 in FIG.
In Figure 4 (output of cl 20-1.20-2.20-3
After the image output 20 including the image output 20 passes through and is digitized by the A/D converter 1, the subtraction circuit 9 subtracts the evaporation output 19 from the image output 20. This output 22-1.22-2゜22
The waveform of 22 including -3 (surface black output) is the 4th and 3rd waveform.
- It is shown together with the above sensitivity output 23 in Figure (d). This output 2
2 passes through the digital signal line 13, but the gate 11 is closed and is input to the dividend side input of the division circuit 10.

一方の感度出力RA M 12は読出状態さし、記憶さ
れた感度出力23がディジタル信号線14を通り、割算
回路10の除数側入力に入力する。この2つの入力によ
り演算結果の出力(演算出力)24がディジタル信号線
15に出力する。以上の補正動作により、第4図(e)
に示すように出力24−1 、24−2 、24−3を
含む不均一性のない濃淡1ノベルに比例した(面出カー
黒出力)/感度出力の演算出力24の波形かえられる。
One sensitivity output RAM 12 is in a read state, and the stored sensitivity output 23 passes through a digital signal line 14 and is input to the divisor side input of the divider circuit 10. With these two inputs, an output (calculation output) 24 of the calculation result is output to the digital signal line 15. By the above correction operation, as shown in Fig. 4(e)
As shown in FIG. 2, the waveform of the calculated output 24 of (surface car black output)/sensitivity output is changed, including the outputs 24-1, 24-2, and 24-3, which are proportional to one novel of density and light without non-uniformity.

なお第3図の割算機能と減算機能のいずれか一方または
両方をそれぞれの不揮発性メモリまたは同一の不揮発性
メモリに設け、高速で高精度な小型の補正回路にしてい
る。
Note that either one or both of the division function and the subtraction function shown in FIG. 3 are provided in respective nonvolatile memories or in the same nonvolatile memory, resulting in a small, high-speed, highly accurate correction circuit.

第5図は完全密着形センサの原稿を読み取る場合の構造
を例示する走査方向の断面図である。第5図において、
25は完全密着形センサ、26はガラス基板、27は受
光素子、28は保護膜、29は原稿、・ 4 ・ 30は照明光である。完全密着形センサ25はガラス基
板26と、ガラス基板26の上に走査方向にライン状に
並んだ複数の受光素子27と、受光素子27を保護する
保護膜28からなる。なおA4サイズの代表的なセンサ
の受光素子27の数は1728個であるが図では3素子
を拡大して示している。この構成の完全密着形センサ2
5の原稿読取り動作を説明する。
FIG. 5 is a cross-sectional view in the scanning direction illustrating the structure of a complete contact type sensor when reading an original. In Figure 5,
25 is a complete contact type sensor, 26 is a glass substrate, 27 is a light receiving element, 28 is a protective film, 29 is a document, and 4 and 30 are illumination lights. The complete contact type sensor 25 includes a glass substrate 26, a plurality of light receiving elements 27 arranged in a line in the scanning direction on the glass substrate 26, and a protective film 28 that protects the light receiving elements 27. Note that although the number of light receiving elements 27 in a typical A4 size sensor is 1728, three elements are shown enlarged in the figure. Fully contact type sensor 2 with this configuration
The document reading operation in step 5 will be explained.

センサ25と原稿29はほぼ完全に密着しており、照明
光30はセンサ25の背面よりあて、ガラス基板26を
透過して原稿29を照射する。原稿29からの反射光を
受光素子27で光電変換して信号出力Vsをうる。
The sensor 25 and the original 29 are in almost complete contact with each other, and the illumination light 30 is applied from the back side of the sensor 25, passes through the glass substrate 26, and illuminates the original 29. The reflected light from the original 29 is photoelectrically converted by the light receiving element 27 to obtain a signal output Vs.

原稿29からの反射光は白原稿の場合に最も多く、信号
出力Vsも反射光に比例して最も大きい値(Vs=Vp
)をうる。原稿29の反射濃度が濃くなるにつれて反射
光は減少し、理想的な黒原稿の場合には信号出力Vsは
零(Vs=O)となる。しかし照明光を背面より照射し
た時に、ガラス基板26を透過して直接に受光素子27
に光が当たり、原稿29の情報とは全く無関係な無効成
分Vdを出力する。したがって実際に黒原稿を読み取っ
た場合の信号出力(黒出力)Vsは無効成分Vd (V
s −Vd )となり、白原稿を読み取った場合の信号
出力(出出力)は無効成分(黒出力)Vsと感度出力V
pの和(Vs+Vp)となる。
The reflected light from the original 29 is greatest when the original is white, and the signal output Vs is also the largest value in proportion to the reflected light (Vs=Vp
). As the reflection density of the original 29 increases, the reflected light decreases, and in the case of an ideal black original, the signal output Vs becomes zero (Vs=O). However, when the illumination light is irradiated from the back side, it passes through the glass substrate 26 and directly hits the light receiving element 27.
is illuminated by light, and outputs an invalid component Vd that is completely unrelated to the information on the document 29. Therefore, when a black original is actually read, the signal output (black output) Vs is an invalid component Vd (V
s - Vd ), and the signal output (output) when reading a white original is the invalid component (black output) Vs and the sensitivity output V
The sum of p is (Vs+Vp).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は完全密着形センサの黒出力と出出力の相
関関係について配慮されておらず、黒出力および感度出
力をそれぞれ記憶する揮発性メモリ(黒出力RAM3お
よび感度出力RAM4 )および複数のゲート(ゲート
2およびゲート14)を必要とするため、減算回路9お
よび割算回路10等とともに回路規模が大きくなりかつ
複雑になる問題があった。
The above conventional technology does not consider the correlation between the black output and the output output of the fully contact type sensor, and includes volatile memories (black output RAM 3 and sensitivity output RAM 4) that store the black output and sensitivity output respectively, and a plurality of gates ( Since the gate 2 and the gate 14) are required, there is a problem that the circuit scale becomes large and complicated together with the subtraction circuit 9 and the division circuit 10, etc.

本発明の目的は従来例と同等の機能をもちかつ小型化お
よび簡単化した構成のセンサ出力補正回路を提供するに
ある。
An object of the present invention is to provide a sensor output correction circuit which has functions equivalent to those of the conventional example, and which is miniaturized and has a simplified configuration.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、完全密着形センサの黒出力と出出力の相関
関係に着目し、センサの出出力または黒出力のみを基準
出力として記憶し、補正に必要な他の黒出力および感度
出力または他の感度出力を上記の記憶した出出力または
黒出力の基準出力の値から演算により再生し、センサの
画出力から黒出力を減算し、減算結果を感度出力で割算
する手段を備え、かつ上記演算による再生機能と減算機
能と割算機能を1個の不揮発性メモリに設けたセンサ出
力補正回路により達成される。
The above purpose focuses on the correlation between the black output and the output output of a full contact type sensor, stores only the output output or black output of the sensor as a reference output, and stores other black outputs and sensitivity outputs or other outputs necessary for correction. A means for reproducing the sensitivity output by calculation from the above-mentioned stored output output or reference output value for black output, subtracting the black output from the image output of the sensor, and dividing the subtraction result by the sensitivity output, and the above-mentioned calculation This is achieved by a sensor output correction circuit in which a reproduction function, a subtraction function, and a division function are provided in one nonvolatile memory.

〔作用〕[Effect]

上記のセンサ出力補正回路では、第5図のような複数の
受光素子27を有する完全密着形センサ25で背面から
の照明光30により原稿29を読み取るさいに、ガラス
基板26を通過して直接に受光素子27に光が当たって
原稿の情報とは無関係な無効成分Vdを出力するため、
黒原稿を読み取った場合の黒出力はVdとなりかつ白原
稿を読み取った場合の出出力は感度出力Vpと黒出力V
dの和となるが、ここで黒出力Vdは背面からの照射光
30に比例した値となりかつ感度出力Vpは照射光30
が原稿29に当った後の反射光に比例した値となるから
、したがって黒出力Vdと感度出力vpは比例関係にあ
って1.7 。
In the sensor output correction circuit described above, when reading the original 29 using the illumination light 30 from the rear side with the fully contact type sensor 25 having a plurality of light receiving elements 27 as shown in FIG. Since light hits the light receiving element 27 and outputs an invalid component Vd unrelated to the information on the document,
The black output when reading a black original is Vd, and the output when reading a white original is sensitivity output Vp and black output V
d, where the black output Vd is a value proportional to the irradiation light 30 from the back, and the sensitivity output Vp is the value proportional to the irradiation light 30.
has a value proportional to the reflected light after hitting the original 29, so the black output Vd and the sensitivity output vp are in a proportional relationship of 1.7.

Vp−αX■d、α=比例係数   (1)となり、ま
たこの関係を利用して出出力(Vp+vd)から黒出力
Vdを演算する場合には、 (vp+vd)=(1+α)XVd。
Vp-αX■d, α=proportionality coefficient (1), and when using this relationship to calculate the black output Vd from the output output (Vp+vd), (vp+vd)=(1+α)XVd.

va= (Vp +Vd )/(1+α)(2)となり
、したがって出出力(Vp+Vd)を(1+α)で割算
すれば黒出力Vdがえられ、また(1)式から黒出力V
dをα倍すれば感度出力Vpがえられるので、よってセ
ンサの出出力(vp+vd)または黒出力Vdのみを基
準出力として記憶することにより、補正に必要な他の黒
出力Vdおよび感度出力vpまたは他の感度出力Vpを
(11、+21式により演算して再生し、補正に必要な
画出力(Vs+Vd)から黒出力Vdの減算と減算結果
Vsを感度出力Vpで割算する演算を行なえば、割算結
果V s/V pとしてセンサ出力が補正される。
va= (Vp +Vd)/(1+α) (2) Therefore, by dividing the output output (Vp+Vd) by (1+α), the black output Vd can be obtained, and from equation (1), the black output V
The sensitivity output Vp can be obtained by multiplying d by α, so by storing only the sensor output (vp+vd) or the black output Vd as the reference output, the other black output Vd and sensitivity output vp or sensitivity output necessary for correction can be obtained. If you calculate and reproduce the other sensitivity output Vp using formula (11, +21), subtract the black output Vd from the image output (Vs + Vd) necessary for correction, and divide the subtraction result Vs by the sensitivity output Vp, The sensor output is corrected as the division result Vs/Vp.

〔実施例〕〔Example〕

以下に本発明の一実施例を第1図および第2図により説
明する。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図において、1はA/D(アナログ/ディ、8 。In FIG. 1, 1 is A/D (Analog/D, 8).

ジタル)変換器、2はゲート、3は黒原稿読取り時出力
記憶用揮発性メモリ(黒出力RAM)、4は不揮発性メ
モIJ(ROM)である。第1図は第3図の減算回路9
と割算回路1oと感度出力RAM12とゲート11をR
OM4に置き換えた構成である。
2 is a gate, 3 is a volatile memory (black output RAM) for storing an output when reading a black original, and 4 is a nonvolatile memory IJ (ROM). Figure 1 shows the subtraction circuit 9 in Figure 3.
, divider circuit 1o, sensitivity output RAM 12 and gate 11 are R
This is a configuration replaced with OM4.

この構成で、まず原稿を読み取る前に、アナログ信号線
5を通して黒出力VdをA/D変換器1に入力し、その
ディジタル化出力をディジタル信号線6を通し、ゲート
2を開いてディジタル信号線7を通し、黒出力R,AM
 3に書き込む。この操作が終了した後、原稿の読取り
を行なう。その画出力Vs+Vdはアナログ信号線5を
通しA/D変換器1に入力する。このときゲート2は閉
じていて、そのディジタル化出力はディジタル信号線6
を通し、ROM4のアドレスに入力する。これと同期し
て、先に黒出力RAM3に記憶した黒出力Vdがディジ
タル信号線7を通し、ROM4の別のアドレスに入力す
る。つまりROM4のアドレスは上位ビットと下位ビッ
トで、それぞれ面出カVs + Vdと黒出力Vdに対
応している。ROM4の内部にはあらかじめ蒸出力Vd
から感度出力Vp=αXVdを演算し、さらに画出力V
s+Vdから蒸出力Vdを減算して、その減算値Vsを
感度出力Vpで割算した結果V s/¥pを記憶してい
る。
With this configuration, first, before reading a document, the black output Vd is input to the A/D converter 1 through the analog signal line 5, the digitized output is passed through the digital signal line 6, and the gate 2 is opened to connect the digital signal line to the A/D converter 1. 7, black output R, AM
Write in 3. After this operation is completed, the original is read. The image output Vs+Vd is input to the A/D converter 1 through the analog signal line 5. At this time, gate 2 is closed and its digitized output is sent to digital signal line 6.
, and enter the address of ROM4. In synchronization with this, the black output Vd previously stored in the black output RAM 3 is inputted to another address in the ROM 4 through the digital signal line 7. In other words, the address of the ROM 4 has upper bits and lower bits, which correspond to the surface output Vs + Vd and the black output Vd, respectively. Evaporation power Vd is stored in ROM4 in advance.
Calculate the sensitivity output Vp=αXVd from , and further calculate the image output V
The result of subtracting the evaporation power Vd from s+Vd and dividing the subtracted value Vs by the sensitivity output Vp is stored as Vs/¥p.

第2図は第1図の不揮発性メモIJ(ROM)4のメモ
リ内容例図である。第2図は各アドレス入力が3ビツト
(8階調)で、感度出力Vpと蒸出力VdO比α=1と
した場合のROM4の内容を示している。たとえば画出
力Vs+Vd=″′6″で、蒸出力Vd=″4” であ
れば、次の演算式により、((Vs+Vd)−Vd)X
8/′Vp 、 Vp−aXVd((Vs+Vd )−
Vd )x8/’Vd=(6−4)X8/4 =4 すなわち演算結果は4″である。ただし3ビツト出力の
最大値は′7”となるため、ROM4の内容は上式から
さらに1”を引いた値″3″を記憶している。
FIG. 2 is a diagram showing an example of the memory contents of the nonvolatile memory IJ (ROM) 4 shown in FIG. FIG. 2 shows the contents of the ROM 4 when each address input is 3 bits (8 gradations) and the sensitivity output Vp and evaporation output VdO ratio α=1. For example, if the image output Vs+Vd=''6'' and the evaporation output Vd=''4'', then the following calculation formula is used to calculate ((Vs+Vd)-Vd)X
8/'Vp, Vp-aXVd((Vs+Vd)-
Vd ) x8/'Vd = (6-4) The value obtained by subtracting "3" is memorized.

本回路を用いて8ビット精度でROM4に入力する場合
には、ROM4の容量は216=64K  ビットで可
能であり、演算結果は7ビツト精度(128階調)でえ
られる。
When inputting data to the ROM 4 with 8-bit accuracy using this circuit, the capacity of the ROM 4 can be 216=64K bits, and the calculation result can be obtained with 7-bit accuracy (128 gradations).

本実施例によれば、従来例の減算回路9と割算回路10
と感度出力RA M 12とゲート11をROM4に置
き換えることができ、また従来例の減算回路9と割算回
路10をROMに設けた場合に比べても、従来例と同等
の精度でかつ回路を小規模で簡単化できる。
According to this embodiment, the subtraction circuit 9 and the division circuit 10 of the conventional example
The sensitivity output RAM 12 and the gate 11 can be replaced with the ROM 4, and even compared to the case where the subtraction circuit 9 and the division circuit 10 of the conventional example are provided in the ROM, it is possible to achieve the same accuracy and circuit structure as the conventional example. It can be simplified on a small scale.

なお本実施例ではセンサの基準出力として蒸出力■dを
用い、感度出力Vpを再生しているが、基準出力として
出出力Vp+Vdを用い、蒸出力Vdおよび感度出力V
pを再生するようにしてもよい。
In this embodiment, the evaporation power ■d is used as the reference output of the sensor to reproduce the sensitivity output Vp, but the output power Vp+Vd is used as the reference output, and the evaporation power Vd and the sensitivity output V
p may be played back.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、完全密着形センサの出力補正回路を従
来と同等の精度でかつ小規模で簡単化して実現できる。
According to the present invention, it is possible to realize an output correction circuit for a complete contact type sensor with the same precision as the conventional one, on a small scale, and in a simplified manner.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明によるセンサ出力補正回路の一実施例を
示すブロック図、第2図は第1図の不揮発性メモIJ(
ROM)のメモリ内容例図、第3図・11 ・ は従来のセンサ出力補正回路を例示するブロック図、第
4図は完全密着形センサで濃淡パターンを含む原稿を読
み増った場合の回路各部の波形側図、第5図は完全密着
形センサで原稿を読み取る場合の構造側断面図である。 1・・A/D (アナログ/ディジタル)変換器2・・
・ゲート 3・・・RAM(揮発性メモリ) 4・・・ROM(不揮発性メモリ) 25・・・完全密着形センサ 26・・・ガラス基板2
7・・・受光素子     28・・・保護膜29・・
・原稿       30・・・照明光Vd・・・蒸出
力      Vs+Vd・・・画出力vp + Vd
・・・出出力    Vp・・・感度出力α・・・比例
係数 、12゜
FIG. 1 is a block diagram showing an embodiment of the sensor output correction circuit according to the present invention, and FIG. 2 is a block diagram showing an embodiment of the sensor output correction circuit according to the present invention.
ROM) memory contents, Figures 3 and 11 are block diagrams illustrating conventional sensor output correction circuits, and Figure 4 shows the various parts of the circuit when reading more originals including light and shade patterns using a full contact type sensor. FIG. 5 is a sectional side view of the structure when a document is read by a completely contact type sensor. 1... A/D (analog/digital) converter 2...
・Gate 3...RAM (volatile memory) 4...ROM (nonvolatile memory) 25...Complete contact type sensor 26...Glass substrate 2
7... Light receiving element 28... Protective film 29...
・Original 30...Illumination light Vd...Evaporation power Vs+Vd...Image output vp+Vd
... Output output Vp ... Sensitivity output α ... Proportional coefficient, 12°

Claims (1)

【特許請求の範囲】 1、複数個の受光素子を有する完全密着形センサの出力
をA/D変換する手段と、上記センサの基準出力を記憶
する手段と、上記基準出力から黒出力および感度出力を
再生する手段と、上記センサの画出力から黒出力を減算
する手段と、上記減算結果を感度出力で割算する手段と
を備えたことを特徴とするセンサ出力補正回路。 2、上記黒出力および感度出力の再生機能と減算機能と
割算機能を同一の不揮発性メモリに設けたことを特徴と
する特許請求の範囲第1項記載のセンサ出力補正回路。
[Claims] 1. Means for A/D converting the output of a fully contact type sensor having a plurality of light receiving elements, means for storing a reference output of the sensor, and black output and sensitivity output from the reference output. A sensor output correction circuit comprising: means for reproducing a black output from the image output of the sensor; and means for dividing the subtraction result by a sensitivity output. 2. The sensor output correction circuit according to claim 1, wherein the reproduction function, subtraction function, and division function of the black output and sensitivity output are provided in the same nonvolatile memory.
JP62128146A 1987-05-27 1987-05-27 Circuit for correcting sensor output Pending JPS63294177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62128146A JPS63294177A (en) 1987-05-27 1987-05-27 Circuit for correcting sensor output

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62128146A JPS63294177A (en) 1987-05-27 1987-05-27 Circuit for correcting sensor output

Publications (1)

Publication Number Publication Date
JPS63294177A true JPS63294177A (en) 1988-11-30

Family

ID=14977526

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62128146A Pending JPS63294177A (en) 1987-05-27 1987-05-27 Circuit for correcting sensor output

Country Status (1)

Country Link
JP (1) JPS63294177A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5130822A (en) * 1989-03-10 1992-07-14 Hitachi, Ltd. Method and apparatus for correcting an image signal
JPH06141128A (en) * 1992-10-27 1994-05-20 Matsushita Graphic Commun Syst Inc Black mark detector

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5130822A (en) * 1989-03-10 1992-07-14 Hitachi, Ltd. Method and apparatus for correcting an image signal
JPH06141128A (en) * 1992-10-27 1994-05-20 Matsushita Graphic Commun Syst Inc Black mark detector

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