JPS6096955A - Shading correcting device - Google Patents

Shading correcting device

Info

Publication number
JPS6096955A
JPS6096955A JP58205462A JP20546283A JPS6096955A JP S6096955 A JPS6096955 A JP S6096955A JP 58205462 A JP58205462 A JP 58205462A JP 20546283 A JP20546283 A JP 20546283A JP S6096955 A JPS6096955 A JP S6096955A
Authority
JP
Japan
Prior art keywords
correction
circuit
correction coefficient
stored
color
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58205462A
Other languages
Japanese (ja)
Inventor
Masahiko Matsunawa
松縄 正彦
Yoshinori Abe
阿部 喜則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Konica Minolta Inc
Original Assignee
Konica Minolta Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Konica Minolta Inc filed Critical Konica Minolta Inc
Priority to JP58205462A priority Critical patent/JPS6096955A/en
Publication of JPS6096955A publication Critical patent/JPS6096955A/en
Pending legal-status Critical Current

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  • Color Television Image Signal Generators (AREA)
  • Facsimile Scanning Arrangements (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Color Image Communication Systems (AREA)

Abstract

PURPOSE:To execute high-performance shading correction by photoelectric-transferring light passing through the corresponding color filter and by correcting its output signal by the correction coefficient signal in a memory circuit, which stores the shading correction coefficient. CONSTITUTION:A comparator 16 compares a voltage Vo sent from a operation processing circuit 15 with a reference voltage Vr for an uniform reflecting surface by a photoelectric transfer element 1, obtains a correction coefficient making Vo=Vr, and stores it in a memory circuit 9. A correction coefficient Vy and the special correction quantity by color stored in a memory circuit 10 are taken out, and multiplied by multiplier 11. As a result, the shading correction coefficient, where balance between colors is brought into harmony, is stored in a memory circuit 12. When an original is read out, the signal photo-electric-transferred the light passing through the corresponding color filter can be corrected by the correction coefficient stored in the circuit 12.

Description

【発明の詳細な説明】[Detailed description of the invention]

(+、を術分野) 本発明は、カラー画1τ+IIi目(:駅1r1等にお
(〕る光光電変換量のシ]−デ〆ング’477 (’I
を?+1i ij:するシ1−ディング補正装置に関す
る。 (従来技術) 記BJべぎ原稿面をランプ舎9の光源(−照QJ L、
その反Q・j光を光学系を介しT C(’; 1.)等
の固体1悶像素子やフAトダイA−ドアレイ等の光電変
換素子に導き、これら光電変換索子の出力13弓に早づ
さ再生画像を10る記録装置は既に広く知られている。 この秤の記録装置では、均−原註J 1lifl i!
工の原稿面を跣取っても、光電変換索子の出力波形か−
II用に41らず、例えば単一の光電変換索子について
考えると、中央部の画素に比べて端部の両ノー、の出ツ
ノが低下する所謂シェーディング現象が牛じる1、イの
原因としては、光学系のレンズによる減光作用、光電変
換量rの感電の不拘−及び照用ランプの照IU′1むら
と照度変化等が考えら4′
(+, technical field) The present invention is a method for determining the amount of light photoelectric conversion in a color image 1τ+IIi (: station 1r1, etc.) '477 ('I
of? +1i ij: relates to a shedding correction device. (Prior art) The light source of the lamp housing 9 (-light QJ L,
The anti-Q j light is guided through an optical system to a solid-state image element such as T C ('; 1.) or a photoelectric conversion element such as a photoelectric conversion element, Recording devices that can quickly reproduce images are already widely known. The recording device of this scale has a uniformity of 1lifl i!
Even if you cross over the surface of the original document, the output waveform of the photoelectric converter
For example, if we consider a single photoelectric conversion element for example, the so-called shading phenomenon in which the edges of the pixels at the edges are lower than the pixels at the center is the cause of points 1 and 2. The following factors are considered: the light attenuation effect by the lens of the optical system, the irrespective of electric shock due to the amount of photoelectric conversion r, and the unevenness of the illuminant IU'1 of the illumination lamp and changes in illuminance.

【る。 このようなシ】−1?インク現象をrili 1lI7
Iるため、従来種々の補正対策がどらIIτいる17例
えIJ、均−反則面からの情報を検出づる光電変換索子
ど被主走査ライン(原稿面)からの情報を検出づる固(
本1懇像素子との出力を演惇してシェープrング捕正り
るものや、シェーディング波形をRAM等の記憶素子に
記憶さし原稿面の光電変換時に記憶素子の内容を読出し
て補正づるもの等がある。しかしながら、この種の平面
走査型のlit像装置でシェーディング補正について検
討したものは数少ない。 (発明の目的) 本発明は、このような点に鑑みCなさ罎またものC1そ
の目的は、マルチカフ−画像+1i1像装置6′@にJ
j IJるより性能の7:+Iいシェーディング補正装
置を実現することにある。 (発明のli、l成) この目的を達成りる本発明は、均−反則面及び原稿面で
の各反射光を電気信号に変換1Jる光電変換素子と、該
光電変換素子により均−反則面h)らの反射光を受iJ
 r ’Ic電変検県rの出力を均一化りるIJめの第
1の補正手段と、名色毎の特有の補正量を予め記10シ
ておく第1の記憶手段と、前記第1の補正手段にJ、り
めだ補i1係数と第1の記憶手段に格納されている各e
+ f+jの1(ljilLitとを演0晃1現!して
各色fOの補正係数をめる第2の捕iI−丁段と、該第
2の?i11 i’、lE手段でめI、:各(!21i
jのtll’+ iE l系数を記憶りる第2の記1Q
手段とをに’! If!i L/、実際のDii倶跣取
にあIこつCは対応づる色〕rルク通過光を光電変換し
た信号を前記第2の記1!:1手段に記憶した補正係数
で補正するように構成したことを特徴とするものである
。 (実施例) 以下、図面を参照し本発明の実施例を訂細に説明する。 第1図は木発tIljの一実施例を小!l霜気的11へ
成因である。図にJ3いて、1は原稿1i’i tlJ
を読取−)”C’ f1^気信号に斐換りるC CD等
の光電変換素子、2(よ1ヨa、Eb、E:cなるζう
秒の1% +1!; ’iff 1丁を光イ」;する基
卑電汗発生器、3は光電変換素子1の出h(!1及び基
準電圧発生器20出力e2を受j〕’(e 、とe?の
差に応じた18月Coを出力りる差動増幅器である。パ
ノJC?としては、切換スイッチStk二よりEa 、
 Fll 、 []cの内の1iiJれかが)双択され
て′jえられる。IJ:クロックパルスを発生りるり1
」ツク光41回路、5は該クロック発1回路4の出力を
受+Jる分周1ii+路、6は該分周回路5の出力を受
IJて各種制り11を行う制御回路である。りl」ツク
発生回路4の出力φを及び分周回路5の出力φ2Gよ、
切換スイッチS?により何れか一方が選択されて1ii
r記光電変操AI ’f ’Iに第1の転送制御パルス
φ(どしCりえられる。7131クロック発勺回路4の
出力を受t)で充電変操素J″−1に第2の転送制御パ
ルスφXaをJjえる転送制御1す1路でrIX)る。 E3は制御回路6の出力を受1プ(各汗タイミングパル
ス及びアドレス信号を発生りるタイミング回路、1)1
ま制ral1回路6かlう送られてくるデータをリノ]
I/!スイツヂS3をfトシ(受【)、その内容をil
l憶りる第1の記憶回路、10は各色ffjに特イ]の
補止■(カラーバランスをとるための補iE m )を
Yめ格納し−(おく第2の記憶回路、′+ i tit
第1の記憶回路5)及び第2の記憶回路10の出力を受
・tノで重棹を行う東口器、12は該乗惇器の東り結果
を各色毎に格納しておく第3の記10回路である。i 
3 +、1制御回路6或いは第3の記憶回路12の出力
のfiJれか一方を受1−11アブ[1グイ、遇3に変
換りる1)、/△変1匁器で、入/Jの切換は切換スイ
ツFS4によ−)てtj Jつれる。タイミング回シ“
88の出ノJは、イ4しイ′れ第゛1乃至第S3の記憶
回路9.’I O,12にアドレス信号どして与えられ
−くいる。 ′14は前記差動増幅器3の出力0 (+を小−ルトづ
るリーンプルホールド回路、i 3i LJ、該リンツ
ルア1〜一ルド回路14の出力■×及び前記1〕/Δ変
換器′13の出ノJVVを受りて演掠処]lllを11
う演の処理回路、1Gは該演Q処理回VfI i !5
の出ノJ V Oを阜iXL 1)fj V rと比較
しその1−i 、11をillす1111回iri+ 
6 ニll; 、?−ル比較回路で、i、Li、i!、
’ i直V r IJ、 基ill電1−t I−sを
III: I+’CI+、I’<pで分EI−,,l、
たbのとしくりえられる。リンプル小−ルト回に’8 
’I ’Iの1ノンシリングパルス(J、分周回路5か
らr’rえらtIl、イ(ij粋叫1!l! Iす1路
15 (1)出力■()(まスイッチ85を介しC比較
23′1GにJjえられている。イしで、該れjiζン
リgl ijl+回I’8 ’l りの出7J V o
が各色mにシ1−アrング?111正−れたl!Iii
 Ilt信号として後段の画像処理回路(図示せず)に
送られる。 このように構成されたシェーディング補正装置の動作は
次の通りである。 まず、均一反射面に対するシェーディング補正係数をめ
る場合について説明する。このとき、スイッチS1乃至
S5は第1図に示すような位置にあるものとする。均一
反射面(図示せず)からの反射光を光電変換素子1に当
て、その反射光を光電変換する。この光電変換信号c1
は差動増幅器3に入り、基準電圧発生器2からの基準電
圧e2と比較される。該差動増幅器3はe1とe2の差
に応じた信号e0発生し、e0は続くサンプルホールド
回路14でホールドされる。該サンプルホールド回路1
4のホールド出力VXは、演算処理回路15の一方の入
力端子に入る。一方、制御回路6からはシェーディング
補正のための所定のデータが出力され、D/A変換器1
3でアナログ信号に変換される。このD/A変換器13
の出力Vyは、演算処理回路15の他方の入力端子に入
る。演算処理回路15は、Vx入力、Vy入力を受けて
Vx・Vyなる演算を行い、その結果をV0(=Vx・
Vy)として出力する。V0はスイッッチS5を介して
、比較器16に入る。該比較器16には、均一反射面に
対する基準電圧がVrとして与えられており、演算処理
回路15から送られてきた電圧V0と基準電圧Vrと比
較する。 その結果は比較器16から制御回路0に伝えられる。制
御回路6は、比較器16の出力からVo=Vrとなるよ
うなVyをめ、これを補正係数として第1の記憶回路9
に格納する。即ち、V0>Vrのときには光電変換素子
1の感度オーバーを意味しているので感度オーバーを補
償するようにVyの値を小さくし、逆にV0<Vrのと
きには光電変換素子1の感度不足を意味しているので感
度不足を補償するようにVvの値を大きくし、光電変換
素子1の出力を均一化する補正係数を記憶回路9に格納
する。このようにして、第1の記憶回路9には光源、レ
ンズ、光電変換素子等に起因する光量の空間的分布を補
正するシェーディング補正係数が格納される。 次に各色毎のシェーディング補正係数をめる場合につい
て説明する。このとき、スイッチS3乃至S5について
は、第2図に示すように、その接続を逆にする。第1の
記憶回路9に格納された補正係数と、第2の記憶回路1
0に記憶された各色毎に特有の補正量が取出されて乗算
器11で乗算される。その結果は、第3の記憶回路12
に、色フィルタ透過光のシェーディング補正係数として
各色毎に格納される。即ち、第3の記憶回路12には各
色間のカラーバランスもとられたシェーディング補正係
数が格納される。色毎の補正としては、第3図に示すよ
うに色フィルタ通過後の信号は、色により出力レベルが
全く異なっている。 図において、横軸は色の種類を縦軸は光電変換素子1の
出力電圧をそれぞれ示している。尚、△印はフィルタな
しの場合、X印は赤フィルタ通過後の場合、・印は青フ
ィルタ通過後の場合、○印は緑フィルタ通過後の場合の
特性を示している。又、WWは上記出力電圧の補正後の
基準レベルラインを示す。従って、この記述レベルとな
るように色毎に補正を行うことになり、それに必要な色
毎の補正量が、前述したように第2の記憶回路10に予
め記憶されている。 実際の原稿情報を読取る場合は、光電変換素子1によっ
て読取った画像信号と第3の記憶回路12に格納された
色毎のシェーディング補正係数が演算処理回路15で乗
算され、シェーディング補正された色信号が出力され後
段の画像処理装置(図示Uせず)に送られる。即ち、光
電変換素子1で読取られた画像信号e1は差動増幅器3
で所定の基準電圧2との差に応じた信号e0に変換され
、サンプルホールド回路14にを介して演算処理回路1
5に測定信号Vxとして与えられる。一方、第3の記憶
回路12に記憶された色毎の補正係数は、スイッチS4
を介してD/A変換器13に入りアナログ信号に変換さ
れた後、新たな補正信号Vyとして演算処理回路15に
与えられる。 演算処理回路15は、Vx・Vyを演算シェーディング
補正された画像信号V0として出力する。 尚、実際の似稿読取時には、光電ゆ検索子1の第1の転
送制御パルスφ[を分周回路()の出力φ2からクロッ
ク光生回路4の出力φ1に切換、高速動作を行わけるに
うになっている。φ2からφlの切換はスイッチS?°
(行う。 尚、上述の52明では、乗幹器11及び演専処理回路1
5どしてアブ[1グ演障方式のbのを用いたが、これに
限る必要はなく ’j’−rジタル演t31演武315
式用いてもよい。この場合1ま、光7n変挽崇子゛1の
出力をディジタルデータに変1aするI、:め、Δ、、
/ l)変換器を心外どりる。−Cの代わり、第1図及
び第2図の実前例で用いたD/Δ変操rag 13 +
a不鼓になる。 (発明の動床) 以」−詳細に説明したように、木ブト1!11によれは
、均−li 04面かIうめられlこ補正係数と、色f
i50)感度のjLいを補正りる補止■とから色毎のシ
ー1−−ディング補[1三係数をめ記10さ1ジ(おく
ことにより、実際の原稿読取りにあたっては前記シ1−
ディング補tT係数によって光電変換素子からの画顔信
号を補正づることによりi]確なマルブ7Jノー画□□
□情報を得ることができる。
[ru. Like this] -1? rili ink phenomenon 1lI7
Conventionally, various correction measures have been taken to prevent this.
Book 1: Shaping can be corrected by processing the output from the image sensing element, or the shading waveform can be stored in a memory element such as RAM, and the contents of the memory element can be read out and corrected during photoelectric conversion of the original surface. There are things etc. However, there are only a few studies on shading correction in this type of plane scanning type LIT imaging device. (Object of the Invention) In view of the above points, the purpose of the present invention is to provide a multi-cuff image +1i1 image device 6'@J
The object of the present invention is to realize a shading correction device with 7:+I higher performance than IJ. (Li and l composition of the invention) The present invention that achieves this object includes a photoelectric conversion element that converts each reflected light on a uniformly irregular surface and a document surface into an electric signal, and a uniformly irregular Receiving the reflected light from the surface h)
a first correction means for equalizing the output of r'Ic electric substation test r; a first storage means for pre-recording a specific correction amount for each name color; J to the correction means, Rimeda compensation i1 coefficient and each e stored in the first storage means.
+f+j's 1(ljilLit) and the second correction coefficient for each color fO, and the second ?i11i',lE means: Each (!21i
Second record 1Q to memorize the tll'+ iE l series of j
Means to '! If! i L/, in actual delivery, the corresponding color is the signal obtained by photoelectrically converting the passing light. :1 means is characterized in that it is configured to perform correction using correction coefficients stored in the means. (Embodiments) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Figure 1 shows an example of a small tIlj from Kiba! It is the cause of frost. J3 in the figure, 1 is the original 1i'i tlJ
-)"C' f1^ Photoelectric conversion element such as CD, which changes to the signal, 2 3 receives the output h(!1 of the photoelectric conversion element 1 and the output e2 of the reference voltage generator 20)'(18 according to the difference between e and e? It is a differential amplifier that outputs Co. As a pano JC?, selector switch Stk2 outputs Ea,
Fll, 1iiJ of []c) are selected and 'j' is obtained. IJ: Generate clock pulse Riruri1
5 is a frequency dividing circuit 1ii+ which receives the output of the clock generator 1 circuit 4, and 6 is a control circuit which receives the output of the frequency dividing circuit 5 and performs various controls 11. The output φ of the output circuit 4 and the output φ2G of the frequency dividing circuit 5,
Changeover switch S? Either one is selected by 1ii
The first transfer control pulse φ (receives the output of the 7131 clock generation circuit 4) is applied to the photoelectric transformer AI 'f'I to transfer the second transfer control pulse to the charging transformer J''-1. E3 receives the output of the control circuit 6 (a timing circuit that generates each timing pulse and address signal, 1).
Reno data sent from RAL1 circuit 6]
I/! F toshi (receive) the Suitsuji S3, and il the contents
10 is a special memory circuit for each color ffj], and a second memory circuit that stores Y-(supplement iE m for color balance), '+ i tit
The output of the first memory circuit 5) and the second memory circuit 10 are received by the Higashiguchi device, which performs the heavy-duty operation, and the third Higashiguchi device 12 stores the results of the east-exiting device for each color. The following are the 10 circuits. i
3 +, Convert either fiJ of the output of the 1 control circuit 6 or the third memory circuit 12 into the input 1-11 ab [1 gui, 3), /△change 1 momme device, input / Switching of J is performed by switching switch FS4). Timing rotation
The output J of 88 is the first to S3 memory circuits 9 after A4. 'IO, 12 is given as an address signal. '14 is the output 0 of the differential amplifier 3 (a lean-pull hold circuit that pulls + to a small root, i3i LJ, the outputs of the Lindslure 1 to pull circuit 14, and the output 1) of the /Δ converter '13. 11 after receiving the JVV
The processing circuit for the performance Q, 1G, is the processing circuit for the performance Q processing circuit VfI i ! 5
Compare the output J VO with 阜iXL 1) fj V r and illuize 1-i, 11 1111 times iri+
6 Nill;,? - i, Li, i! ,
' i direct V r IJ, basis ill electric 1-t I-s III: I+'CI+, min EI-,,l, with I'<p
It can be changed as follows. '8 in Rimple Elementary School
'I 'I's 1 non-shilling pulse (J, from the frequency divider circuit 5 C comparison 23'1G has Jj.
Is there a sequence for each color? 111 correct! III
It is sent as an Ilt signal to a subsequent image processing circuit (not shown). The operation of the shading correction device configured as described above is as follows. First, the case of calculating the shading correction coefficient for a uniform reflective surface will be explained. At this time, it is assumed that the switches S1 to S5 are in the positions shown in FIG. Reflected light from a uniform reflection surface (not shown) is applied to the photoelectric conversion element 1, and the reflected light is photoelectrically converted. This photoelectric conversion signal c1
enters the differential amplifier 3 and is compared with the reference voltage e2 from the reference voltage generator 2. The differential amplifier 3 generates a signal e0 corresponding to the difference between e1 and e2, and e0 is held in the subsequent sample and hold circuit 14. The sample hold circuit 1
The hold output VX of No. 4 enters one input terminal of the arithmetic processing circuit 15. On the other hand, the control circuit 6 outputs predetermined data for shading correction, and the D/A converter 1
3, it is converted to an analog signal. This D/A converter 13
The output Vy enters the other input terminal of the arithmetic processing circuit 15. The arithmetic processing circuit 15 receives Vx input and Vy input, performs the calculation Vx·Vy, and converts the result to V0 (=Vx·Vy).
Vy). V0 enters comparator 16 via switch S5. The comparator 16 is provided with a reference voltage Vr for the uniform reflective surface, and compares the voltage V0 sent from the arithmetic processing circuit 15 with the reference voltage Vr. The result is transmitted from the comparator 16 to the control circuit 0. The control circuit 6 determines Vy such that Vo=Vr from the output of the comparator 16, and uses this as a correction coefficient in the first storage circuit 9.
Store in. That is, when V0>Vr, it means that the sensitivity of the photoelectric conversion element 1 is over, so the value of Vy is made small to compensate for the oversensitivity, and conversely, when V0<Vr, it means that the sensitivity of the photoelectric conversion element 1 is insufficient. Therefore, the value of Vv is increased to compensate for the lack of sensitivity, and a correction coefficient for making the output of the photoelectric conversion element 1 uniform is stored in the storage circuit 9. In this way, the first storage circuit 9 stores shading correction coefficients for correcting the spatial distribution of the amount of light caused by the light source, lens, photoelectric conversion element, and the like. Next, the case of calculating the shading correction coefficient for each color will be explained. At this time, the connections of the switches S3 to S5 are reversed as shown in FIG. The correction coefficient stored in the first storage circuit 9 and the second storage circuit 1
A unique correction amount for each color stored in 0 is taken out and multiplied by a multiplier 11. The result is the third storage circuit 12
is stored for each color as a shading correction coefficient for the light transmitted through the color filter. That is, the third storage circuit 12 stores shading correction coefficients in which color balance is achieved between each color. Regarding the correction for each color, as shown in FIG. 3, the output level of the signal after passing through the color filter is completely different depending on the color. In the figure, the horizontal axis shows the type of color, and the vertical axis shows the output voltage of the photoelectric conversion element 1, respectively. Incidentally, the △ mark indicates the characteristic without a filter, the X mark indicates the characteristic after passing through the red filter, the .-mark indicates the characteristic after passing through the blue filter, and the ◯ mark indicates the characteristic after passing through the green filter. Further, WW indicates a reference level line after the output voltage is corrected. Therefore, correction is performed for each color to achieve this description level, and the necessary correction amount for each color is stored in advance in the second storage circuit 10 as described above. When reading actual document information, the image signal read by the photoelectric conversion element 1 is multiplied by the shading correction coefficient for each color stored in the third storage circuit 12 in the arithmetic processing circuit 15, and a shading-corrected color signal is obtained. is output and sent to a subsequent image processing device (not shown). That is, the image signal e1 read by the photoelectric conversion element 1 is sent to the differential amplifier 3.
is converted into a signal e0 according to the difference from a predetermined reference voltage 2, and then sent to the arithmetic processing circuit 1 via the sample and hold circuit 14.
5 as the measurement signal Vx. On the other hand, the correction coefficient for each color stored in the third storage circuit 12 is stored in the switch S4.
The signal enters the D/A converter 13 via the D/A converter 13, is converted into an analog signal, and is then provided to the arithmetic processing circuit 15 as a new correction signal Vy. The arithmetic processing circuit 15 outputs Vx and Vy as an image signal V0 subjected to arithmetic shading correction. In addition, when actually reading a similar document, the first transfer control pulse φ of the photoelectric retrieval element 1 is switched from the output φ2 of the frequency divider circuit ( ) to the output φ1 of the clock light generation circuit 4 to enable high-speed operation. It has become. Switch S to switch from φ2 to φl? °
(Do it. In addition, in the above-mentioned 52, the main unit 11 and the processing circuit 1
5 and ab[1g performance method b's were used, but there is no need to be limited to this; 'j'-r digital performance t31 performance 315
You may also use formula. In this case, 1, convert the output of the optical 7n converter Takako 1 into digital data 1a, :me, Δ,,
/ l) Move the transducer off-center. - Instead of C, the D/Δ variable rag 13 + used in the actual example of Figures 1 and 2
aI become depressed. (Moving bed of the invention) As explained in detail, the deviation of the wooden button 1!
i50) From the correction to correct the sensitivity jL, to the shedding correction for each color, note down the coefficients of 10 and 1.
By correcting the image face signal from the photoelectric conversion element using the tT coefficient, accurate Marub 7J no image □□
□You can get information.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を承11市気的1t’+成図
、第21ii1 tよスイッノーの切操状fuiを示り
図、第3〕図IL色フィルタ通過後の光゛電変換15了
の出力’l−,’l I!+を小1図である。 ′1・・・光電変換素子 2・・−It gし小IL梵
(1器3・・・差動増幅11g 4・・・り1−1ツク
発/L、 jf145・・・分周回路 6・・・制陣同
(°87・・・転)五制御回路 E)・・・タイミング
回路9.10.12・・・記憶回路 11・・・重0器 1ご3・・・1)/l\変模器14
・・・リンプルホールド回路
Fig. 1 shows an embodiment of the present invention, and Fig. 11 shows the commercial 1t'+ composition, Fig. 21ii1t shows the cutting shape fui of the switch, and Fig. 3 shows the photoelectric radiation after passing through the IL color filter. Conversion 15 completed output 'l-,'l I! + is a small figure. '1...Photoelectric conversion element 2...-It g small IL system (1 unit 3...differential amplification 11g 4...ri 1-1 output/L, jf145...frequency divider circuit 6 ... Control circuit (° 87 ... rotation) 5 control circuit E) ... Timing circuit 9.10.12 ... Memory circuit 11 ... Heavy equipment 1 Go 3 ... 1) / l\Hen model 14
・・・Ripple hold circuit

Claims (1)

【特許請求の範囲】[Claims] 均−原註・1面及び原稿面での各反則光を電気例月に′
&1@する光電変換索子と、該光電変1!II!糸子に
より均−反則面からの反則光を受()て光電変換素子の
出力を均一化するための第1の補正:f段と、各色毎の
特有の補止弗を予め記10シてd3 <第1の記憶手段
と、前記第′1のil iF手段ににりめた補正係数と
第1の記憶手段に格納されでいる各色毎の補正準どを浮
HF処理して各(B、 lijの補正係数をめる第2の
補正手段と、該第2の補■手段′(求めた各色fnの補
正係数を記憶づる第2の記憶手段とをB1備し、実際の
原稿読取にあたっては対応する色フィルタ)II過)し
を光電変換した信号を前+11.+第2の記憶手段に記
憶した補正1系数C・補止Jるように構成したことを特
徴とするシ1−デCング補正装置。
Uniform - Original Notes: Each foul light on the 1st page and the manuscript side is electrically calculated.
&1@ photoelectric converter and the photoelectric converter 1! II! The first correction for uniformizing the output of the photoelectric conversion element by receiving () the refracted light from the uniform-reflective surface by the thread: f stage and corrections specific to each color are recorded in advance 10 times and d3. <The first storage means, the correction coefficients stored in the '1st il iF means, and the correction standards for each color stored in the first storage means are subjected to floating HF processing, and each (B, B1 is equipped with a second correction means for storing correction coefficients for fn, and a second storage means for storing correction coefficients for each color fn. The signal obtained by photoelectrically converting the corresponding color filter) II) is converted to +11. 1. A 1-de C correction device, characterized in that it is configured to store a correction 1 series number C and a correction J stored in the second storage means.
JP58205462A 1983-10-31 1983-10-31 Shading correcting device Pending JPS6096955A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58205462A JPS6096955A (en) 1983-10-31 1983-10-31 Shading correcting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58205462A JPS6096955A (en) 1983-10-31 1983-10-31 Shading correcting device

Publications (1)

Publication Number Publication Date
JPS6096955A true JPS6096955A (en) 1985-05-30

Family

ID=16507274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58205462A Pending JPS6096955A (en) 1983-10-31 1983-10-31 Shading correcting device

Country Status (1)

Country Link
JP (1) JPS6096955A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6253569A (en) * 1985-09-03 1987-03-09 Toshiba Corp Shading correcting reference board
JPS62200875A (en) * 1986-02-28 1987-09-04 Canon Inc Color image information input device
JPS63296470A (en) * 1987-05-28 1988-12-02 Canon Inc Color image reader
US4922335A (en) * 1986-11-14 1990-05-01 Canon Kabushiki Kaisha Color film reading apparatus providing high-gradation color signals
JPH02145085A (en) * 1988-11-25 1990-06-04 Fuji Xerox Co Ltd Film picture reader

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58121864A (en) * 1982-01-14 1983-07-20 Konishiroku Photo Ind Co Ltd Shading correction circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58121864A (en) * 1982-01-14 1983-07-20 Konishiroku Photo Ind Co Ltd Shading correction circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6253569A (en) * 1985-09-03 1987-03-09 Toshiba Corp Shading correcting reference board
JPS62200875A (en) * 1986-02-28 1987-09-04 Canon Inc Color image information input device
US4922335A (en) * 1986-11-14 1990-05-01 Canon Kabushiki Kaisha Color film reading apparatus providing high-gradation color signals
JPS63296470A (en) * 1987-05-28 1988-12-02 Canon Inc Color image reader
JPH02145085A (en) * 1988-11-25 1990-06-04 Fuji Xerox Co Ltd Film picture reader

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