JPS63283470A - Inverter device - Google Patents

Abstract

PURPOSE:To make switching high speed, by a method wherein an unit is constituted of two sets of module element and a balancing capacitor while a plurality of the units is connected in parallel by a connecting bar to arrange them horizontally. CONSTITUTION:An inverter device is constituted of units 7A-7C, which correspond to the U-W phase of 3-phase alternating current while a switching element 10A, consisting of a transistor and a fly-wheel diode so as to be a module, and the switching element 10B, constituted in the same manner, are mounted on the unit 7A and respective elements are arranged in parallel on a cooling plate 22A. The unit 7A is cooled by cooling fins 23A-23B. The other units 7B-7C are constituted in the same manner. The units 7A-7C are arranged in three stages and are connected by connecting bars 13, 14 while these three units are connected to a load 3 by connecting bars 15-17 through the terminals thereof respectively. In this case, conductive bodies are arranged in a parallel to grounding, therefore, generated flux is absorbed by an earth surface and is restrained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an inverter device configured by arranging modular elements.

[Conventional technology]

6 and 7 respectively show a circuit diagram of a conventional inverter device disclosed in Japanese Patent Application Laid-Open No. 60-219968 and a schematic plan view of the inverter device when it is mounted.

Here (1) is a DC power supply, (2A), (2B), (
20), (2D).

(2m), (2F) ij) A switching element composed of a transistor, and (3) a load such as a three-phase induction motor.

Also (2G), (2H), (2nd), (2J),
(2K), (2 is a flywheel diode that protects the transistors (2 people) to (2IP) by discharging the energy due to the inductance of the load (3). - (2F) are provided in pairs, respectively.

(4) l (5) is a DC power supply (1) and a transistor (
2A) (2F) and flywheel diode (2G)
Wiring (4'), (5') connecting ~(2L)
) is the wiring inductance. Furthermore, (6A), (
6B), (6(: Riwa wiring (4'), (5')
Each snubber capacitor constitutes a snubber circuit connected between the two snubber capacitors.

Further, (19A) to (190) indicate balance capacitors, and (20A) to (200) indicate current detectors, respectively. Further, (7A), (7B), and (7c) each indicate a unit for each layer.

The element (10mm) shown in FIG. 7 is a modular element that incorporates transistors (2) and diodes (2G). (The snubber circuit is composed of six snubber capacitors, (6B), (60), a snubber diode, and a snubber resistor (not shown).

(23A) and (23B) are cooling fans for cooling the elements. Further shouting) is the transistor (2 people)~(
2F), and the output wiring is connected in a twisted manner so as not to be affected by induced noise.

- is a terminal block for connecting a DC power supply (1) and a load (3).

Also, QB) is a positive electrode connection bar, and the elements (10A), (10Ct), (1 (IK) transistors (2A) located on the positive electrode side).

(2C), (2Fli) inflow terminal (ACl),
(ccl) and (KOl) are connected. C14
1 is a negative electrode connection bar, and the terminal located on the negative electrode side (IO
B), (10D), (10F) transistors (2
B), (2D), (2F) outflow terminal (BEl,
), (DEl), and (FEl) are connected.

■), α6), α7) are positive side transistors (10A
), (100).

(1[C) outflow terminal (AEl), (011),
(ICEl) and the negative side transistor (2B), (
2D), (2F) inflow terminal (BCl).

(DCl) and (IFC!1), and each is connected to a connection point for power supply to a load.

In the inverter device mounted in this way, the positive electrode connection bar asi and the negative electrode connection bar (4) are the intermediate connection bar o5).

C10) and (17) are located apart on both sides, so the DC power supply (1) and wiring (4'), (5'
) has a drawback in that the wiring inductance (4) I (5) is large.

As shown in Figure 6, when the current flowing through the wiring (4) and (5) increases, an induced voltage is induced in the wiring inductance (4) I (5) in the direction shown in the mounting direction, and conversely, when the current decreases, an induced voltage is induced in the wiring inductance (4) I (5). An induced voltage is induced in the direction shown by the broken line.

These induced voltages are
The power supply to the load may be reduced by lowering the voltage applied to the
) could lead to dielectric breakdown.

[Problem that the invention seeks to solve]

In order to solve such drawbacks, the snubber circuit no snubber capacitor (6mm)e (6B)s (60)+
/< Condenser for rice, (19A), (19
B), (190) had to be increased, which was uneconomical.

Moreover, between the elements (16A) to (10F), the inflow terminal (A
Ol) ~ (pcl), outflow terminal (jll) ~ (Fll
) are arranged adjacent to each other on the same side, the currents flowing through these terminals (10A) to (IOF) flow in the same direction. Therefore, the magnetic flux generated by this current is integrated to form a large magnetic field, which has the disadvantage of affecting surrounding electronic circuit printed boards and the like.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide an inverter device suitable for suppressing inductance and performing high-speed switching.

[Means for solving problems]

An inverter device according to the present invention is an inverter device configured by arranging a plurality of modular elements having current inflow terminals and current outflow terminals, using the first and second elements and a balancing capacitor, The outflow terminal of the first element and the inflow terminal of the second element are connected by a first conductor to connect to a load, and the inflow terminal of the first element and the outflow terminal of the second element are connected by a first conductor. Each unit is connected to the positive and negative terminals of the capacitors, and the number of phases of the 22) t-multiphase current transformation is prepared, and the positive and negative terminals of the capacitors of each unit are connected to each other. The second and third conductors are connected to each other, and the second and third conductors are arranged parallel to the ground plane.

[Effect]

Since the second and third conductors are arranged parallel to the ground, the magnetic flux generated from the conductors is absorbed by the ground plane and suppressed. Therefore, inductance between conductors can be reduced.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail based on the drawings.

FIG. 6 is a mounting diagram showing one embodiment of the inverter device according to the present invention, and FIG.
The figures show detailed implementation diagrams.

Here, (7A), (7B), and (70) are each 3
It shows units corresponding to 0 phase, ■ phase, and W phase of phase alternating current, and the unit (7A) has a switching module that connects transistors (2 people) and flywheel diodes (2G) in antiparallel. An element (10A) and a switching element (10B) having a similar configuration are mounted, and each has a cooling plate (2) with radiation fins on the back side.
2A) They are arranged in parallel on top. The fins are cooled by cooling fans (25A) and (25B). Units) (7B), (7
0) is also configured.

As shown in FIG. 3, the inverter device according to the present invention has units (7A) to (7) arranged in five stages, and a connecting bar C.
IB > +) are connected to form an fc configuration. The module element (10A) has a positive terminal and a negative terminal connected to the balance capacitor, and an inflow terminal (A
Cl) and an outflow terminal (Am1). Other module elements (10B) to (10F) have similar configurations, υ, (Bet:), (C+01), (
DOl ) + (EC1) + (FOl ) as inflow terminals, and (BKl), (czl), (part 1).

(KEl) and (FEI) are provided as outflow terminals.

Here, the unit (7A) corresponding to the U phase is configured by connecting one inflow terminal (BOl) and outflow terminal (AEl) located on the same side with an intermediate connection bar (intermediate connection bar) which is a first conductor. Similarly, (22) corresponding to the V phase) (7B) connects the module element (100) and (10D) with the intermediate connection bar 06)
A unit corresponding to the i-phase (70 is an intermediate connecting bar shaft connecting the module element (ioz) and (10F)).

Connection bars C15), α6), and (17) are terminals (L1), respectively.

(cEl) and (EBl) are connected to the load (3). In (7A), the current inflow terminal (AOl) of the module element (10A) is connected to the positive terminal of the balance capacitor (19A), and the current outflow terminal (BKl) of the module element (IDB) is connected to the balance capacitor (19A). Each is connected to the negative terminal of the capacitor (19A). The other units (7B) and (70) have the same configuration. Furthermore, these units (7A),
Between (7B) and (70), the positive side electrodes are commonly connected by the connection bar 03) that constitutes the second conductor, and the negative side electrodes are commonly connected by the connection bar (4) that constitutes the third conductor. Ru.

In addition, in Figure 6, the DC power supply (1) and load (3)
0 (support)) is a control device that drives transistors (2) to (2F),
As described above, the output wiring is twisted and connected to the pace terminals (ABC) to (FBI) of the transistor (2A82F) in order to reduce the influence of conduction noise.

The wiring that supplies power to the load is connected to the terminal block.

This terminal block - and connection bar (to) + 06) + C17
) is connected to each wire 151, and a current detector (20A) is required.

(20B) and (200) are attached and used.

Next, this inverter device connects the DC power source (1) and the load (
3) and the terminal block are connected and driven by the control device.

If the gold ball side transistors (2) and (2) are closed, and at the same time the negative side transistor (2F) is closed, the current supplied from the DC power supply (1) will be connected to the wiring inductance (4), then to the positive side. Transistor (2A), (2S,
It returns to the DC power supply (1) through the intermediate connection bar C15), α6), the load (3), the intermediate connection bar C15), the negative side transistor (2F), and the wiring inductance (6).

At this time, an electromotive force e of [9] is generated on both sides of the wiring inductance (4) and k5J. This induced voltage e is given by equation (1).

fs = −L (V) *
**(1)t Here, L is inductance, dt As can be seen from equation (1), this induced voltage e increases in proportion to the inductance L, and increases as the switching time becomes shorter. This induced voltage e is the DC power supply (1)
positive side transistor (2A) with voltage E.

(2C) The voltage applied to the negative side transistor (2F) is reduced.

Conversely, when switching is open, the applied voltage increases. FIG. 4 is a diagram showing an example of the arrangement of the positive electrode side connection bar aS> and the negative electrode side connection bar (6).

The bar QB) and the α bar are arranged so as to be parallel to the ground plane forming the ground plane, and a small gap is maintained between them.

With this configuration, the magnetic flux generated from the conductors of the connection bars Oat and α→ will not be induced to the ground plane, so the mutual inductance will be small, and the wiring inductances (4) and L5) will be small. The induced voltage e due to the inductances (4) and (6) is reduced, and it is possible to prevent the voltage applied to the load (3) from decreasing when the circuit is closed. Also, when open, the transistor (2 people)
It is also possible to prevent the voltage applied to (2F) from becoming an overvoltage.

As shown in Figure 4, the connection bars 03) and (9) are constructed so as to face each other with a slight gap (G) in parallel with the door jamb), and FiI (2)) must be grounded. There is.

Figure 3 shows an arrangement of another embodiment, which has a structure in which a dielectric material (E) is sandwiched in a minute gap between the positive electrode connection bar α and the negative electrode connection bar (2) and J# (transfer). It shows. Dielectric (
The structure other than that for holding the g) is the same as the structure shown in FIG.

Dielectric material μs) sandwiched between connecting bars αB) and α(transverse)
forms a capacitance between the wirings (4') and (5').

In the circuit diagram of the inverter device shown in FIG. 2, broken lines (25A) and (25B) indicate capacitors in this embodiment. Examples of materials for the dielectric μs include mica, paper, silicon, insulating film, glass, and magnetism.
Bakelite etc. can be used.

Here, the WIE body (g) will be explained in more detail. Let's calculate the capacitor capacity O assuming that mica is used as the dielectric material. Generally, the capacitor capacity C is (2
) is given by the formula.

6th day C = □
・ ・ Fist (2)
τ e: Permittivity of material S: Area of conductor (m2) d: Distance between conductors Here, ε = t0 The connection par α chicken and door sister) are also connected to the negative electrode connection bar)
Assuming that the dimensions of the opposing portions of the capacitors and the capacitors are 3 cm x 60 cm, the opposing distance d is 0.5111, and the dielectric constant of mica is 5, the capacitor capacitance C is determined as follows.

Middle school 2700 (PP) ・Publicity・
(3) In other words, 2700PF capacitors (25A) and (25B) are connected equimetrically between the positive electrode connection bar 91101 and the negative electrode connection bar C14) and Jin+. Therefore, according to this embodiment, the capacitor (25A), (2
5B) is formed between the wirings (4') and (5'), the induced voltage e generated by the wiring inductances (4) and (5) will increase from the transistor (2A) to <21"
)-s can be suppressed from being applied.

Or balance capacitor (19A), (19B
).

(It is possible to reduce the size of the capacitor by reducing the capacitance of 19. In the above-mentioned embodiments, a five-phase inverter device was explained as an example, but the present invention can also be applied to a single-phase inverter device. Needless to say.

〔Effect of the invention〕

As explained above, according to the present invention, a unit is configured with two module elements (!: a balance capacitor), a plurality of these units are lined up and connected by a positive electrode connection bar and a negative electrode connection bar, and this connection bar is connected to the ground. Since the connection bars are arranged parallel to the plane, the inductance generated from the connection bar is reduced.Therefore, the voltage induced in the inductance due to switching is suppressed, and the switching speed can be increased. Further, by sandwiching a dielectric between the 24th body and the door and between the third conductor and the door, it is possible to suppress the influence of the induced voltage of the inductance on the switching element, and it is possible to further increase the switching frequency.

[Brief explanation of drawings]

FIG. 1 is a detailed implementation diagram of an inverter device according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG.
4 is a diagram showing the arrangement of positive and negative connection bars used in the present invention, FIG. 3 is a diagram showing another arrangement, and FIG. 6 is a diagram showing the configuration of a conventional inverter device. circuit diagram,
FIG. 7 is an implementation diagram showing the detailed implementation. (1) is DC power supply, (3) is load, (7A) to (70 is U phase, ■ phase, W phase unit, (10A) to (101P)
is the module element, 05) to 57) are the first conductor, Q~ is the second conductor, ni) is the 34th body, G is the gap, μs) f'i,
Dielectric, wholesale) is the door. In addition, the same symbols in the figures indicate the same or corresponding parts.

Claims (3)

[Claims] (1) In an inverter device configured by arranging a plurality of modular elements each having a current inflow terminal and an outflow terminal, the first and second elements and a balance capacitor are used, and the first element The outflow terminal of the first element and the inflow terminal of the second element are connected to a load by a first conductor, and the inflow terminal of the first element and the outflow terminal of the second element are respectively connected to the positive terminal of the capacitor. A terminal and a negative terminal are connected to each other to form a unit, and the units are prepared for the number of phases of the multiphase AC, and the positive and negative terminals of the capacitors of each unit are connected to each other by second and third conductors, respectively. ,
An inverter device characterized in that the second and third conductors are arranged parallel to a ground plane. (2) The inverter device according to claim 1, wherein the second conductor and the third conductor face each other with a slight gap between them and the ground plane. (3) The inverter device according to claim 1 or 2, characterized in that a dielectric material is sandwiched between the second conductor and the third conductor and a ground plane.