JPS63281520A - Multi-output frequency synthesizer - Google Patents

Abstract

PURPOSE:To reduce power consumption by equipping one shared variable divider and a feedbacking circuit change over switch in the feedbacking path of an output signal to a position comparator, synchronizing the holding condition of those and a phase comparator and controlling it. CONSTITUTION:At the time of changing-over from a module 10 of an output frequency f1 to a module 20 of an f2, a signal R1 is generated from a control circuit 2 and a phase frequency comparing circuit 12 is reset. Thus, the voltage of a VCO15 of the module 10 is kept constant by the holding switch of a charge pump 13 and a self-running condition is obtained. At the time of changing-over from the self-running condition of the module 20 to a synchronizing condition, under the control of the control circuit 2, a feedbacking switch 4 is changed-over to the module 20, the dividing number of a divider 3 is determined at a value corresponding to the f2 of the module 20, the counter of the divider 3 is reset, the falling of the reference signal of a vibrator 1 is detected and the reset of the divider 3 and a comparator 2 is canceled. Thus, plural VCOs can be respectively stabilized to desired output frequencies and the power consumption can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a synthesizer with multiple output frequencies.In particular, a synthesizer with multiple output frequencies that stabilizes multiple voltage controlled oscillators with one phase-locked loop (PLL) FREQUENCY SYNTHESIZER The present invention is suitable for use in mobile radio devices.

(Prior Art) In the field of wireless communications, in order to effectively utilize radio frequencies, frequency bands are divided into narrow bands, and the divided frequencies are used in a time-division manner.

Therefore, it is necessary for the wireless device to stably set multiple wireless channels and to switch between them freely. As a local oscillator used in such wireless devices, a frequency synthesizer is used which can easily obtain a large number of stable and accurate frequencies.

As wireless devices using frequency synthesizers become more sophisticated, it becomes possible to generate multiple frequency signals at the same time,
Frequency synthesizers are required to have the ability to switch frequencies at high speed, and in order to meet these demands, high performance and sophistication, such as the use of multiple frequency synthesizers in parallel, are progressing.

An example of the configuration of a conventional parallel frequency synthesizer for such uses is shown in FIG. The frequency synthesizer in FIG. 3 shows an example in which two frequencies are generated.

Each frequency synthesizer shown in FIG. 3 controls each voltage controlled oscillator (VCO) using the output from the highly stable reference oscillator 1 as a common reference signal.

The first frequency synthesizer includes a module 10 that controls a voltage controlled oscillator by phase comparison and a variable frequency divider (VD
) 5, and the second frequency synthesizer consists of a module 20 and a variable frequency divider 7.

The first frequency synthesizer uses a phase frequency comparison circuit (PC) to determine the phase of the reference signal from the reference oscillator 1 and the signal obtained by dividing the output of the voltage controlled oscillator 15 by the variable frequency divider 5.
12, and a charge pump (CP) 13 is driven according to the phase difference at this time. The combination of this phase frequency comparison circuit 12 and charge pump 13 forms a phase comparator. That is, charge pump 1
3 charges and discharges the capacitor in the loop filter 14 (LPF), and negative feedback works so that the phases of the two input signals to the phase frequency comparison circuit 12 constantly match, and the phase A synchronous loop is formed. The set frequency f of the output terminal 6 can be changed by the frequency division number of the variable frequency divider 5.

The second frequency synthesizer similarly includes a module 20 and a variable frequency divider 7, and provides a phase-synchronized output frequency r2 in the same way as the first frequency synthesizer.

In this way, in the multi-output frequency synthesizer, since a phase locked loop is formed for each frequency synthesizer, outputs with stabilized phases and frequencies can be obtained. Two frequencies can be independently set according to the frequency division numbers of the two variable frequency dividers 5 and 7.

A frequency synthesizer capable of outputting two frequencies is used in a wireless device as a local oscillator of a conversion mixer that converts a high frequency to an intermediate frequency. In a local oscillator using a frequency synthesizer with a single frequency output, the difference between the transmission and reception frequencies of the intermediate frequency had to be equal to the difference between the transmission and reception frequencies of the high frequency. However, by using a frequency synthesizer that can set two frequencies independently, This makes it possible to increase the degree of freedom in setting the frequency and setting the transmitting/receiving frequency interval at high frequencies.

Further, if it is desired to alternately switch and output two frequencies at high speed, an output changeover switch circuit for selecting two outputs of the frequency synthesizer is further added. The frequency synthesizer can switch the frequency by changing the frequency division number of the variable frequency divider. This frequency switching time is determined by the loop gain and the time constant τ of the loop filter. In order to shorten the time required for this frequency switching, it is possible to increase the natural frequency of the loop determined by k and τ, but in this case, the band frequency of the loop widens and the phase noise of the synthesizer output increases. There is. In this case, if the output is switched by an output changeover switch, the frequency setting time becomes irrelevant to k and τ of the phase-locked loop, and the switching time can be shortened to the response time of the output changeover switch.

[Problem that the invention seeks to solve]

However, in a conventional multi-output frequency synthesizer using such a plurality of variable frequency dividers, a plurality of phase-locked loop circuits are formed, resulting in an increase in overall power consumption. Since the power consumption in the variable frequency divider becomes extremely large at high frequencies such as UHFHF, the power consumption in this portion becomes a size that cannot be ignored in view of the overall power consumption. Particularly in the field of mobile communications, it is necessary to reduce power consumption, and conventional frequency synthesizers using a plurality of frequency dividers are not suitable as frequency synthesizers for mobile communications.

The present invention solves this conventional drawback and aims to provide a low power consumption multi-output frequency synthesizer with reduced power consumption.

[Means for solving problems]

The present invention provides a phase comparator that compares the phases of a reference signal and an output signal, a loop filter into which the comparison output of this phase comparator is input, and a voltage controlled oscillator whose oscillation frequency is controlled by the output of this loop filter. In a multi-output frequency synthesizer that incorporates N modules (N is a natural number of 2 or more) and obtains N frequency outputs, the frequency divider is inserted into a path that returns the output signal to the phase comparator. The phase comparator includes one variable frequency divider common to the N modules, and a feedback switch circuit that sequentially switches a feedback circuit passing through the variable frequency divider for the N modules. It is characterized by comprising a control circuit that includes means for setting the feedback switch circuit in a holding state, and synchronously provides a control signal for the feedback switch circuit, a control signal for the variable frequency divider, and a control signal for setting the phase comparator in the holding state. shall be.

Further, it is preferable that the means for holding the output of the phase comparator is a charge pump.

(Operation) When switching the switch circuit to form a phase-locked loop with a new module, first the output of the phase comparator of the module that has been driven is held in the state and the voltage controlled oscillator is brought into the free-running state.

In synchronization with this, the feedback switch circuit is switched to change the phase between the reference signal and the output of the variable frequency divider set with the frequency division number corresponding to the new module, thereby forming a phase-locked loop.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

The present invention includes a phase comparator (12, 13, 22, 23) that compares the phase of a reference signal and an output signal, and a loop filter (14, 24) into which the comparison output of this phase comparator is input.
and a voltage-controlled oscillator (15, 25) whose oscillation frequency is controlled by the output of this loop filter. A common variable frequency divider (3) for the N modules and a feedback circuit passing through this variable frequency divider are used as a frequency divider inserted in a path for feeding back the output signal to the phase comparator. The feedback switch circuit (4) sequentially switches the N modules. In addition, the phase comparator of each module includes means for setting the output to a holding state, and a control signal for the feedback switch circuit, a control signal for the variable frequency divider, and each control signal for setting the phase comparator of each module in a holding state is provided. It is equipped with a control circuit that provides synchronous signals.

FIG. 1 is a block diagram showing the configuration of a multi-output frequency synthesizer according to an embodiment of the present invention.

The multi-output frequency synthesizer circuit of this embodiment uses two first and second modules 10.20 that control the voltage controlled oscillator by comparing the phases of a reference signal and an output signal to generate outputs of two frequencies. It's something you get.

The reference signal of the common reference oscillator l is the phase frequency comparator circuit I.
2.22, and this phase frequency comparison circuit 1
The outputs of the variable frequency divider 3 are input to 2 and 22, respectively, and phase comparison is performed. The comparison result of the phase frequency comparison circuit 12 is input to a charge pump 13, and the output of the charge pump 13 is input to a loop filter 14.

This charge pump 13 also has the function of a holding switch, and when the reset terminal of the phase frequency comparison circuit 12 becomes high level, the charge pump 13 is turned off regardless of the input to the phase frequency comparison circuit 12, and the next stage is switched off. The output voltage of the loop filter 14 is held. The output of the loop filter 14 controls the oscillation frequency of the voltage controlled oscillator 15. The output of the voltage controlled oscillator 15 is outputted to the output terminal 6 as a signal with a frequency r.

This phase frequency comparison circuit 12, charge pump 13, loop filter 14, and voltage controlled oscillator 15 form a first module 10.

Similarly, the output of the phase frequency comparison circuit 22 is input to the charge pump 23, which includes the phase frequency comparison circuit 22, the charge pump 23, the loop filter 24, and the voltage controlled oscillator 25.
and form a second module 20, and a signal of frequency f2 is output to the output terminal 8.

Both outputs of the above-mentioned first and second modules 1O120 are led to a feedback switch circuit 4, which is feedback connected via a variable frequency divider 3 to a phase frequency comparison circuit 12.22 of each module.

Furthermore, the circuit of this embodiment has a control circuit 2, whose control signal is sent to the reset terminal of the phase frequency comparison circuit 12, 22,
It is input to the reset terminal and data terminal of the variable frequency divider 3 and the feedback switch circuit 4, and is controlled by the control circuit 2. Further, the reference signal is input to the control circuit 2.

Next, the operation of the circuit of this embodiment will be explained.

The present invention is characterized in that one variable frequency divider 3 is shared by a plurality of modules in a time-division manner, and a feedback path into which the variable frequency divider 3 is inserted is selected by a feedback switch circuit 4.
When switching the selection, an operation is performed to hold the input voltage of the voltage-controlled oscillator of the phase-locked loop that had been formed, and a frequency-divided signal is created by dividing the output of the voltage-controlled oscillator that forms the new phase-locked loop. A phase-locked loop is formed by controlling the phase of the signal and the reference signal to match.

When switching from the first module 10 with the output frequency f to the second module 20 with the output frequency ft, first, the phase frequency comparison circuit 12 is reset by the R3 set signal from the control circuit 2. As a result, the control voltage of the voltage controlled oscillator 15 of the first module 10 is held at a constant voltage by the function of the holding switch of the charge pump 13 described above, resulting in a free-running state.

On the other hand, the control circuit 2 controls switching of the second module 20 from the free running state to the synchronous state in the following order.

(1) Switch the switching signal of the feedback switch circuit 4 to the second module 20.

(2) Set the frequency division number data of the variable frequency divider 3 to a value corresponding to the frequency f2 of the second module 20, and reset the counter of the variable frequency divider 3.

(3) Detect the falling edge of the reference signal and release the reset of the variable frequency divider 3 and the phase frequency comparison circuit 22.

In this way, by canceling the reset of the variable frequency divider 3 in synchronization with the reference signal from the control circuit 2, the phase between the output of the variable frequency divider 3 and the reference signal is set to one cycle of the input of the variable frequency divider 3. It is possible to match with the following accuracy.

FIG. 2 is a time chart illustrating the outline of the timing of this switching operation.

As mentioned above, the frequency synthesizer of this embodiment shows a configuration using a charge pump, but in this configuration, the charge pump and the phase frequency comparison circuit can be considered as one phase comparator. Because there is
Various forms of phase comparator are possible. However, even in that case, a circuit for holding the input voltage of the voltage controlled oscillator in the free-running state is required, and this holding circuit can be easily realized using an analog switch or the like.

By controlling the control circuit as described above, the feedback switch circuit and the variable frequency divider can be switched, and the plurality of voltage controlled oscillators can be stabilized at their respective desired output frequencies.

Further, according to the present invention, when switching the voltage controlled oscillator from a free-running state to a synchronous state,
Since the signal phases are synchronized, the phase of the voltage controlled oscillator output immediately after switching is extremely stable.

If this operation is not performed, in the initial state of phase-locked loop formation, the phase difference between the two manual inputs to the phase comparator will be 0 to 2.
Since the voltage is set randomly between π, the capacitor in the loop filter is charged and the charge that maintains a constant voltage is randomly charged and discharged. Since this charging and discharging is performed until a phase synchronization state is achieved, the output frequency of the voltage controlled oscillator fluctuates greatly while this charging and discharging is performed.

In this embodiment, under the control of the control circuit 2, a signal with almost no phase and frequency fluctuations can be output even though a plurality of voltage controlled oscillators are controlled by a -2 feedback loop. In addition to the present embodiment, various methods for matching can be considered, and variations appear depending on the accuracy of the matching. Therefore, the accuracy of the phase-number control is set according to the allowable variation amount. As a simple phase control method, there is a method of canceling the reset of the charge pump when the output phase of the variable frequency divider and the reference phase match within a certain error range.

Although this embodiment shows a case where there are two modules, the number is not limited to two, but a plurality of N modules and a feedback switch circuit that switches a plurality of N outputs and a variable circuit shared by each module. Configure a feedback circuit with a frequency divider to
Of course, it is possible to configure a configuration to obtain output frequencies of 1 to 1.

In addition, when configured with a plurality of N modules, the control circuit selects and switches the output of each module to form a new phase-locked loop in a predetermined order. This is done by controlling the frequency generator and phase frequency comparison circuit.

〔Effect of the invention〕

As explained above, the multi-output frequency synthesizer of the present invention can stabilize a plurality of voltage controlled oscillators with one variable frequency divider. Therefore, the power consumption of a multi-output frequency synthesizer can be significantly reduced compared to the power consumption of a conventional frequency synthesizer used in a high frequency band such as UHFHF. The present invention is extremely useful when used in mobile communications that require low power consumption.

In addition, separate frequencies can be set for the local oscillators on the transmitting side and receiving station inside the radio, increasing the degree of freedom in setting each intermediate frequency or radio frequency, allowing for high-speed scanning of wireless channels. It has become possible to easily realize this.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention. FIG. 2 is a time chart of one embodiment of the present invention. FIG. 3 is a block diagram of a conventional example. 1... Reference oscillator, 2... Control circuit, 3.5.7.
...Variable frequency divider, 4...Feedback switch circuit, 6.8.
...Output terminal, 10.20...Module, 12.2
2... Phase frequency comparison circuit, 13.23... Charge pump, 14.24... Loop filter, 15.2
5... Voltage controlled generator.・) , ′ ・1 ゛・:f；6の夷廐 Example'M 1 Figure foil 2 Mouth ring ξ2 Cap ÷ Series π 3 Figure

Claims (2)

[Claims] (1) A phase comparator that compares the phases of a reference signal and an output signal, a loop filter to which the comparison output of this phase comparator is input, and a voltage-controlled oscillator whose oscillation frequency is controlled by the output of this loop filter. N modules with
(N is a natural number of 2 or more) built-in multi-output frequency synthesizer that obtains N frequency outputs, the N modules serve as frequency dividers inserted in a path that returns the output signal to the phase comparator. and a feedback switch circuit that sequentially switches a feedback circuit passing through the variable frequency divider for N modules, and the phase comparator includes means for keeping the output in a holding state. A multi-output frequency synthesizer comprising: a control circuit that synchronously provides a control signal for the feedback switch circuit, a control signal for the variable frequency divider, and a control signal for holding the phase comparator. (2) The multi-output frequency synthesizer according to claim (1), wherein the means for holding the output of the phase comparator is a charge pump.