JPS63278434A - Adaptive antenna system for fh communication - Google Patents

Adaptive antenna system for fh communication

Info

Publication number
JPS63278434A
JPS63278434A JP62113081A JP11308187A JPS63278434A JP S63278434 A JPS63278434 A JP S63278434A JP 62113081 A JP62113081 A JP 62113081A JP 11308187 A JP11308187 A JP 11308187A JP S63278434 A JPS63278434 A JP S63278434A
Authority
JP
Japan
Prior art keywords
control
circuit
synchronization
adaptive
condition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62113081A
Other languages
Japanese (ja)
Inventor
Takeshi Inoue
健 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62113081A priority Critical patent/JPS63278434A/en
Publication of JPS63278434A publication Critical patent/JPS63278434A/en
Pending legal-status Critical Current

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  • Radio Transmission System (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)

Abstract

PURPOSE:To quicken the FH by restricting the adaptive control at FH synchronization and setting the initial value of the adaptive control to a required value. CONSTITUTION:A signal outputted from an adder 6 is demodulated by a detection circuit 11 and noise is eliminated by a base band filter 12 and the output of the base band filter 12 is detected as to whether it is in the synchronizing state or not at that time by a synchronizing detection circuit 13 and the condition of a control condition set switch 17 is set. A weight control circuit 10 designates the restriction of the adaptive control in the synchronization acquisition state and the execution of control in the synchronizing state depending on the setting condition of the control condition setting switch 17. Moreover, an initial condition storage circuit 18, based on the hopping timing from a frequency synthesis section 16, stores the weight control converging data at the preceding hopping and gives it to the weight control circuit 10 as the weight initial data for the adaptive control at the next hopping. Thus, the adaptive control converging time is quickened.

Description

【発明の詳細な説明】[Detailed description of the invention]

〔産業上の利用分野〕 この発明は、FH通信用アダプティブアンテナ方式に関
するものである。 〔従来の技術〕 @3図は従来のFH通信用アダプティブアンテナ方式を
示すブロック構成図である。図において。 (11はアンテナ、(2)はミキサ、(3)は中間周波
フィルタ、(4)はA/D変換器−(5)は複素乗算回
路、(6)は加算器、(7)は受信信号出力端子、(8
)は基準信号入力端子、(9)は誤差検出回路、α0は
荷重制御回路、(ロ)は検波回路、CLlはベースバン
ドフィルタ、a3は同期検出回路、(ロ)はホンピング
同期サーチ回路、に)はクロック入力端子、αQは周波
数合成部である。 なお、アンテナ(1)はa 、 b 曲・・・・・nの
N個の素子アンテナからなり、ミキサ(2)、中間周波
フィルタ(3)及び複素乗算回路(5)も各素子毎に設
けられている。 次に動作について説明する。N個の素子よりなるアンテ
ナ(1)の各素子から入力した受信信号はミキサ(2)
において周波数合成部u6で発生された局発信号と混合
することによって中間周波信号に周波数変換される。中
間周波信号は中間周波フィルタ(3)によって不要成分
を除いた後、 A/D変換器(4)で各々ディジタル信
号盛ζ変換される。ディジタル変換された各エレメント
信号は、複素乗算回路(5)Iこ勿いて後述の荷重制御
回路αQからの信号によって位相及びレベルを荷重制御
される。荷重制御された各二Vメント信号は、加算器(
6)において合成され、受信信号出力端子(7)から出
力される。この時。 加算器(6)の出力と基準信号入力端子(8)から入力
される基準信号との誤差信号を誤差検出回路(9)で発
生し、荷重制御回路αQへの帰還ループを構成した上、
加算器(6)の出力と基準信号との誤差が最小となるよ
うに荷重制御回路α0を制御して、複素乗算回路(5)
の制御量を調整することによって、アダプティブアンテ
ナの機能である希望信号の方向利得を低下させず、妨害
方向に利得極小点を形成する効果を実現している。 一方、FH符号の同期方式として、デシタ送出の前にホ
ッピング符号同期用のプリアンプル符号を付加する方式
が一般的であり、説明図もこの方式のものとする。この
同期方式では、加算器(6)から出力された信号は、検
波回路(ロ)で復調した後。 ベースバンドフィルタ@で雑音成分を除かれる。 ベースバンドフィルタ@の出力は、同期検出回路(至)
で、その時点で同期状態薔こあるかどうかを検出し、ホ
ッピング同期サーチ回路α尋の同期サーチを継続するか
停止するかを決定する。すなわち、同期状態にない場合
は、り゛ロック入力端子明から送られてくるクロツクの
タイミングで逐次サーチを継続し、同期状態に達すれば
逐次サーチを停止する。このようにホンピング符号(プ
リアンプル符号)の同期を行ない、この同期タイミング
から指定されるホンピング開始位置情報をトリガとして
周波数合成部α・では予め予定されている符号順序で正
式なホッピングを始める。 〔発明が解決しようとTる問題点〕 従来の7ダグテイプアンテナ方式は以上のように構成さ
れているので、同期捕捉時にアダプティブアンテナの利
得最小の方向が希望信号方向にある状態から立ち上がら
なければならず、従って受信感度の極端に低い状態から
の立上がりということになり、実運用に供し得る広ダイ
ナミツクレンジのアンテナ方式の実現が困難であった。 この発明は上記のような問題点を解消するためになされ
たもので、従来のFH通信装置及びアダプティブアンテ
ナ各々単体の回路構成をほとんど変更することな(、耐
妨害性に強い広ダイナミツクレンジのFH通信用アダプ
ティブアンテナ方式を得ると共に、アダプティブ制御の
高速化、従ってFHの高速化を実現できる装置を得るこ
とを目的とする。 〔問題点を解決するための手段〕 この発明に係るFH通信用のアダプティブアンテナ方式
は、FH同期捕捉時にアダプティブ制御が受信感度に影
響しないよう拘束し同期捕捉時の受信感度が化の影響を
除くと#eIこ、一度同期収束した後の各ホンピング毎
のアダプティブ制御時には、初期値として収束状態の前
データを用いるようにしたものである。 〔作用〕 この発明番こ詔けるFH通信用のアダプティブアンテナ
方式は、ホッピングの同期、非同期情報をもとにアダプ
ティブ制御の初期状態にあける制御拘束及び制御初期値
の予測設定値を導入すること同期確立後のアダプティブ
収束時間を短縮することができる。 〔発明の実施例〕 以下、この発明の一実施例を図番こついて説明する。@
1図において2
[Industrial Application Field] The present invention relates to an adaptive antenna system for FH communication. [Prior Art] Figure @3 is a block configuration diagram showing a conventional adaptive antenna system for FH communication. In fig. (11 is the antenna, (2) is the mixer, (3) is the intermediate frequency filter, (4) is the A/D converter, (5) is the complex multiplication circuit, (6) is the adder, (7) is the received signal Output terminal, (8
) is the reference signal input terminal, (9) is the error detection circuit, α0 is the load control circuit, (b) is the detection circuit, CLl is the baseband filter, a3 is the synchronization detection circuit, (b) is the homping synchronization search circuit. ) is a clock input terminal, and αQ is a frequency synthesizer. In addition, the antenna (1) consists of N element antennas with a, b songs...n, and a mixer (2), an intermediate frequency filter (3), and a complex multiplier circuit (5) are also provided for each element. It is being Next, the operation will be explained. The received signal input from each element of the antenna (1) consisting of N elements is sent to the mixer (2).
The frequency of the signal is converted into an intermediate frequency signal by mixing it with the local oscillator signal generated by the frequency synthesizer u6. After unnecessary components are removed from the intermediate frequency signals by an intermediate frequency filter (3), each signal is converted into a digital signal by an A/D converter (4). The phase and level of each digitally converted element signal are weight-controlled by signals from a complex multiplication circuit (5) I and a weight control circuit αQ, which will be described later. Each load-controlled two-voltage signal is processed by an adder (
6) and output from the received signal output terminal (7). At this time. An error detection circuit (9) generates an error signal between the output of the adder (6) and the reference signal input from the reference signal input terminal (8), and forms a feedback loop to the load control circuit αQ.
The load control circuit α0 is controlled so that the error between the output of the adder (6) and the reference signal is minimized, and the complex multiplication circuit (5)
By adjusting the control amount, it is possible to achieve the effect of forming a minimum gain point in the interference direction without reducing the directional gain of the desired signal, which is a function of the adaptive antenna. On the other hand, as a synchronization method for FH codes, a method is generally used in which a preamble code for hopping code synchronization is added before data transmission, and the explanatory diagram is also based on this method. In this synchronization method, the signal output from the adder (6) is demodulated by a detection circuit (b). Noise components are removed with a baseband filter @. The output of the baseband filter @ is the synchronization detection circuit (to)
At that point, it is detected whether the synchronization state is present or not, and it is determined whether to continue or stop the synchronization search of the hopping synchronization search circuit αhiro. That is, if the synchronization state is not established, the sequential search is continued at the timing of the clock sent from the lock input terminal, and when the synchronization state is reached, the sequential search is stopped. In this way, the homping codes (preamble codes) are synchronized, and the frequency synthesizer α starts official hopping in the predetermined code order using the homping start position information specified from this synchronization timing as a trigger. [Problems that the invention seeks to solve] Since the conventional 7-dag tape antenna system is configured as described above, the adaptive antenna must start from a state where the direction of minimum gain is in the direction of the desired signal at the time of synchronization acquisition. Therefore, the reception sensitivity has to start from an extremely low state, making it difficult to realize a wide dynamic range antenna system that can be used in actual operation. This invention was made in order to solve the above-mentioned problems, and it is possible to create a wide dynamic range with strong anti-jamming properties without making almost any changes to the circuit configurations of the conventional FH communication device and adaptive antenna. It is an object of the present invention to obtain an adaptive antenna system for FH communication and also to obtain a device capable of realizing high-speed adaptive control and therefore high-speed FH. In the adaptive antenna method, the adaptive control is restrained so that it does not affect the reception sensitivity at the time of FH synchronization acquisition, and if the reception sensitivity at the time of synchronization acquisition is excluded from the influence of Sometimes, previous data in the convergence state is used as the initial value. [Operation] The adaptive antenna system for FH communication, which is the most advanced invention, performs adaptive control based on hopping synchronization and asynchronous information. By introducing control constraints that are open in the initial state and predicted set values for control initial values, the adaptive convergence time after synchronization is established can be shortened. explain about.@
2 in figure 1

【1】〜α・は前述の従来例におけるそ
れぞれと同一である。αηは同期検出回路(至)からの
同期検出情報にアダプティブアンテナの制御条件を選定
する制御条件設定スインチ、囮はホッピング収束後のア
ダプティブ制御の初期データとして、前データを記憶す
るための初期条件記憶回路である。 久に動作について説明する。受信機としての基本的構成
はl!3図の場合と同じであるが、荷重制御回路αqを
制御する回路構成が異なっている。加算器(6)から出
力された信号は検波回路αηで復調した後、ベースバン
ドフィルタ(財)で雑音を除かれる。 ベースバンドフィルタ(6)の出力は同期検出回路(至
)で、その時点で同期状態にあるかどうかを検出し。 この信号を基に制御条件設定スイッチaでの条件設件に
より、荷重制御回路αQで、同期捕捉状態ではアダプテ
ィブ制御の拘束を、同期状態では制御実行を指定する。 又、初期条件記憶回路側では1周波数合成部αQからの
ホンピングタイミングを基に。 1回前のホッピング時の荷重制御収束データを記憶保持
し1次のホッピング時のアダプティブ制御の荷重初期デ
ータとして荷重制御回路aOへ供給する。 なお、上記実施例では荷重制御回路の制御を制御条件設
定スイッチαη及び初期条件記憶回路側で行っているが
、これらの機能をンフトワエアで実現しても良い。 また、ホンピング同期捕捉状態番こついて、上記実施例
では、プリアンプ“ル符号を用いた逐次サーチ(スライ
ディング)を行う場合基ζついて説明を行ったが、他の
方式1例えば符号相関器を用いた同期捕捉状態膓こつい
ても同様の効果を発揮する。 1g2図はこの符号相関器を用いたこの発明の他の実施
例を示すブロック構成図で図において、C1)ν 〜(6)、及び00〜回はSt図の実施例と同一である
。 α9はSAWコンボルバ等の符号相関器である。SAW
コ/ボルバを用いたとき符号相関器四ではSAWの電極
の構造でIIIかIQIの対応を作り、この構造の配列
でホンピングパターンの符号を構成する。従って、検波
回路(ロ)及びベースバンドフィルタ(6)を通過して
きた受信データは符号相関器(SAWコンボルバ)■で
比較照合され、符号が完全に一致したタイミングで符号
相関値が最大となり同期タイミングを出力することにな
る。従って。 この同期情報によって周波数合成器αQ及び制御条件設
定スイッチσηを制御すれば、第1図と同じ効果が得ら
れる。この場合符号相関器α9で、ホッピングの同期サ
ーチと同じ効果も同時に実現するので1gt図の実施例
で用いたホッピング同Mサーチ回路α尋は不要であり、
またサーチ制御用のクロック入力(ト)も不用となる。 〔発明の効果〕 以上のように、この発明によれば、ホッピング同期捕捉
段階において、アダグチイブ制御を拘束するよう構成し
たので、動作の安定したものが得られ、かつ、同期捕捉
後のアダプティブ制御初期荷重条件薯こ、ホンピングの
前データを利用するようしたので、アダプティブ制御収
束時間が高速化される効果がある。
[1] to α· are the same as those in the conventional example described above. αη is a control condition setting switch that selects control conditions for the adaptive antenna based on synchronization detection information from the synchronization detection circuit (to), and decoy is an initial condition memory for storing previous data as initial data for adaptive control after hopping convergence. It is a circuit. I will explain the operation shortly. The basic configuration of a receiver is l! This is the same as the case in FIG. 3, but the circuit configuration for controlling the load control circuit αq is different. The signal output from the adder (6) is demodulated by a detection circuit αη, and then noise is removed by a baseband filter. The output of the baseband filter (6) is sent to a synchronization detection circuit (to), which detects whether or not it is in a synchronized state at that time. Based on this signal, the load control circuit αQ specifies the constraint of adaptive control in the synchronization acquisition state and the control execution in the synchronization state by setting the conditions at the control condition setting switch a. Also, on the initial condition storage circuit side, based on the homp timing from the 1-frequency synthesizer αQ. The load control convergence data from the previous hopping is stored and held, and is supplied to the load control circuit aO as load initial data for the adaptive control during the first hopping. In the above embodiment, the load control circuit is controlled by the control condition setting switch αη and the initial condition storage circuit, but these functions may be realized by a software. In addition, regarding the homping synchronization acquisition state number, in the above embodiment, the base ζ was explained when performing a sequential search (sliding) using a preamplifier code, but other methods 1, for example, using a code correlator A similar effect is achieved even when the synchronization acquisition state is stuck. Figure 1g2 is a block diagram showing another embodiment of the present invention using this code correlator. ~ times are the same as the example of the St diagram. α9 is a code correlator such as a SAW convolver. SAW
When a co/volver is used, the code correlator 4 creates a correspondence between III and IQI using the structure of the SAW electrodes, and the arrangement of this structure constitutes the code of the homping pattern. Therefore, the received data that has passed through the detection circuit (b) and baseband filter (6) is compared and verified by the code correlator (SAW convolver), and when the codes completely match, the code correlation value becomes maximum and the synchronization timing is reached. will be output. Therefore. By controlling the frequency synthesizer αQ and the control condition setting switch ση using this synchronization information, the same effect as in FIG. 1 can be obtained. In this case, the code correlator α9 simultaneously achieves the same effect as the hopping synchronized search, so the hopping same M search circuit α used in the example of the 1gt diagram is unnecessary.
Also, the clock input (g) for search control becomes unnecessary. [Effects of the Invention] As described above, according to the present invention, since the adaptive control is constrained in the hopping synchronization acquisition stage, stable operation can be obtained, and the adaptive control initial stage after synchronization acquisition is Since the data before the load condition and homping are used, the adaptive control convergence time has the effect of speeding up.

【図面の簡単な説明】 第1図はこの発明の一実施例を示すブロック構成図、第
2図はこの発明の他の実施例を示すブロック構成図。第
3図は従来のFH通信用アダプティブアンテナ方式を示
すブロック構成図である。 図において、(1)はアンテナ、(2)はミキサ、(3
)は中間周波フィルタ、(4)はA/D変換器、(6)
は複素乗算器、(6)は加算器、(7)は受信信号出力
端子、(8)はな 基準信号入力端子、(9)は誤算検出回路、αqは荷重
制御回路、(ロ)は検波回路、(6)はベースバンドフ
ィルタ、(至)は同期検出回路、α勺はホンピング同期
サーチ回路、(ト)はクロック入力端子、(至)は周波
数合成部、αηは制御条件設定スイッチ、aBは初期条
件記憶回路、叫は符号相関器である。 なお1図中同一符号は同一、または相当部分を示す。 第1図 第2図 1γ
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing one embodiment of the invention, and FIG. 2 is a block diagram showing another embodiment of the invention. FIG. 3 is a block diagram showing a conventional adaptive antenna system for FH communication. In the figure, (1) is the antenna, (2) is the mixer, and (3
) is an intermediate frequency filter, (4) is an A/D converter, (6)
is a complex multiplier, (6) is an adder, (7) is a received signal output terminal, (8) is a reference signal input terminal, (9) is a miscalculation detection circuit, αq is a load control circuit, and (b) is a detection circuit. circuit, (6) is a baseband filter, (to) is a synchronization detection circuit, α is a homping synchronization search circuit, (g) is a clock input terminal, (to) is a frequency synthesizer, αη is a control condition setting switch, aB is an initial condition memory circuit, and is a code correlator. Note that the same reference numerals in Figure 1 indicate the same or equivalent parts. Fig. 1 Fig. 2 Fig. 1γ

Claims (1)

【特許請求の範囲】[Claims] (1)通信初期においてプリアンプル信号によつて同期
捕捉を行うFH通信装置とアダプティブアンテナとを組
み合わせたFH通信用アダプティブアンテナ方式におい
て、 FH同期時のアダプティブ制御を拘束するとともに、 上記アダプティブ制御の初期値を所要値に設定するよう
にしたことを特徴とするFH通信用アダプティブアンテ
ナ方式。
(1) In an adaptive antenna system for FH communication that combines an adaptive antenna and an FH communication device that performs synchronization acquisition using a preamble signal at the initial stage of communication, adaptive control at the time of FH synchronization is constrained, and the initial stage of the above adaptive control is An adaptive antenna system for FH communication, characterized in that a value is set to a required value.
JP62113081A 1987-05-08 1987-05-08 Adaptive antenna system for fh communication Pending JPS63278434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62113081A JPS63278434A (en) 1987-05-08 1987-05-08 Adaptive antenna system for fh communication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62113081A JPS63278434A (en) 1987-05-08 1987-05-08 Adaptive antenna system for fh communication

Publications (1)

Publication Number Publication Date
JPS63278434A true JPS63278434A (en) 1988-11-16

Family

ID=14602999

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62113081A Pending JPS63278434A (en) 1987-05-08 1987-05-08 Adaptive antenna system for fh communication

Country Status (1)

Country Link
JP (1) JPS63278434A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02181534A (en) * 1989-01-06 1990-07-16 Mitsubishi Electric Corp Adaptive control antenna
EP1227631A1 (en) * 1999-11-08 2002-07-31 Sanyo Electric Co., Ltd. Radio receiving system and synchronization detection method
US6763062B1 (en) 1999-05-24 2004-07-13 Toshiba Tec Kabushiki Kaisha Radio communication system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02181534A (en) * 1989-01-06 1990-07-16 Mitsubishi Electric Corp Adaptive control antenna
US6763062B1 (en) 1999-05-24 2004-07-13 Toshiba Tec Kabushiki Kaisha Radio communication system
EP1227631A1 (en) * 1999-11-08 2002-07-31 Sanyo Electric Co., Ltd. Radio receiving system and synchronization detection method
EP1227631A4 (en) * 1999-11-08 2006-02-01 Sanyo Electric Co Radio receiving system and synchronization detection method

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