JPS63271989A - Optoelectronic integrated circuit device and manufacture thereof - Google Patents

Abstract

PURPOSE:To lessen the amount of scatter of the current amplification factor and reduce the stray capacity at the circumference of a collector and then, makes it pos sible to operate at great speed by forming a base layer of a transistor before a protrud ing form of a laser part is formed so that both electrodes of the laser part may be taken out from the surface of a substrate by using a semi-insulation substrate. CONSTITUTION:An n-type layer 103 makes possible the epitaxial growth on a semi- insulation substrate 101 and the n-type layer 103 is used as an n-type clad layer of a laser device 1 and also is used as a collector layer of a transistor 2. And an active layer 104 of the laser device and a p-type optical waveguide layer 105 are laminated and among them, the active layer 104 is used as a part of the collector layer and the p-type waveguide layer 105 is used as a base layer in the transistor 2. Then, after forming a p-type clad layer 106 of the laser device, it is selectively etched into the form of a stripe and the laser part 1 is made up and after that, this device allows an emitter layer 111 comprising an extensive transistor to grow and a stripe-like protrusion of the laser device is buried in its layer. As the base layer of this transistor is formed at the first time, it may have uniform characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an optoelectronic integrated circuit that integrates a light emitting element and a transistor and is suitable for integration, and particularly relates to an integrated circuit using InP as a material and a method for manufacturing the same.

2. Description of the Related Art An optoelectronic integrated circuit is a device in which a light emitting element and an electric element are integrated on the same semiconductor substrate, and is small in size, low in price, and excellent in high speed. FIG. 3 shows a cross-sectional structural diagram of a conventional optoelectronic integrated circuit. Figure 3 (1) shows the final shape. The laser part 332 is a buried double heterojunction laser with low leakage current, and the transistor 333 is a HB
ojunctionBipolar Transist
or) is used.

A conventional manufacturing method will be described below. As shown in FIG. 3(a), first, in order to form a laser structure, an n-type I
The emitter layer 324 and base layer are etched over the nP layer to form a mesa shape of the transistor portion 3330 as shown in FIG.

After that, as shown in FIG. 3(f), after depositing a silicon nitride film 351 on the entire surface, an isolation opening 362 is formed, and Zrx, which is a p-type impurity, is diffused until it reaches the p-made isolation layer 321. Separates transistor elements. Further, after removing the silicon nitride film, a new silicon nitride film 361 is deposited, and graft base diffusion of each transistor is performed using Zn as an impurity to form a graft base region 362 (
Figure 3 (q)).

A new silicon oxide film 371 is deposited to form each electrode as shown in FIG. 3(h). For p type, A u/
An anode electrode 372, a base electrode 373, and a separation electrode 374 are formed using Z n /A u. For n-type, the emitter electrode 3 and collector electrode 376 are formed using Au/Sn/Au. Further, the laser portion 332,
In order to electrically isolate the transistor portion 333, a separation groove is formed as shown in FIG. 3(i), and the insulating resin 381 is
Fill the separation groove and separate.

(cladding layer) 302, and I as an active layer 303 on top of it.
An nGaAsP layer is formed to a thickness of 0.2 μm, and a p-type InP layer (cladding layer) 304 and a p-type InP layer are formed on top of the nGaAsP layer to a thickness of 0.2 μm.
A GaAsP layer (key layer) 306 is laminated and formed. Next, a silicon oxide film 311 is formed in a desired region,
Using the silicon oxide film 311 as a mask material, a third layer is formed using a mixed solution of hydrochloric acid, sulfuric acid, and bromine and methyl alcohol.
An inverted mesa shape 312 as shown in Figure (b) is formed. After that, the inverted mesa shape is filled in using liquid phase epitaxial growth. At this time, each layer of the transistor is built into the buried layer. The buried layer is p-type InP, the isolation layer 321 and collector layer 322 are n-type InP, and the base layer 323 is p-type 1nGaAsP. The emitter layer 324 is n-type InP, which has a wider forbidden band width than the base layer 323, and the emitter conductive layer (contact layer) 326 is n-type I, which has a higher concentration.
nGaAsP is sequentially formed (FIG. 3(C)).

Next, the laser portion 332 and the emitter contact region 334 in the transistor portion 333 are covered with photoresist 331, and the emitter conductive layer 326 is etched (FIG. 3(d)). A new photoresist 341 is used to form a laser part 332, a transistor part 333, and a wiring metal 391.
After vapor deposition, wiring between each element is performed using a lift-off method.

Each laser cleaves the wafer to form a Fabry-Perot cavity. In order to easily perform cleavage and improve heat dissipation from the chip, the back surface of the wafer was polished, and then A u/S n/A u was formed on the entire surface as the cathode electrode 392 of the laser on the back surface. Diagram (j)
An optoelectronic integrated circuit containing a laser and a transistor as shown in FIG. 1 can be formed.

Problems to be Solved by the Invention The conventional optoelectronic integrated circuit as shown in FIG. 3, which has been described above, has the following drawbacks. In other words, each layer of the transistor is formed when embedding the inverted mesa shape of the laser, but during epitaxial growth, the film thickness of each layer changes depending on the distance from the inverted mesa shape due to the influence of the convex part of the inverted mesa shape. Therefore, the thickness of the base layer, which determines the characteristics of the transistor, is non-uniform, causing variations in the current amplification factor. Furthermore, since the laser current flows perpendicularly to the wafer, a conductive material is used for the substrate, and a p-type separation layer is used to separate each transistor. Therefore, the pn junction capacitance between the collector and the separation layer is added to the collector capacitance, which hinders high-speed operation of the transistor.

Means for Solving the Problems The method of the present invention uses a semi-insulating semiconductor for the substrate and has a structure in which both electrodes of the laser can be taken out from the substrate surface, and the base layer, which greatly affects the characteristics of the transistor, is made of a semi-insulating semiconductor. The method is to perform epitaxial growth before the convex shape of the part is formed.

For production The effects of the above means are as follows.

A semi-insulating substrate is used as the substrate, and an n-type layer is epitaxially grown thereon, and this n-type layer is used as an n-type cladding layer of a laser and as a collector layer of a transistor. The transistor is therefore formed on a semi-insulating substrate. Furthermore, the active layer of the laser and p
These two layers are used in a transistor, with the active layer serving as part of the collector layer and the pi waveguide layer serving as the base layer.

Thereafter, a p-type cladding layer of the laser is further formed thereon, and then selectively etched into stripes to form a laser section. Thereafter, the emitter layer of the full-surface transistor is grown to bury the striped convex portion of the laser. This convex part is only the thickness of the p-type cladding layer of the laser, so it has little effect on the film thickness of the vitaxial growth, and the base layer, which determines the characteristics of the transistor, is formed during the first growth, so it is uniform. characteristics.

Examples Examples of the present invention will be described below with reference to the accompanying drawings. 1st
The figure is a cross-sectional structural diagram of an optoelectronic integrated circuit in which a laser section 1 and a transistor section 2 are integrated on the same substrate according to the present invention. FIG. 2(a) to FIG. 2(a) are sectional views of each manufacturing process for explaining the present invention in detail.

As shown in FIG. 2(a), an n-type heavily doped layer 102 is formed on a semi-insulating InP substrate 101, and n-type InP with a concentration of I×1018 cm−3 is deposited to a thickness of 1 μm in order to reduce series resistance.
with a concentration of 1X10 as an n-type layer 103 on top of it.
An n-type 1nP layer of cIL is formed to a thickness of 1 μm. n
The type layer 103 is an n-type cladding layer of the laser section 1 and is also a collector layer of the transistor section 2. n-type layer 103
is made to have a lower concentration than the n-type high concentration layer in order to increase the breakdown voltage between the collector and base of the transistor. Furthermore, an active layer 104 of the laser is made of InGaAsP with a composition wavelength λy = 1.3 μm and a thickness of 0.16 pm, and an optical waveguide layer 105 is formed on it with a composition wavelength λg = 1.1 μm and a concentration of 5×10” cWL. −3 p-type InGaAsP to 0
．． It is formed in this order to a thickness of 2 μm. Optical waveguide layer 105
is also the pace of transistors. On top of that is a p-type cladding layer 106 with a concentration of 1×1o18cIL-3! −
with a thickness of 1.2 μm, and a p-type contact layer with a composition wavelength λy of 1.1 fim and a concentration of 3×10 cx.
The nGaAsP is epitaxially grown in this order.

Next, as shown in FIG. 2(b), the silicon nitride film 211 and the photoresist 212 are left in a stripe shape, and the p-type contact layer 107 and the p-type cladding layer 106 are formed with a width of 2.
By etching to micrometers, the shape has the effect of confining the current and allows the laser light to be contained.

After that, the photoresist 212 and the silicon nitride film 211 are removed, and the emitter layer 111 is removed as shown in FIG. 2(p).
n-type InP with a concentration of 5×10 cIIL was added as 0.
6 μm thick, and an n-type contact layer 11 on top of it.
n-type InGaA with concentration 2X1018clL-3 as 2
sP is formed to a thickness of 0.2 μm.

Thereafter, a silicon nitride film 231 is deposited on the entire surface, and a photoresist 232 is used to leave the photoresist 232 and silicon nitride film 231 on the emitter part of the transistor as shown in FIG. 2(d). The n-type contact layer 112 is etched and removed using a first etching solution containing a mixture of hydrogen peroxide and water, and then the second contact layer 111 is etched using a second etching solution containing a mixture of hydrochloric acid and phosphoric acid. Remove. Optical waveguide layer 105
Since is InGaAgP! With the etching solution No. 2, no etching occurs and a mesa structure as shown in FIG. 2(d) can be easily formed.

The photoresist 232 and the silicon nitride film 231 are removed, a new silicon nitride film 241 is deposited, the silicon nitride film 241 and the photoresist 242 are left only on the laser part 1 and the transistor part 2 with the photoresist 242, and the first etching solution is applied. The optical waveguide layer 105 and the active layer 1
04 is removed by etching. In the first etching solution, I
Since the etching speed for nP is slow, the n-type conductive layer 10
3 (InP), the etching stops as shown in Figure 2 (
A mesa shape as shown in e) can be easily formed.

Next, in order to bring out the pace of the transistor part 2, using the silicon nitride film 251 with holes made only in the part where the base contact will be formed as a mask material, the InP
Zn, which is a p-type impurity, was added at a temperature of 500°C.
A sealed tube diffusion is performed for 0 minutes to form a graft base diffusion region 252 (FIG. 2 (phantom)).

After that, in order to electrically isolate between the laser section 1 and the transistor section 2, an opening for forming an isolation groove is formed using a silicon nitride film 261 and a Ti film 262, and reactive ion etching (IIE) is performed using CCl4 gas. ), the separation groove 263 is formed to a depth that reaches the semi-insulating InP substrate 101 (FIG. 2(g)).

As shown in FIG. 2(h), insulating resin 2 is placed in the separation groove 263.
71 to enable wiring across the separation trench. Thereafter, an anode electrode 272, an emitter electrode 273, and a collector electrode 274 are formed using metals of A u /S n /A u. An optoelectronic integrated circuit device in which a cathode electrode 27B and a pace electrode 276 are formed using metals of A u / Z n / A u, and a laser part 1 and a transistor part 2 are integrated on the same substrate as shown in FIG. can be formed.

The base layer of the transistor is formed on a flat substrate surface during the first epitaxial formation, so it has excellent uniformity and is similar to the n-cladding layer of the laser.

Since the active layer and photoelectric wave layer are also used as the collector and paste of the transistor, the circuit is planar compared to conventional optoelectronic integrated circuits, and the separation trench can be lower, making wiring easier and suitable for high-density integration. . In addition, the transistor is an HBT with high emitter injection efficiency, and the space-collector interface has an active layer with a narrower forbidden band width than the base layer (optical waveguide layer 1o6), so the p-n junction surface has a low concentration. Even if electrons enter the collector side (active layer 1o4), since a p-n junction with a large forbidden band width is not formed, the inflow of electrons to the collector of the HBT is not inhibited, and the transport efficiency does not decrease. A large HBT can be formed.

Effects of the Invention As described above, according to the present invention, a transistor with a uniform paste thickness, resulting in little variation in current amplification factor, small stray capacitance around the collector, and capable of high-speed operation can be used as a laser. Optoelectronic integrated circuit devices can be formed on the same substrate.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of an optoelectronic integrated circuit device according to an embodiment of the present invention, FIGS. 2(a) to (h) are process cross-sectional views showing a manufacturing method according to an embodiment of the present invention, and FIG. ) to (1) are process cross-sectional views showing a conventional method for manufacturing a semiconductor device. DESCRIPTION OF SYMBOLS 1...Laser section, 2...Transistor section, 1o1...Semi-insulating InP substrate, 102.
...N-type high concentration layer, 103...N-type layer,
104... Active layer, 105... Optical waveguide layer, 106... P-type cladding layer, 111...
...Emitter layer.

Claims (2)

[Claims] (1) On a semi-insulating substrate, an n-type conductive layer that is a collector layer of a transistor and corresponds to an n-type cladding layer of a laser, and an active layer of the laser whose forbidden band width is smaller than that of the n-type conductive layer; A p-type conductive layer, which is the base of the transistor and whose forbidden band width is larger than that of the active layer and smaller than the n-type conductivity type and corresponds to the optical waveguide layer of the laser, is laminated in this order, and the p-type conductive layer of the laser is laminated in this order. A type cladding layer and an n-type emitter layer of the transistor are formed at desired positions on the p-type conductive layer, respectively, and a collector layer, a base layer, and an emitter layer of the transistor and a p-type cladding layer of the laser are formed at desired positions on the p-type conductive layer. An optoelectronic integrated circuit device in which electrodes are formed on each of the layer and the n-type cladding layer using ohmic contact metal. (2) On a semi-insulating substrate, an n-type conductive layer, an active layer of the laser whose forbidden band width is smaller than that of the conductive layer, and a p-type conductive layer whose forbidden band width is larger than the active layer and smaller than the n-type conductive type. and a p-type cladding layer having a larger forbidden band width than the p-type conductive layer are stacked in this order, and the p-type conductive layer is exposed while leaving the p-type cladding layer in a stripe shape. a step of newly forming an n-type emitter layer on the p-type conductive layer; a step of selectively removing the n-type emitter layer; and a step of removing the p-type conductive layer and the active layer. selectively removing the layer; and forming respective electrodes of metal forming ohmic contacts with the n-type conductive layer, the p-type conductive layer, the n-type emitter layer, and the p-type cladding layer. A method of manufacturing an optoelectronic integrated circuit device, including: