JPS62229892A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a device, which can operate as a laser diode with a low threshold value and can operate as a bipolar transistor, whose high frequency characteristics are excellent, by forming a narrow stripe ridge guide structure with a plurality of layers, which are grown by a hetero-epitaxial method, and forming an effective P-N junction only in the vertical direction. CONSTITUTION:On a semi-insulating GaAs substrate 1, a ridge type lightguide comprising a lower N-AlGaAs clad layer 2, a P-GaAs active layer 3 and an upper N-AlGaAs clad layer 4 is formed by a self-alignment technology. An N<+>GaAs cap layer 5, a current constriction region 6 and an SiO2 insulating layer 7 are provided. When a bias is applied between electrodes 9 and 10, the interface part of the layers 3 and 4 acts as an effective P-N junction. Thus laser oscillation occurs. when the electrodes 10, 9 and 8 are made to be a base, an emitter and a collector, N-P-N junctions are formed in the vertical direction in a narrow stripe ridge guide part comprising the layers 4' 3 and Z. The junctions operate as a vertical N-P-H transistor' in which the layer 4 is an N region, the layer 3 is a P region and the layer 2 is an N region.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field to which the Invention Pertains) The present invention relates to a semiconductor device capable of functioning as both a semiconductor laser and a double heterojunction bipolar transistor with the same structure, and a method for manufacturing the same.

(Prior Art) As a conventional device that operates as a laser and a bipolar transistor with the same device structure, there is a report by Mori et al. regarding a laser transistor formed on an InP substrate. (Y
oMorLetat, i The /AthCon
ference on 8olid 5tate De
vices and materials, p.

(lr) However, since this device uses a liquid phase epitaxial method as a crystal growth method, buried growth is used to form stripes in the active layer. For this reason, due to reasons such as so-called meltback, it is difficult to precisely miniaturize the width of the current injection region and the optical confinement region formed perpendicularly to the current injection region when operating as a laser. In addition, since the injection current density cannot be increased, there is a drawback that the laser oscillation threshold cannot be lowered. This also applies when operating a semiconductor device as a bipolar transistor.
This is equivalent to poor high frequency characteristics.

In addition, buried growth is difficult only by crystal growth methods such as MOOVD, which is suitable for mass production, so it is not expected that the buried structure will improve economic efficiency through mass production.

(Objective of the Invention) The present invention solves the above-mentioned problems and realizes a simple and highly accurate narrow stripe structure.In addition, when functioning as a semiconductor laser, the oscillation threshold can be lowered, and on the other hand, the bipolar When used as a transistor, it is possible to realize a semiconductor device with improved high frequency characteristics. Another object of the present invention is to utilize these characteristics to realize a monolithic semiconductor device in which a light source and a driving circuit element have the same structure.

(Structure of the Invention) The structural feature of the present invention is that a narrow striped bridge guide structure is formed in a plurality of layers grown by heteroepitaxial growth,
Furthermore, by utilizing the difference in built-in potential between the parts thus formed, an effective pn junction is formed only in the vertical direction of the striped ridge guide structure, and the cross-sectional dimension of the junction in this case is extremely large. The optical characteristics and electrical characteristics of a semiconductor device are improved by taking advantage of the fact that it can be formed finely and with high precision.

Further, the manufacturing method of the present invention is characterized in that after the heteroepitaxial growth, a narrow strip bridge guide structure is formed in the cell 7 alignment by ion implantation, and
The point is that narrow stripe electrodes are also formed using self-contained lines.

These configurations and the effects based thereon will become more clear from the examples shown below.

(Example) FIG. 1 shows a first example of the present invention. ■ is semi-insulating GaA
s substrate, ■ is the lower n-AZGB AB cladding layer, ■
is the P-GaAs active layer, and ■ is the upper n1 GaAs layer.
The cladding layer forms a ridge-type optical waveguide.
(2) is an n-GBks cap layer. 2 is an ion-implanted P region provided for narrowing the current injection region. Also ■
is an 8i01 insulating layer, and ■, ■, and @ are electrodes, respectively. As an electrode, n/Ge /N t s or An/Ge
etc. are available.

In such a configuration, when forming a current path between electrodes 0 and 0, a pn junction may be formed at the interface between electrodes 0 and ■, or at the interface between ■ and ■. However, when considering the difference in built-in voltage depending on the material, the interface part between ■ and ■ has a smaller value, and the part with c acts as an effective p-n junction. Therefore, the electrode ■.

When bias is applied between 0, 0→Q-1-(j)→■→
■→■→■1! A flow path is formed, and (2) acts as an active layer, light emission occurs due to the combination of electrons and holes, and laser oscillation occurs. In this case, p between 0.0 determines the current density of the active layer and influences the laser oscillation threshold.
The cross-sectional dimension of the n-junction surface can be realized extremely finely and with high precision by the manufacturing method described later, so that the oscillation threshold can be easily lowered.

Furthermore, in this structure, if a bias is applied between 0 and 0, a path of 0→@→@→■→■→■ is established, and laser oscillation similarly occurs. That is, pn junctions in both directions can be used.

Further, in order to operate this semiconductor device as a bipolar transistor, an npn junction is formed in the vertical direction in the narrow strip bridge guide portion consisting of (1), (2), (3), and this effectively functions as a transistor. Therefore, if the electrode 0 is the base, the emitter is the electrode, and the collector is the collector, the transistor operates as a vertical WnP transistor with the electrode 0 as the base, the emitter as the electrode, and the collector as the collector. In this case as well, the cross-sectional dimension of the pn junction can be made extremely small, so that the high frequency characteristics can be easily improved.

Next, the method for manufacturing the semiconductor device of the present invention will be explained with reference to FIG.

First, a film of Si, N, etc. is formed by a plasma OVD method or the like on an epitaxial crystal layered by a MOOVD method or the like, and a photoresist is applied thereon, and then a resist layer a? ). (Figure-
, 2(a)) Next, S is etched by dry etching using OF.
i3N and Ii are etched using the resist αD as a mask, leaving the 8i@N4 layer αQ only in the emitter region. (Figure-j(b)) Next, by dry etching using chlorine gas, n”-GaA31i1α9,n A
l, GB A@@ (14 is etched to form a ridge stripe. (Figure-J (C)) After this, s
, using NtluH as a mask, perform ion implantation of Be + 'Mg, etc. to form a P-type region (
Formation of I81. Figure C-J(d)) Next K,” s N
4 Leaving dl O and the 9 resist surfaces above it,
Above these are 8i0. Layers are laminated by sputtering or the like. (Fig. 2(e)) Thereafter, the resist layer is dissolved by ultrasonic treatment in acetone, and the emitter region 810 is removed from the layer-' by a lift-off method. In this state, the surface is S i O! (19 or 8i
, N, film 4 is covered, and heat treatment is performed using this as a protective film to activate the ion implantation region. Next, a resist 9 surface/ of the emitter electrode is formed, and 81sN*l1 (L
*Remove the Fc 8i0 while leaving the sidewall layer to expose the n+-GBA4 cap 1iaS, and deposit an emitter electrode. (
(FIG. 7(f)) Next, the base region and collector region are exposed by mesa etching, and then electrodes are formed. Since these steps are well known, illustration thereof will be omitted. As described above, in the present invention, since the ridge stripe region, the current confinement region, and the emitter electrode are multi-formed using the cell 7 alignment technology, it is possible to easily realize a fine stripe structure. It becomes possible to form the laser and the high-speed vibrator 2 in a highly integrated manner.

Next, a second embodiment of the present invention will be described with reference to FIG. This embodiment differs from the first embodiment shown in FIG. 1 in the configuration of n-AzGll AB 11 in contact with the active layer made of P-GaAa. That is, in the second embodiment shown in FIG.
ak, @a of (cladding layer in case of semiconductor laser)
It is characterized by the use of a graded junction in which the composition ratio of Ga and Ga is continuously changed. For example, n-type Aj) (Gl AIB
The composition shown by x = 0, l to υ! In the range of - The band structure when K is set in this manner is as shown in FIG. μ (b).

On the other hand, the band structure in FIG. 1 is as shown in FIG. μ (,). Comparing the two is as follows. That is, Section V(a)
In the case shown in the figure, there is a spike in the conduction band between the pace portion c3 and the emitter C3η, which deteriorates the high frequency characteristics when used as a bipolar transistor.

On the other hand, in the case of the second example, Hiro (b), the pace,
Since there are no spikes in the conduction band between the emitters and the band gap is sloped, the movement of electrons during the pace is not hindered, so the travel time can be shortened. As a result,
The current gain and cutoff wavenumber of the transistor can be further improved.

Also, as is clear from comparing Figure 3 and Figure 1, KGa
Since the As active layer (1) is also made thinner and a quantum well effect is produced as a result, such an epitaxial crystal structure can also reduce the laser oscillation threshold when operated as a laser.

(Effects) As explained above, the device whose structure and manufacturing method are disclosed according to the present invention can operate as a low threshold laser diode, and can also operate as a bipolar transistor with excellent high frequency characteristics.

In other words, a high-performance semiconductor laser and a high-performance transistor can be formed in the same process. By making the semiconductor laser and the drive circuit element monolithic, a highly reliable light source device can be produced economically, which is effective for constructing optical data rings, etc.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention;
FIG. 29 is an explanatory diagram of the manufacturing process of the semiconductor device according to the present invention, FIG. 3 is a sectional view of the semiconductor device of the second embodiment of the present invention, and @φ diagram (a) is the first embodiment of the present invention. Figure ≠(b) is a band structure diagram of the third embodiment of the present invention. /, //... Semi-insulating GaA3 substrate, 2. lA, /2
゜ / IA-n type AJ! , GaAsl1li, 2',
μ'...Composite 1 with one layer of n-type aG and continuously changing the composition ratio of U and Ga, J-T' type GaAs1l,j
, /j-... High concentration n-type GaAs layer, g, it...
P-type layer formed by ion implantation, 7,/9-8i
0. Insulation 1! , ri, 10. −〇・・・Electrode, IA・
...si, N, layer, 17...resist layer, 31...
Emitter section, 3... pace section, 33... collector section.

Claims (1)

[Claims] 1. A first n-type AlGaAs layer (2) with a convex cross section provided on a semi-insulating GaAs substrate (1);
P provided on the upper flat surface of the type AlGaAs layer (2)
type GaAs layer (3) and a second n-type AlGaAs layer (4) with a convex cross section provided on the P-type GaAs layer (3).
, a high concentration n^+ type GaAs layer (5) provided on the upper flat surface of the second n-type AlGaAs layer (4), and a lower flat surface of the second n-type AlGaAs layer (4). a P-type constriction layer (6) having a planar shape and formed by ion implantation that extends to the first n-type AlGaAs layer (2);
An insulating layer (7) having an L-shaped cross section provided in contact with the second n-type AlGaAs layer (4) and the high concentration n^+ type GaAs layer (5), and the high concentration n^+ type GaAs layer (5) a first electrode (9) connected to the upper surface and the second n-type Al
A second electrode (10) connected to the constriction layer (6) portion of the GaAs layer (4) and the first n-type AlGaAs layer (
A semiconductor device characterized in that it has a third electrode (8) connected to the lower flat surface of (2). 2. First n-type AlGaAs layer (2) and second n-type A
Each lGaAs layer (4) is a P-type GaAs layer (8).
2. The semiconductor device according to claim 1, wherein the semiconductor device has a structure in which the proportion of Al in the composition ratio of Al and Ga is continuously decreased as the composition ratio of Al and Ga approaches . 3. An n-type AlGaAs layer (12) is formed on a semi-insulating GaAs substrate (11) by a chemical vapor deposition method (MOCVD method),
P-type GaAs layer (13), n-type AlGaAs layer (14)
and a step of epitaxially growing a high concentration n-type GaAs layer (15); a step of forming a silicon nitride (Si_3N_4) film (16) on the high concentration n-type GaAs layer (15); After forming the photoresist film (17), a step of leaving only a predetermined region remaining; a step of dry etching the silicon nitride film using CF_4 gas using the remaining resist as a mask; and a step of dry etching the silicon nitride film using CF_4 gas. A step of dry etching a part of the AlGaAs layer using chlorine gas to form a ridge stripe structure, and forming a lower n-type AlG layer around the ridge stripe structure.
A step of forming a P-type region (18) with a depth up to the aAs layer by ion implantation, a step of forming a silicon dioxide (SiO_2) layer (19) including the sidewall part of the ridge stripe structure, A process of dissolving the resist and removing the silicon dioxide layer on the upper surface of the ridge stripe structure by lift-off, and heat treatment to remove the P-type region (
18), and removing the silicon nitride film (16) by RIE etching while leaving the side walls of the silicon dioxide film (19), and forming the high concentration n-type GaAs layer (15). After exposing, the upper n-type AlGaAs layer (15) is formed by patterning using photoresist to form an electrode connected to the high concentration n-type GaAs layer (15), and by mesa etching.
14) The surface of the ion-implanted part and the lower n-type AlG
1. A method for manufacturing a semiconductor device, comprising: exposing a surface of an aAs layer (12) other than the ridge stripe structure, and then forming an electrode in connection with the surface.