JPS63271960A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent such erroneous operations as cross talk by a method wherein an insulating layer wherein a coverage is provided on a wiring layer containing a plurality of leads formed on an insulating substrate, and a conducting layer formed on the insulating layer and to be connected to the ground potential, are provided. CONSTITUTION:A conducting layer 15 is provided through the intermediary of an insulating layer 14 on a wiring layer 8 formed on an insulating substrate 1, and the conducting layer 15 is set at the ground potential. The conducting layer 15 is so formed as to cover all the lines 8' of the wiring layer 8, and the gaps between the lines 8' are filled up with an insulating layer of high permittivity. As the results, the coupling force is relatively weakened between the leads 8' and fluctuation in potential attributable to adjacent lines 8' may be reduced. Such erroneous operations as cross talk is reduced in a device with its wirings highly integrated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electrically stable semiconductor device suitable for higher density and higher speed.

[Conventional technology]

A conventional package structure of a semiconductor device is shown in FIG. 2, taking as an example a hermetically sealed type package sealed with glass. This hermetically sealed semiconductor device is called a pin grid array (PGA), and has come into widespread use with the development of gate arrays and micro combinators that require a large number of pins of 100 or more.

In particular, recently the number of man-hours has increased more and more, sometimes reaching hundreds of bottles, but the method to handle the large number of bottles with the 'PGA type is to apply multi-laminate ceramics to create two or more multi-layered bottles. There are two main methods: a method of forming wiring, and a method of increasing wiring density in one layer.

The PGA shown in FIG. 2 has a single wiring layer corresponding to the latter type, and has the advantage that the pin layout and the number of pins used can be adjusted simply by changing the wiring pattern.

As substrates for such PGAs, ceramics such as alumina (A40), which have a good track record of use, are the mainstream, but inexpensive substrates such as glass epoxy are also used in applications where hermetic sealing is not required. In the case of a ceramic substrate, a green sheet with through holes is formed, and each through hole is filled with tungsten or the like by screen printing.
A substrate is manufactured by a process in which three to five green sheets are laminated and simultaneously fired.

Using the laminated ceramic substrate 2 thus formed, metal pins 3 are fixed with silver solder 5 to the tungsten metallization 4 exposed from the back surface of the substrate, as shown in FIG. The pin 3 is preferably made of a high-strength, low-thermal-expansion metal, and in order to improve corrosion resistance and solderability, a nickel plating layer 6 is usually applied to the protruding part of the pin 3 from the back of the board, including the brazed part, and a gold plating layer thereon. 7 are applied sequentially. Furthermore, a wiring layer 8 is formed on the surface of the substrate in connection with the metallization 4.

The wiring layer 8 is formed by depositing aluminum or an aluminum alloy (for example, A/-1% Si) on the entire surface of the substrate, patterning it by photolithography, and etching it.

Thereafter, a semiconductor element 9 such as an IC is mounted almost in the center of the laminated ceramic substrate 2 with a silver-filled glass 10 made by firing a silver-filled glass paste, and each electrode of the semiconductor element 9 and each wiring of the wiring layer 8 is connected to an aluminum wire 11. etc. are connected. Finally, a ceramic cap 1 is placed on the laminated ceramic substrate 2.
2 is placed thereon, and the periphery thereof is hermetically sealed with a low-melting-point sealing glass 13 so as to accommodate the semiconductor element 9 and aluminum wire 11, thereby forming a PGA.

[Problem that the invention seeks to solve]

However, in conventional semiconductor devices such as PGA using this type of laminated ceramic substrate and ceramic cap,
As wiring becomes finer and more dense as LSIs and the like increase in number of I10s, problems arise in that the wiring becomes more susceptible to potential fluctuations in structural members and adjacent wiring, causing malfunctions such as cross talk.

SUMMARY OF THE INVENTION In view of the above-mentioned conventional circumstances, it is an object of the present invention to provide a semiconductor device that does not cause malfunctions such as cross talk even when the wiring density is increased.

[Means for solving problems]

The semiconductor device of the present invention includes a wiring layer made up of a plurality of wirings formed on an insulating substrate, an insulating layer formed by covering the wiring layer, and a conductor layer connected to a ground No. 1 provided on the insulating layer. It is characterized by having the following.

The insulating substrate may be a conventional glass epoxy or laminated ceramic substrate, or may be a ceramic substrate manufactured by integrally molding and sintering ceramic powder such as alumina using a powder metallurgy method.

In addition, the wiring layer may be made of a highly conductive material that enables high-density wiring, but in particular, a material with a sheet resistance of 33 mQ10 at 20C is sufficient.
The following wiring, for example aluminum with a thickness of 1 μm, is preferable because low resistance can be ensured even when it is mounted at a high density.

The insulating layer is preferably made of a material with a low dielectric constant, and particularly in the case of fine wiring, it is desirable that the dielectric constant is 12 or less, such as At with a dielectric constant of 9.3.

SiO of 14.2 or 4.5 is effective, but Fe of 14.2 is effective.
O is less effective in preventing malfunctions.

The conductor layer may be made of any conductive material, and may be formed of the same material as the wiring layer, for example. The shape of the conductor layer is preferably solid throughout the entire surface with no gaps, but it may also be in the form of a line made up of a plurality of lines like the wiring layer, or a net shape in which a plurality of lines intersect with each other. In cases where the conductive portion is not entirely solid, such as a linear or net shape, it is preferable that the area ratio of the conductive portion is 10% or more.

When the wiring layer consists of two or more layers, it is preferable to provide a conductor layer for each wiring layer with an insulating layer interposed therebetween.
It is also effective to form only one conductor layer on top or in the middle. In this case, if a conductor layer is formed on the top layer, there is no need to form through holes for wiring layers, which is convenient for manufacturing.

[Effect]

As a result of examining the causes of malfunctions such as cross talk in PGAs with fine wiring, the inventors of the present invention found that cross talk can be reduced by installing a ground potential that faces all the wiring nearby. I discovered something strange.

In other words, the causes of potential fluctuations in child wiring that cause malfunctions such as cross talk include the potential of nearby components such as caps and substrates, and the potential of adjacent wiring, but in general, The impact is huge. Therefore, we came to the conclusion that it is effective to install a ground potential near the wiring in order to cancel out these effects.

However, in conventional semiconductor devices such as PGA, there is no ground potential at all, or there is only room to install it in a very narrow range.

In the present invention, as shown in FIG. 1, a conductor layer 15 is provided on the wiring layer 8 via an insulating layer 14, and a ground potential is set on the conductor layer 15. The conductor layer 15 includes all the wiring 8 of the wiring layer 8
′ is preferably formed so as to cover it. According to the present invention, the ground potential (conductor layer 15) is placed closest to the wiring layer 8.
can be installed, and the space between the wiring lines 8' can be filled with an insulator (insulating layer 14) having a high dielectric constant. As a result, it is possible to relatively weaken compression between each wiring and reduce potential fluctuations received from adjacent wiring, thereby increasing the density of the wiring layer. It can also reduce malfunctions such as cross talk,
For similar reasons, it becomes possible to mount high-speed devices and high-output devices.

〔Example〕

As shown in FIG. 1, on the surface of an ordinary AtO insulating substrate 1 with metallization 4 formed in the through holes, an Al wiring 8' with a thickness of 3 μm is formed using a conventional method with a minimum wiring width of 100 μm and a minimum width of 100 μm. Formed with a wiring interval of 100 μm,
An insulating layer 14 of A40 having a thickness of 10 m was deposited to cover the wiring layer 8. Furthermore, the entire surface of the insulating layer 14 is coated with a thickness of 3
A conductor layer 15 is deposited on one side of the insulating substrate 1.
It was connected to two metallized 4.

After mounting a high-speed semiconductor element driven at 100 MHz at a predetermined position, each electrode of the semiconductor element and each wiring 8' of the wiring layer 8 were connected with aluminum wire as usual.

Finally, the metal cap containing the semiconductor element and aluminum wire is hermetically sealed with sealing glass as usual.
Twenty PG A pins were manufactured.

After connecting the conductor layer 15 to the ground potential, the initial operating characteristics of the 20 PGA prototypes manufactured in this manner were examined, and the failure rate was 0/20. After 100 consecutive temperature cycles (high temperature +150C and low temperature -65C), the operating characteristics were examined again, and the defective rate was still O/20.

〔Effect of the invention〕

According to the present invention, it is possible to provide a semiconductor device that has stable operating performance without malfunctions such as cross talk even when the wiring density is increased, and is extremely suitable for high-speed elements, high-output elements, multiplexed 10 elements, etc. It is valid.

[Brief explanation of drawings]

FIG. 1 is a schematic sectional view showing essential parts of a semiconductor device of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor device. 1... Insulating substrate 2... Laminated ceramic substrate 4... Metallization 8... Wiring layer 8'... Wiring 9... Semiconductor element 11... Aluminum wire 12... Cap 13...
Sealing glass 14... Insulating layer 15... Conductor layer 1 Figure 2

Claims (1)

[Claims] (1) A wiring layer consisting of a plurality of wirings formed on an insulating substrate, an insulating layer formed by covering the wiring layer, and a conductor layer provided on the insulating layer and connected to a ground potential. Characteristic semiconductor devices.