JPS63270157A - Manufacture of electrostatic latent-image forming device - Google Patents

Manufacture of electrostatic latent-image forming device

Info

Publication number
JPS63270157A
JPS63270157A JP10658387A JP10658387A JPS63270157A JP S63270157 A JPS63270157 A JP S63270157A JP 10658387 A JP10658387 A JP 10658387A JP 10658387 A JP10658387 A JP 10658387A JP S63270157 A JPS63270157 A JP S63270157A
Authority
JP
Japan
Prior art keywords
layer
image forming
electrostatic latent
common electrode
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10658387A
Other languages
Japanese (ja)
Other versions
JPH0712706B2 (en
Inventor
Yuji Suemitsu
末光 裕治
Koji Masuda
増田 晃二
Kazuo Asano
和夫 浅野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP62106583A priority Critical patent/JPH0712706B2/en
Publication of JPS63270157A publication Critical patent/JPS63270157A/en
Publication of JPH0712706B2 publication Critical patent/JPH0712706B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/385Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective supply of electric current or selective application of magnetism to a printing or impression-transfer material
    • B41J2/39Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective supply of electric current or selective application of magnetism to a printing or impression-transfer material using multi-stylus heads
    • B41J2/395Structure of multi-stylus heads

Landscapes

  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

PURPOSE:To eliminate the need for high-accuracy registering of electrodes with opening parts and securely provide the opening parts, by providing a group of independent electrodes on a substrate, coating the electrode group and the substrate with an insulator layer, then providing a common electrode layer on the insulator layer, and providing the opening parts. CONSTITUTION:An electrode layer 2 is provided on a substrate 1, a resist layer is provided by coating, then exposure to light is performed by using a photo- mask having a desired pattern, and the resist layer at exposed parts is removed. Independent electrodes 2a, 2b... are formed by etching, and an insulator layer 3 is provided. A common electrode layer 4 is provided on the insulator layer 3, a resist layer is provided on the layer 4 thereon by coating, exposure to light is performed by using a mask, unrequired parts of the resist material are removed, and then etching is conducted to perforate the common electrode layer 4 and the insulator layer 3, thereby providing openings 5. In the etching step, etching of the common electrode layer 4 and etching of the insulator layer 3 are preferably performed separately by using different etching liquids.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、イオン流を変調し誘電体上に静TlWI像を
形成する静電潜像形成装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing an electrostatic latent image forming device that modulates ion flow to form an electrostatic TlWI image on a dielectric material.

〔従来の技術〕[Conventional technology]

一般に、イオン流を用いた静電記録の原理を第8図によ
り説明すると、静電記録ヘッド11において発生したイ
オンは、回転ドラム12面の記録媒体上に静電潜像13
を形成し、該静電潜像13には現像器14によりトナー
等の現像剤を付着させてトナー像15を形成し、転写部
16においてトナー像15が記録用紙17に転写される
ことにより静電記録が行われる。そして、記録媒体は除
電部18において除電された後、残った現像剤をトナー
除去部19で除去し、次回の記録に備えている。
In general, the principle of electrostatic recording using an ion flow is explained with reference to FIG.
A developing agent such as toner is applied to the electrostatic latent image 13 by a developing device 14 to form a toner image 15, and the toner image 15 is transferred to the recording paper 17 in the transfer section 16, thereby forming an electrostatic latent image. Electronic records are made. After the recording medium is neutralized by the static eliminating section 18, the remaining developer is removed by the toner removing section 19 in preparation for the next recording.

従来、上記静電潜像形成装置におけるイオン流発生方式
としては、ピン状電極を一列に並べ誘電体と接触させ、
誘電体との間で直接放電を起こさせる直接静電記録方式
が知られているが、電極と誘電体間のギャップを高精度
に維持しなければならず、また、放電を安定させること
ができないとか、電極が磨耗するとかの欠点があった。
Conventionally, the ion flow generation method in the electrostatic latent image forming apparatus described above involves arranging pin-shaped electrodes in a row and bringing them into contact with a dielectric material.
A direct electrostatic recording method is known in which a discharge is caused directly between the electrode and the dielectric, but the gap between the electrode and the dielectric must be maintained with high precision, and the discharge cannot be stabilized. However, there were drawbacks such as electrode wear.

上記欠点を除去するために、種々の間接静電記録方式が
知られている0例えば、第9図は特開昭57−1018
63号公報に提案されている方式であり、コロナイオン
発生器11はシールド20内にコロナワイヤ21を内蔵
しており、該イオン発生器11の下部には、絶縁層23
を挟んで共通電極22aと制御電極22bが設けられ、
イオン発生器llにおいて発生したイオンを、共通電極
22aと制御電極22bとの間の電界強度に応じて、イ
オン通過孔24から導出し誘電体25を帯電させるもの
である。
In order to eliminate the above drawbacks, various indirect electrostatic recording methods are known. For example, FIG.
This is a method proposed in Japanese Patent No. 63, in which the corona ion generator 11 has a corona wire 21 built into the shield 20, and an insulating layer 23 is provided at the bottom of the ion generator 11.
A common electrode 22a and a control electrode 22b are provided on both sides,
Ions generated in the ion generator 11 are led out from the ion passage hole 24 to charge the dielectric 25 according to the electric field strength between the common electrode 22a and the control electrode 22b.

また、第10図は特開昭58−132571号公報に提
案されている方式であり、絶縁性基板26の一面に放電
電極27a、27bを対向して配列させると共に、絶縁
性基板26の他面には加速用電極28を設け、放電電極
27a、27b間に極性の異なる電圧パルスを印加する
ことにより、放電を起こさせて正、負のイオンを発生さ
せ、加速用電極28への電圧パルスに応じてイオンを導
出し、誘電体25を正または負のイオンで帯電させるも
のである。
Further, FIG. 10 shows a method proposed in Japanese Patent Application Laid-Open No. 58-132571, in which discharge electrodes 27a and 27b are arranged facing each other on one surface of an insulating substrate 26, and the other surface of the insulating substrate 26 is is provided with an accelerating electrode 28, and by applying voltage pulses with different polarities between the discharge electrodes 27a and 27b, a discharge is caused to generate positive and negative ions, and the voltage pulse to the accelerating electrode 28 Accordingly, ions are extracted and the dielectric body 25 is charged with positive or negative ions.

また、第11図は米国特許第4,160.257号に提
案されている方式であり、誘電体30を挟んで駆動電極
31と制御電極32が形成され、さらに、絶縁層33を
介して共通電極34が形成されている。駆動電極31と
制御電極32は互いに方向が異なるようにマトリックス
状に配設され、絶縁層33および共通電極34には、該
マトリックスに対応して複数の開口35および36が形
成される。そして、複数の駆動電極31と制御電極32
間に選択的に交流電圧を印加することにより、マトリッ
クスの選択された部分に対応する制御電極32近傍に正
、負のイオンが発生し、制御電極32と共通電極34間
のバイアス電圧の極性に応じた正または負のイオンが、
開口35および36より導出されて静電記録が行われる
FIG. 11 shows a method proposed in U.S. Pat. No. 4,160.257, in which a drive electrode 31 and a control electrode 32 are formed with a dielectric 30 in between, and a common An electrode 34 is formed. The drive electrode 31 and the control electrode 32 are arranged in a matrix so that their directions are different from each other, and a plurality of openings 35 and 36 are formed in the insulating layer 33 and the common electrode 34 in correspondence with the matrix. Then, a plurality of drive electrodes 31 and control electrodes 32
By selectively applying an AC voltage between them, positive and negative ions are generated near the control electrode 32 corresponding to the selected portion of the matrix, and the polarity of the bias voltage between the control electrode 32 and the common electrode 34 is changed. Depending on the positive or negative ions,
Electrostatic recording is carried out through the openings 35 and 36.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、前述した第9図で示したワイヤにより放
電させる方式においては、コロナ放電により発生したイ
オンが開口域まで遠いために、シールド20に殆ど吸収
されてしまい、アパーチャ電極22a、22bを通過す
るイオン流が少なく、イオンの利用効率が悪いという問
題を有している。
However, in the wire discharge method shown in FIG. 9, the ions generated by corona discharge are far from the aperture area, so most of them are absorbed by the shield 20, and the ions passing through the aperture electrodes 22a and 22b The problem is that the flow is low and the ion utilization efficiency is poor.

また、第10図で示した電極により放電させる方式にお
いては、電極が露出しているためリークし易いと共に、
電極同士の直接放電であるために電極がダメージを受は
易く、また、電極数が多く高密度化或いは配線が困難で
あるという問題を有している。
In addition, in the method of discharging using electrodes shown in FIG. 10, since the electrodes are exposed, leakage is likely to occur, and
Since the electrodes are directly discharged from each other, the electrodes are easily damaged, and there are also problems in that the large number of electrodes makes it difficult to increase density or wire them.

また、第11図における例においては、比較的前述した
問題は少ないが、マトリックス駆動が不可欠であるため
、1ライン上に潜像を形成する場合にデータの並び変え
や位置合わせが必要であり、また、高速化が困難であり
、その結果、複雑な制御回路を必要とし装置が大型化す
るという問題を有している。
In addition, in the example shown in FIG. 11, although there are relatively few problems mentioned above, matrix driving is essential, so when forming a latent image on one line, it is necessary to rearrange and align the data. Further, it is difficult to increase the speed, and as a result, there is a problem that a complicated control circuit is required and the device becomes large.

本出願人は、上記した問題を解決するために、基体上に
互いに独立して配列された電極群と、該電極群と絶縁層
を挟んで対向させた共通電極とを有し、該共通電極と絶
縁層とに開口部を存する静電潜像形成装置を別途出願し
ており、これにより、イオンの利用効率が高く、安定し
た放電が可能であり、高速化および高密度化を可能にし
ている。
In order to solve the above-mentioned problems, the present applicant has a group of electrodes arranged independently of each other on a substrate, a common electrode facing the electrode group with an insulating layer in between, and the common electrode A separate application has been filed for an electrostatic latent image forming device that has openings in the and insulating layer, which enables high ion utilization efficiency, stable discharge, and enables higher speed and higher density. There is.

しかしながら、該静電潜像形成装置においては、開口部
と放電領域および独立電極の位置精度に高精度が要求さ
れると共に、開口を予め形成した共通電極や絶縁層を貼
り合わせて作る場合にも高精度の位置合わせが要求され
、また、貼り合わせの際に接着剤がはみだして開口を塞
ぐ恐れがあるという問題を生じている。
However, in this electrostatic latent image forming device, high precision is required for the positional accuracy of the opening, the discharge area, and the independent electrode, and also when the opening is formed by bonding a common electrode or an insulating layer with which the opening is formed in advance. High-precision positioning is required, and there is also a problem in that the adhesive may spill out and block the opening during bonding.

本発明はこの問題を解決するものであって、電極と開口
部との高精度の位置合わせが不買であり、かつ、確実に
開口部を形成することができる静電潜像形成装置の製造
方法を提供することを目的とする。
The present invention solves this problem, and is a method for manufacturing an electrostatic latent image forming device that allows highly accurate positioning of electrodes and openings, and that can reliably form openings. The purpose is to provide

〔問題点を解決するための手段〕[Means for solving problems]

そのために本発明の静電潜像形成装置の製造方法は、基
体上に互いに独立して配列された電極群と、該電極群と
絶縁層を挟んで対向させた共通電極とを有すると共に、
該共通電極と絶縁層に開口部を有する静電潜像形成装置
において、基体上に独立した電極群を形成し、該電極群
と基体上を絶縁層で被覆した後、該絶縁層上に共通電極
層を形成し、しかる後に穿孔工程を行って前記開口部を
形成することを特徴とするものである。
To this end, the method for manufacturing an electrostatic latent image forming device of the present invention includes a group of electrodes arranged independently of each other on a substrate, a common electrode facing the group of electrodes with an insulating layer in between, and
In an electrostatic latent image forming device having an opening in the common electrode and an insulating layer, an independent electrode group is formed on a substrate, the electrode group and the substrate are covered with an insulating layer, and then a common electrode is formed on the insulating layer. The method is characterized in that an electrode layer is formed and then a perforation step is performed to form the opening.

〔作用〕[Effect]

本発明においては、例えば第5図に示すように、先ず、
(a)図に示すように、基体1上に電極層2を形成し、
次にレジスト層を塗布しくb)、所望のパターンのフォ
トマスクにより露光しくC)た後、露光部分のレジスト
層を除去しくd) 、L。
In the present invention, for example, as shown in FIG.
(a) As shown in the figure, an electrode layer 2 is formed on a substrate 1,
Next, a resist layer is applied (b), exposed to light using a photomask with a desired pattern (C), and the exposed portions of the resist layer are removed (d).

かる後にエツチングを行い独立した電極2a、2b、・
・・を形成しくe)、次いで、絶縁層3を形成しC「)
、次に、絶縁層3上に共通電極層4を形成しくg)、さ
らに、この上にレジスト層を塗布しくh)、マスクによ
り露光を行い(i)、不要なレジスト材を除去しくj)
 、Lかる後、エツチング工程を行って共通電極層4お
よび絶縁層3に穿孔を行い開口5を形成しくk)、最後
にレジスト材を除去して静電潜像形成装置を得るもので
ある。
After that, etching is performed to form independent electrodes 2a, 2b, .
. . . e), then an insulating layer 3 is formed.
Next, a common electrode layer 4 is formed on the insulating layer 3 (g), and a resist layer is applied thereon (h), and exposure is performed using a mask (i) to remove unnecessary resist material (j).
, L, an etching step is performed to form holes in the common electrode layer 4 and the insulating layer 3 to form openings 5 (k), and finally the resist material is removed to obtain an electrostatic latent image forming device.

〔実施例〕〔Example〕

以下本発明の実施例を図面を参照しつつ説明する。第1
図は本発明が適用される静電潜像形成装置の1実施例を
示す断面図、第2図は第1図における電極部の斜視図、
第3図および第4図は本発明が適用される静電潜像形成
装置の他の実施例を示す断面図、第5図は本発明の静電
潜像形成装置の製造方法の1実施例を説明するための図
、第6図および第7図は本発明の静電潜像形成装置の製
造方法の他の実施例を説明するための図である。
Embodiments of the present invention will be described below with reference to the drawings. 1st
The figure is a cross-sectional view showing one embodiment of an electrostatic latent image forming device to which the present invention is applied, FIG. 2 is a perspective view of the electrode section in FIG. 1,
3 and 4 are cross-sectional views showing other embodiments of the electrostatic latent image forming device to which the present invention is applied, and FIG. 5 is an embodiment of the method for manufacturing the electrostatic latent image forming device of the present invention. FIGS. 6 and 7 are diagrams for explaining other embodiments of the method for manufacturing an electrostatic latent image forming apparatus according to the present invention.

図中、1は基体、2は電極層、2a〜2dは電極、3は
絶縁層、4は共通電極、5は開口、6は基層、7は誘電
体層、8.9は直流電源、10は交流電源を示す。
In the figure, 1 is a base, 2 is an electrode layer, 2a to 2d are electrodes, 3 is an insulating layer, 4 is a common electrode, 5 is an opening, 6 is a base layer, 7 is a dielectric layer, 8.9 is a DC power supply, 10 indicates AC power supply.

第1図において、基体1上には互いに独立した電極28
%2b、2C12d、・・・が並列に配列されており、
該電極2a〜2dの各々には絶縁113が被覆されると
共に、該絶縁N3上には共通電極4が配置され、また、
共通電極4には各電極2a〜2d間に対向して開口5が
形成されている。また、基層6上には誘電体層7が形成
され、該誘電体層7が前記共通電極4に対向して配置さ
れると共に、前記基N6は接地されている。一方、共通
電極4には直流電源8によりバイアス電圧が印加される
と共に、例えば、電極2aには直流電源9により直流電
圧が印加され、電極2bには直流電圧が車乗された交流
電圧が交流電源10により印加されている。
In FIG. 1, mutually independent electrodes 28 are provided on the base 1.
%2b, 2C12d,... are arranged in parallel,
Each of the electrodes 2a to 2d is coated with an insulation 113, and a common electrode 4 is arranged on the insulation N3, and
Openings 5 are formed in the common electrode 4 to face each other between the electrodes 2a to 2d. Further, a dielectric layer 7 is formed on the base layer 6, and the dielectric layer 7 is disposed facing the common electrode 4, and the base N6 is grounded. On the other hand, a bias voltage is applied to the common electrode 4 by a DC power supply 8, and for example, a DC voltage is applied to the electrode 2a by a DC power supply 9, and an AC voltage to which the DC voltage is applied is applied to the electrode 2b. The voltage is applied by a power source 10.

第3図は静電潜像形成装置の他の例を示している。(a
)図は、隣接する電極2a〜2dのうち、1つおきに電
極を絶縁層3で被覆し、他の電極は隣接する電極に対向
する部分の絶縁層を省略している。(b)図は、隣接す
る電極2a〜2dの片側のみに絶縁層を被覆し、他側は
電極を露出させている。いずれにしても、隣接する電極
の1組の内の少なくとも片方が絶縁被覆されていればよ
い。
FIG. 3 shows another example of the electrostatic latent image forming device. (a
) In the figure, every other electrode among the adjacent electrodes 2a to 2d is covered with an insulating layer 3, and the insulating layer of the other electrodes is omitted in the portion facing the adjacent electrode. In the figure (b), only one side of adjacent electrodes 2a to 2d is coated with an insulating layer, and the other side is exposed. In any case, it is sufficient that at least one of a pair of adjacent electrodes is coated with an insulating coating.

第4図はさらに他の例を示し、電極2bの近傍部分を耐
イオン性、耐オゾン性の優れた絶縁N3aで被覆し、共
通電極4との間は通常の絶縁N3bとしている。すなわ
ち、絶縁層としての機能を分けて用いることにより、製
造コストを低減させることができる。
FIG. 4 shows still another example, in which the vicinity of the electrode 2b is covered with insulation N3a having excellent ion resistance and ozone resistance, and the part between it and the common electrode 4 is covered with ordinary insulation N3b. That is, by using the function as an insulating layer separately, manufacturing costs can be reduced.

上記構成からなる静電潜像形成装置の動作について説明
すると、第1図の電圧印加状態においては、電極2aと
電極2bとの間の放電領域Aにおいては、交番電界が形
成されエアブレークダウンあるいは沿面放電が発生し、
イオンが生成される。
To explain the operation of the electrostatic latent image forming apparatus having the above configuration, in the voltage application state shown in FIG. Creeping discharge occurs,
ions are generated.

該生成イオンは、共通電極4と独立した電極2a、2b
間に形成された電界により、放電領域Aから出て共通電
極4の開口5より外へ導出され、導出されたイオンは、
共通電極4と誘電体N7および基層6との間に形成され
た電界によって加速され、誘電体N7表面に到達し静電
潜像を形成する。
The generated ions are generated by the common electrode 4 and independent electrodes 2a and 2b.
Due to the electric field formed between them, the ions exit from the discharge region A and are led out through the opening 5 of the common electrode 4.
It is accelerated by the electric field formed between the common electrode 4, the dielectric N7, and the base layer 6, and reaches the surface of the dielectric N7 to form an electrostatic latent image.

上述した静電潜像形成装置によれば、絶縁層を介して電
極間で放電させるため、イオンの利用効率が良いと共に
、電極間同士のリーク等異常放電が防止され、安定した
放電を得ることができる。
According to the electrostatic latent image forming device described above, since the discharge is caused between the electrodes via the insulating layer, the ion utilization efficiency is high, and abnormal discharge such as leakage between the electrodes is prevented, and stable discharge can be obtained. Can be done.

また、印字にマトリックスを組む必要がなく、1ライン
一括印字ができプリント速度を高速化することができる
。また、電極群を並列に配置させるため、製造が簡単で
あり、電極数も少なく配線が容易であり、また、高密度
化が可能となる。さらに、直接静電記録方式と比較して
、電極と誘電体間の狭いギャップ維持が不要となり、電
極の磨耗も少ない。
Furthermore, there is no need to assemble a matrix for printing, and one line can be printed all at once, increasing the printing speed. Furthermore, since the electrode groups are arranged in parallel, manufacturing is simple, the number of electrodes is small, wiring is easy, and high density is possible. Furthermore, compared to direct electrostatic recording, there is no need to maintain a narrow gap between the electrode and the dielectric, and there is less wear on the electrode.

次に、上記静電潜像形成装置の製造方法を第5図により
説明すると、先ず、(a)図に示すように、基体1上に
電極層2を形成する。これは導電体箔を貼り合わせても
よいし、スクリーン印刷、蒸着、スパッタ等の方法によ
ってもよい0次にレジスト層を塗布しくb)、所望のパ
ターンのフォトマスクにより露光しくC)た後、露光部
分のレジスト層を除去する(d)。この例においてはポ
ジ型の例を示しているが、ネガ型であってもよい。
Next, a method of manufacturing the electrostatic latent image forming device will be explained with reference to FIG. 5. First, as shown in FIG. 5(a), an electrode layer 2 is formed on a substrate 1. This may be done by pasting conductive foil together, or by a method such as screen printing, vapor deposition, or sputtering. After applying a resist layer b) and exposing it to light using a photomask with a desired pattern, The resist layer in exposed areas is removed (d). In this example, a positive type is shown, but a negative type may be used.

しかる後にエツチングを行い独立した電極2a、2b、
・・パを形成しくe)、次いで、絶縁層3を形成する(
f)、これは、スクリーン印刷、蒸着、スパック等形成
方法は特に問わないが、アルミナ、無機材料等の放電に
耐えられる材料を選択して形成する0次に、絶縁層3上
に共通電極層4を前述した方法と同様にして形成しくg
)、さらに、この上にレジスト層を塗布しくh)、マス
クにより露光を行い(i)、不要なレジスト材を除去す
る(j)。しかる後、エツチング工程を行って共通電極
N4および絶縁層3に穿孔を行い開口5を形成する(k
)、このエツチング工程においては、共通電極層4のエ
ツチングと絶縁層3のエツチングは、エツチング液を変
えて別々に行った方が望ましい、最後にレジスト材を除
去して静電潜像形成装置を得るものである。
After that, etching is performed to form independent electrodes 2a, 2b,
... form a layer e), then form an insulating layer 3 (
f) This method is not limited to screen printing, vapor deposition, spuck, etc., but it is formed by selecting a material that can withstand discharge, such as alumina or an inorganic material. Next, a common electrode layer is formed on the insulating layer 3. 4 in the same manner as described above.
), a resist layer is further applied thereon (h), exposure is performed using a mask (i), and unnecessary resist material is removed (j). Thereafter, an etching process is performed to perforate the common electrode N4 and the insulating layer 3 to form an opening 5 (k
), In this etching step, it is preferable to perform etching of the common electrode layer 4 and etching of the insulating layer 3 separately by changing the etching solution.Finally, the resist material is removed and the electrostatic latent image forming device is removed. It's something you get.

第6図は本発明の他の実施れいを示し、第5図の(j)
の工程までは同じであり、その後、共通電8i4のみを
エツチングしくa)、次にその共通電極4をレジスト化
わりに利用して絶縁N3をエツチングして開口部5を形
成する(b)。
FIG. 6 shows another embodiment of the present invention, and (j) of FIG.
The steps up to are the same, and then only the common electrode 8i4 is etched (a), and then the common electrode 4 is used as a resist to etch the insulation N3 to form the opening 5 (b).

次に、第7図により本発明の他の実施例を説明すると、
第5図の(a)〜(g)の工程により、基体1上に電極
2a、2b、絶縁層3および共通電極4を形成(a)し
た後、レーザー光により所望の開口5を穿孔しくb)、
(C)図に示すような静電潜像形成装置を得る。
Next, another embodiment of the present invention will be explained with reference to FIG.
After forming the electrodes 2a, 2b, the insulating layer 3, and the common electrode 4 on the substrate 1 (a) through the steps (a) to (g) in FIG. 5, a desired opening 5 is formed using a laser beam. ),
(C) An electrostatic latent image forming device as shown in the figure is obtained.

なお、上記製造方法においては、電極2a12bの両側
が絶縁被覆されている静電潜像形成装置を製造している
が、第3図で示したような電極の絶縁被覆を形成するよ
うにしてもよい、また、第4図で示した静電潜像形成装
置も同様の製造方法により製造できる。
In the above manufacturing method, an electrostatic latent image forming device is manufactured in which both sides of the electrode 2a12b are coated with insulation, but even if the electrode is coated with insulation as shown in FIG. Furthermore, the electrostatic latent image forming device shown in FIG. 4 can also be manufactured by a similar manufacturing method.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、基体上に独立した
電極群を形成し、該電極群と基体上を絶縁層で被覆した
後、該絶縁層上に共通電極層を形成し、しかる後に共通
電極と絶縁層の開口部をほぼ同時に穿孔するため、電極
と開口部との位置合わせが高精度できるようになり、か
つ、接着材のはみ出しによる開口部の塞ぎがないため、
確実に開口部を形成することができるものである。
As explained above, according to the present invention, an independent electrode group is formed on a substrate, the electrode group and the substrate are covered with an insulating layer, and then a common electrode layer is formed on the insulating layer. Since the openings in the common electrode and the insulating layer are drilled almost simultaneously, the electrodes and openings can be aligned with high precision, and the openings are not blocked by adhesive material extruding.
It is possible to form an opening reliably.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明が適用される静電潜像形成装置の1実施
例を示す断面図、第2図は第1図における電極部の斜視
図、第3図および第4図は本発明が適用される静電潜像
形成装置の他の実施例を示す断面図、第5図は本発明の
静電潜像形成装置の製造方法の1実施例を説明するため
の図、第6図および第7図は本発明の静電潜像形成装置
の製造方法の他の実施例を説明するための図、第8図は
静電潜像形成装置の原理を説明するための図、第9図、
第10図および第11図は従来の静電潜像形成装置を説
明するための図である。 ■・・・基体、2・・・電極層、2a〜2d・・・電極
、3・・・絶縁層、4・・・共通電極、5・・・開口、
6・・・基層、7・・・誘電体層、8.9・・・直流電
源、10・・・交流電源。 第1図 A 第2図 第3図 第4図 第 5 図 (イ) ((L) ω) 第5図(ロ) (’l) (代) (しン 弓 第7図 (α) 第8図 第9図 第10図 (山)
FIG. 1 is a sectional view showing one embodiment of an electrostatic latent image forming apparatus to which the present invention is applied, FIG. 2 is a perspective view of the electrode section in FIG. 1, and FIGS. FIG. 5 is a sectional view showing another embodiment of the electrostatic latent image forming device to which the device is applied, and FIG. FIG. 7 is a diagram for explaining another embodiment of the method for manufacturing an electrostatic latent image forming device of the present invention, FIG. 8 is a diagram for explaining the principle of the electrostatic latent image forming device, and FIG. 9 is a diagram for explaining the principle of the electrostatic latent image forming device. ,
FIGS. 10 and 11 are diagrams for explaining a conventional electrostatic latent image forming apparatus. ■... Base, 2... Electrode layer, 2a to 2d... Electrode, 3... Insulating layer, 4... Common electrode, 5... Opening,
6... Base layer, 7... Dielectric layer, 8.9... DC power supply, 10... AC power supply. Figure 1 A Figure 2 Figure 3 Figure 4 Figure 5 (A) ((L) ω) Figure 5 (B) ('l) (S) (Shin bow Figure 7 (α) Figure 8 Figure 9 Figure 10 (Mountain)

Claims (4)

【特許請求の範囲】[Claims] (1)基体上に互いに独立して配列された電極群と、該
電極群と絶縁層を挟んで対向させた共通電極とを有する
と共に、該共通電極と絶縁層に開口部を有する静電潜像
形成装置において、基体上に独立した電極群を形成し、
該電極群と基体上を絶縁層で被覆した後、該絶縁層上に
共通電極層を形成し、しかる後に穿孔工程を行って前記
開口部を形成することを特徴とする静電潜像形成装置の
製造方法。
(1) An electrostatic potential having a group of electrodes arranged independently of each other on a substrate, a common electrode facing the electrode group with an insulating layer in between, and having an opening in the common electrode and the insulating layer. In an image forming apparatus, forming an independent electrode group on a substrate,
An electrostatic latent image forming device characterized in that after covering the electrode group and the base with an insulating layer, a common electrode layer is formed on the insulating layer, and then a perforation step is performed to form the opening. manufacturing method.
(2)上記独立した電極群はエッチングにより形成する
ことを特徴とする特許請求の範囲第1項記載の静電潜像
形成装置の製造方法。
(2) The method for manufacturing an electrostatic latent image forming apparatus according to claim 1, wherein the independent electrode group is formed by etching.
(3)上記穿孔工程はエッチングにより穿孔することを
特徴とする特許請求の範囲第1項または第2項記載の静
電潜像形成装置の製造方法。
(3) The method for manufacturing an electrostatic latent image forming device according to claim 1 or 2, wherein the hole is formed by etching in the hole forming step.
(4)上記穿孔工程はレーザー光により穿孔することを
特徴とする特許請求の範囲第1項または第2項記載の静
電潜像形成装置の製造方法。
(4) The method for manufacturing an electrostatic latent image forming device according to claim 1 or 2, wherein the perforation step is performed by using laser light.
JP62106583A 1987-04-30 1987-04-30 Method for manufacturing electrostatic latent image forming apparatus Expired - Lifetime JPH0712706B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62106583A JPH0712706B2 (en) 1987-04-30 1987-04-30 Method for manufacturing electrostatic latent image forming apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62106583A JPH0712706B2 (en) 1987-04-30 1987-04-30 Method for manufacturing electrostatic latent image forming apparatus

Publications (2)

Publication Number Publication Date
JPS63270157A true JPS63270157A (en) 1988-11-08
JPH0712706B2 JPH0712706B2 (en) 1995-02-15

Family

ID=14437230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62106583A Expired - Lifetime JPH0712706B2 (en) 1987-04-30 1987-04-30 Method for manufacturing electrostatic latent image forming apparatus

Country Status (1)

Country Link
JP (1) JPH0712706B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56142551A (en) * 1980-04-09 1981-11-06 Konishiroku Photo Ind Co Ltd Production of ion modulating electrode
JPS60196363A (en) * 1984-03-19 1985-10-04 Canon Inc Ion generator and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56142551A (en) * 1980-04-09 1981-11-06 Konishiroku Photo Ind Co Ltd Production of ion modulating electrode
JPS60196363A (en) * 1984-03-19 1985-10-04 Canon Inc Ion generator and manufacture thereof

Also Published As

Publication number Publication date
JPH0712706B2 (en) 1995-02-15

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