JPS63267929A - Interval photographing device - Google Patents

Abstract

PURPOSE:To make the display of a timer easy to be understood and easy to be operated by displaying only hour unit and minute unit on an external display part at the time of setting the timer and displaying a second unit besides the hour unit and the minute unit when the timer starts and begins counting. CONSTITUTION:In case of switching on an interval timer mode switch 25, the display part 38 shifts to an interval timer mode in spite of the state of displaying a previous data filming mode and displays the time since the release is pushed until a release signal is outputted with hours and minutes. When the interval timer mode switch 25 is switched on again keeping this state, the display adds the display with second unit so as to begin actions as a subtraction timer if a camera main body 46 and a main switch 53 are ON. Thus, switching operation at the time of setting the time of a timer can be easily understood and the state of actions can be distinctly grasped because the second unit, for example, execute subtracting actions while the timer is working.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an operation display of an interval photographing device such as a camera.

<Prior Art> Conventional interval timers used in interval photographing devices such as cameras are settable in units of hours, minutes, and seconds.

<Problems to be solved by the invention> However, in actual use of the interval imaging device,
There are few situations where you have to set it in units of seconds,
Another drawback is that input operations such as switches are complicated in order to set the settings.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the prior art described above and to provide an interval photographing device in which the timer display is easy to understand and easy to operate.

Means to solve problems〉 A detailed description of the present invention is provided to achieve the foregoing objectives.

The present invention is an interval photographing device that performs a shirt release operation using a release signal output from an interval timer circuit at predetermined intervals, and when the timer is set, only the hour digits and analysis are displayed on the external display, and the timer starts and counts. When started, the second digit is displayed in addition to the hour and minute digits.

<Function> The timer time for interval timer shooting is set in hours and minutes, and the second digit is displayed only when the timer starts, making it easy to understand the switch operation when setting the timer time, and while the timer is operating. Since the seconds are subtracted, for example, the operating state can be clearly grasped.

<Embodiment> The system of the embodiment of the present invention will be described below with reference to FIGS. 1 to 18.
This will be explained based on the diagram.

First, FIG. 3 is a block diagram showing the circuit configuration of a data imprinting device with an interval timer function.

In the figure, the part to the right of the broken line is the control circuit inside the camera body. 1 is a microcomputer central processing unit (hereinafter referred to as CPU) that sequentially controls the overall operation of this system, changes the watch and calendar, and controls the timer; 3 is a CPU when the camera battery 2 is inserted; In the PLJC circuit that generates the power-up clear signal, when this signal is input to the reset (RE) terminal of CPU1, the CPU
U1 is reset. 4 is the reference clock pulse (CL
This is an oscillator that generates the signal K), which is input to the CLK input terminal of the CPU 1 and at the same time synchronizes the entire circuit operation of this system. 5 is a frequency dividing circuit which divides the frequency of the CLK pulse, creates a 32H2 pulse in this embodiment, and outputs the 32H2 pulse of the CPUI.
It is input to the ziNT terminal. A TRi timer 6 counts the lighting time of the data imprinting lamp 14, and when the count reaches 0, it inputs the TR1NT interrupt signal of the CPU 1. 7 is the RO that stores the program contents
M and 8 are RAMs for inputting and outputting data.

10 is a monitor LCD, 11 is a data imprinting LCD, both of which are attached to the back cover 45 of the camera as shown in FIG.
) terminal, common (COM> terminal, REC terminal, PIM terminal) Based on the signals from the terminal, the data imprinting contents, the operation status of the interval timer, the imprinting accuracy m (REC) mark 37, and the photographing information (PIM) mark 36 are displayed. etc.

Next, the data imprinting circuit
The base of the transistor 12 and the emitter of the transistor 13 for driving the data transfer lamp are connected through a buffer 15 connected to the i terminal (TRi), respectively, and the collector of the transistor 12 is connected to the positive electrode of the battery A, and the emitter of the transistor 12 is connected to the positive electrode of the battery A. are respectively connected to one terminal of the imprint lamp 14, and the transistor 13 is connected to one terminal of the imprint lamp 14.
In order to drive the lamp 1 with a constant voltage, its base is connected to the output terminal of the constant voltage circuit 16, and its collector and the lamp 1
The other terminal of 4 is grounded.

Further, an N-channel MOS transistor 18 is connected to the iNT terminal of the I10 boat 17, and this MOS
When the transistor 18 turns on, the camera body 48
A low level can be given to the 5ELF terminal of the camera sequence control circuit 52 in the same way as when the side self-timer switch 50 is turned on, and the 5ELF terminal is MOS t.
- When the transistor 18 and the self-timer switch 50 are off, they are pulled up by the pull-up resistor 51 and given a high level.

One is a serial interface circuit into which various information from the camera body 48 is input, and its chip select (C
8) @i child, serial clock (SCK) terminal,
7/l/7''-input power (SD I) terminals are respectively connected to the camera sequence control circuit 52, while the 5iOiNT terminal of CPIJl is connected to generate an interrupt of the CPU i when a serial code is input. is also connected.

Furthermore, the terminal So of the I10 boat 17.

Sl, 82, 33.3a, S5 are data imprint mode changeover switches 20. Imprint data and interval timer time correction switches 21, 22, 23, elapsed time imprint mode selection switch 24, and interval timer mode switch 25 are connected to pull-up resistors 26, 27, 28, 29, and 30, 31, respectively. Each is connected and pulled up.

Then, the CPU 1, TRi timer 6, ROM 7,
The RAM 8, I10 port 17 and serial interface 19 each have an address bus 32. They are connected by a data bus 33 for transmitting and receiving data and a control bus 34 for controlling their timing.

Note that 53 is a main switch of the camera body, which is pulled up by a pull-up resistor 54 when it is off, and is connected to the main switch (MS) of the camera sequence control circuit 52.
W) is connected to the terminal.

Next, FIG. 1 is a rear view of the camera, and FIG. 2 is a sectional view of its main parts.

Reference numeral 45 denotes a back cover, on which the monitor LCD 10 is arranged so as to be visible from the back side, and the switches 20 to
25 is operable.

This monitor LCD 10 has a film counter display section 35. A photographing status display mark 36 on the camera body, a data imprinting confirmation mark 37, and a display section 38 for checking imprinted data selected by the switches 20 to 25 are provided.

Further, the data imprinting LCD 11 connected in parallel to the monitor LCD 10 is disposed on the inner surface of the back cover 45, and the display data on the data imprinting LCD 11 is displayed by the imprinting lamp 14. Camera body 46
It is designed to be imprinted on the F side of the film on the side.

The operation of this embodiment with the above configuration will be explained.

First, the display section 38 for confirming imprint data is displayed.

An outline of the interval timer mode and elapsed time imprint mode will be explained.

First, regarding the display on the display section 38 for checking imprinted data, each time the data imprinting mode changeover switch 20 is turned on, the display section 38 displays the data of the calendar contents as "Year/Month/Day" or "Month/Day/Year". ``Day/Month/Year''``Day/Hour/Minute'' and ``Information imprinting mode for the number of film shots'' (hereinafter referred to as FC mode) are sequentially switched and displayed. This display section 38 has a segment arrangement that can display the abbreviation of the English month name, and when the switch 20 is turned on, the month is displayed numerically (6th
In addition to the display in English (Fig. 5), you can also selectively display the English text (Fig. 5).

In addition, the display shows "Year/Month/Day""Month/Day/Year" [Day/
When displaying calendar information such as month/year and day/hour/minute, each display is changed to the imprint data correction switch 21.
．． Increment by turning on 22 and 23.

Next, regarding the interval timer mode, when the interval timer mode switch 25 is turned on, the display section 3
8, regardless of the display state of the previous data imprinting mode, the mode shifts to the interval timer mode, and the time Ti from when the release button is pressed until the release signal is output is displayed in hours and minutes (FIG. 9). This display is corrected by switch 22.2.
3T-Can be corrected.

In this state, the interval timer mode switch 25
When turned on, if the main switch 53 of the camera body 46 is turned on, the display adds a display in seconds as shown in FIG. 10 and starts operating as a subtraction timer. however,
When the main switch 53 of the camera body 46 is off, the display section 38 returns to the display form before entering the interval timer mode, and no countdown is performed. The display section 38, which is operating as a subtraction timer, returns to the display form before entering the interval timer mode (Figs. 5 to 7) 10 seconds before the release, and the circuit of the display section 38 is connected to the camera body 46. Sends a self-timer activation signal.

When the release signal is input to the CPU 1 via the serial interface 19, the display section 38 starts operating as a subtraction timer again while displaying the time T1 in seconds. If the release end signal is not input to the CPU 1 within a certain period of time from when the self-timer is activated, the display section 38 returns to the display form before entering the interval timer mode, and no countdown is performed. If a release signal is input to the circuit from the camera body side while the interval timer is counting down, or if the data imprinting mode switch 20 is turned on, the countdown will stop and the display unit 38 will display the display before entering the interval timer mode. Return to form.

Furthermore, elapsed time imprint mode (hereinafter referred to as rPA mode)
), when the elapsed time imprinting switch 24 is turned on, the display unit 38 enters the elapsed time display mode regardless of the display state of the convergence data imprinting mode.

When the switch 24 is on, the year, month, and day, which are the starting points for elapsed time calculation, should be displayed (Fig. 11).
When the button 4 is pressed, the starting point (year, month, day) can be corrected using the correction switches 21 to 23.

If the year, month, and day can be displayed in the display format before entering PA mode, it will be displayed in that format, and if it cannot be displayed, for example, if the original imprint mode is "day/hour/minute", "FC mode", or " When in "off mode," the year, month, and day are displayed numerically in the order shown in Figure 11.

When the switch 24 is turned off, the elapsed time (current date - starting date) ΔT is displayed, and when a date signal is input from the camera body to the circuit of the display unit 38, ΔT is imprinted.

Needless to say, the elapsed time ΔT is updated at the same time as the current date is updated.

The display form of the display section 38 is as shown in FIGS. 12 to 14, when ΔT>12 months, "year/month" display (first
(Figure 2), if ∆c≦12 months, “month/day” display (first
(Fig. 3), and if ΔT≦0, the process will continue until ΔT>0.
0 months, 0 days” (Figure 14).

Regardless of the display format of the front or receiving section 38, when the data imprinting mode selector switch 20 is turned on, the display section 38
returns to the current date display format before entering the PA mode.

By using the above shooting number imprinting mode (FC mode), interval timer mode, and PA mode in combination, it is possible to imprint not only the date and time, but also the Okakage number and the number of days that have passed on photos recorded at fixed time intervals. This makes it very easy to organize records@shadows and photos.

Next, a description will be given of the information input unit that is input from the camera body 46 via the serial interface 19 in the system of this embodiment.

In this embodiment, data imprint signals, film counter information, and various camera information are input from the camera body.
As shown in Table 1, each 4-bit unit from Do to D3 is 1 in total.
A 6-bit serial data transfer is being performed. Do and Dl
are the 10s digit and 1s digit B of the film counter, respectively.
These are C and D codes. Next, D2 indicates a data imprinting signal and various information, and when b3 (MSB> is 1, it is a data imprinting signal, and the lower 3 bits (b2, b+, bo
) The lamp lighting time for data imprinting is determined by the value of t.
It can be changed from O to tymsec. On the other hand, when b3 of D2 is O, the photographing information mark (PIM mark) is turned on when b2=1, and the PIM mark is turned off when b2=O. Furthermore, in the case of b3-0, if bl-1, the main switch 53 of the camera is on, and if b1=O, the main switch 53 is off. These latches the previous state when b3=1. Note that D3 is 4 spare bits.

Do Dl 14sBLSBH3BLSB Rorororo Rorororo Counter 10 digit D2
D3 H3B LSB H3B
LSBO×××: Do not imprint 1000: to m5ec 1001: tllnsec 1010: t2msec 1011: t3+++5ec 1100: i: a m5ec 1101: t5msec 11 io: tamsec 1111: ty ll5 (IC Qlxx: PIN mark 0N 00xx: PI) Ox1x: ON state of main switch 53 OXO×: OFF state of main switch 53 Table 2-2 RAM Table 2-3 RAM Table 2-4 RAM Table 2-5 RAM Table 2-6 RAM Next, data memory of RAM8 To explain the contents according to Table 2, the address label is shown on the left and the contents are shown on the right, and are summarized below.

First, when b2 (MSB) of 5TATUSO = 1, P
Indicates that the display is other than the normal data imprint display, such as A momo display or interval timer display, and the lower 3 bits b2, b,.

bo indicates normal data imprinting mode, and “OO
"O" turns off the imprint mode, "OO1" means year, month, day mode, "010" means month, day, year mode, "011" means day, month, year mode, "100" means day, hour, minute, "101" means frame counter copy. Indicates embedding mode.

5 When b3 of TATUS1 = 1, TRi boat = high (
H) Level output state, when b2 = 1, the interval timer outputs the iNT boat = 1H level, and indicates a wait state until the status signal of the main switch 53 is input from the camera body 46, and when b1 = 1, the interval timer outputs the iNT boat = 1H level. This shows the operating state of a timer that performs a cylinder reduction operation, and bo is unused.

5TATUS2 is switch 2 in Fig. 1 when b3=1.
1 to 23 indicate the correction state where some data is being corrected, b2 is unused, when bl = 1, the reference date setting state of the PA mode, and when bo = 1, the timer time setting state of the interval timer. show.

5TATUS3 is a flag that indicates a display request when a change occurs in the contents of the LCD display when b1=1.

5TATUS4 indicates that when b3=1, it is in interval timer mode and the imprint content is in PA mode,
The lower 3 bits b2, bl, b.

is a bit that specifies the display state; when it is "o io", it displays the reference date in PA mode, when it is "011", it displays the elapsed time in PA mode, when it is "100", it displays the interval timer setting, and when it is "101", it displays the interval timer setting. Each shows the interval timer subtraction display state.

5TATUS5 indicates the RFC port=H level output state when b3=1, and b2, b+, b.

is unused.

5TATUS6 is in the state where the interval timer has less than 10 seconds remaining when bl-1, and when bO = 1, it is iNT
In port=1H level output state, b3. b2 is unused.

Furthermore, 5ECONDO-YEARl stores the current time and the calendar's first digit of the second to the tenth digit of the year.
~PYEAR1 stores the first digit of the day to the tenth digit of the year of the reference date in the PA mode.

TRXMO to TRXH1 are the minutes 1st digit to hour 10th digit of the interval timer setting time, T R5ECO-TR
)-10LJRI indicates the first digit of the second to the tenth digit of the hour for the subtraction count of the interval timer.

swxo is the switch 23 pressed state when b3=1, b
When 2-1, the switch 22 is pressed, when bl-1, the switch 21 is pressed, and when bo=1, the switch 20 is pressed.

Similarly, 5WYO is in the bl-1 switch 24 pressed state, b
o=1 indicates the pressed state of the switch 25, and b3.
b2 is unused.

S i 03B-3i OOB is serial data C3
4 bits of each of .about.Do are read and stored.

5iOC is a counter that counts the number of clocks as the serial code is input.
, Dl, C2, C3) buffer (Si03B, 5i0
2B, 5i01B, 5iOOB) is reset.

C0UNTO and C0UNTI are each 321 for timekeeping.
1z and 4H7 counters, C0UNT3 and C0UNT4
are 3211z and 4H2 for interval timer respectively.
The counters of C0UNT5 and C0UNT6 are also 3 each.
These are 2H2 and 4H2 counters.

i NTCNT is 32 when iNT boat-H level output
This is a counter that counts the iNT boat output time for each H2iNT interrupt.

FRO and FRI each store the 1st digit and 10th digit in the 7-frame counter mode of the data imprint mode.

Next, the sequential operation of the microcomputer will be explained based on the flowcharts of FIG. 15 and FIGS. 16-1 to 16-18.

First, FIG. 15 shows an outline of the program. This program is roughly divided into four blocks.

First, the initial setting is △, but after turning on the power and canceling the reset, clearing the memory area and setting the first display data,
After completing the part where display contents are arranged, the CPU 1 enters a HALT state in which internal data is held. B32)1
ziNT is a processing sequence for interrupts that occur 32 times per second due to the 32Hz pulse output by the frequency divider circuit shown in Figure 3. It monitors switches 20 to 25, and when a switch is pressed, it responds to the pressed switch. After processing and counting the number of interrupts to 32, a 1 second carry is generated and the clock and calendar are incremented. The C5iOiNT lights up the data imprinting lamp and processes the input of camera information in the serial interrupt processing sequence that occurs when the serial code from the camera is input.

RT i NT in D is a timer interrupt processing sequence that occurs when the TRi timer counts up, and performs processing when the data imprinting lamp ends.

Furthermore, this embodiment will be explained in detail according to the flowcharts shown in FIGS. 16-1 to 16-18.

When the power supply 2 is turned on, the microcomputer is initialized by the reset (RE) signal generated by the 100 circuit 3.
As shown in FIG. 16-1, the operation starts from step #001 of the program.

In #002, the memory area is cleared, and in #003, the initial display mode of the data imprint mode is set to
The mode is set to "month/day" mode, and the year, month, and day of the calendar is set to, for example, "January 1, 1987" in #004. Then #0
Clear the stack point area with 05 and #00
After enabling interrupts at step 6, the microcomputer enters the HALT state, which is a data holding state, at #007.

Next, when the 32H2iNT interrupt signal is input to the CPU 1, the operation starts from #101 as shown in FIG. 16-2. #101. In #102, the status of each switch is read from the switch input port.

Next, #104. #105. #106. #107,
#108. #109 (#108. #10
9 in FIG. 16-6) and changes in the states of the switches 20 to 25 are determined, and if the switch states have changed, corresponding processing is performed. This process will be described later. On the other hand, if no switch has changed state, switch from #109 to #20.
1 (Figure 16-7).

Here, a case where each of the above-mentioned switches is pressed will be described.

First, the switch 20 is pressed, and when it is determined in #104 that the switch 20 is pressed, #129° #130. #
131. #132. #134. #135 and #2
Continuing to step 01, if it is determined in #129 that the display content is the elapsed time display in PA mode, or if it is determined in #130 that there are 10 seconds left in timer mode, the PA mode or timer mode is canceled in #132. subroutine RTCANCL is called. On the other hand, timer 1
If the state is not 0 seconds ago, it is further determined in #131 whether the display state is normal mode. If the mode is other than normal mode, press R at #132 in the same way as when the timer is 10 seconds before.
Call TCANCL. This timer cancel subroutine RTCANCL! The 211 principle will be explained later. After the timer cancellation process, the process moves to #201.

Now, if the display mode is determined to be normal mode in #131, 5TATUSO is incremented by 1 in <#133, thereby advancing the data imprinting mode by one. Next #134. When 5TATUSO=6 is determined in #135, by setting 5TATUso=o, the data imprinting mode can be set to "Year/Month/Day" → "Month/Day/Year" →
“Day/Month/Year” → “Day/Hour/Minute” → rFC mode” → “
It cycles through 6 modes: ``off mode''.

Next, a case where the correction switches 21, 22, and 23 are pressed will be described.

When it is determined in #105 that the state of the switch 21 has changed, the state of the switch after the change is determined in #105A, and if it is in the pressed state, b3 of 5TAT'US2 is determined in #140.
1 and set it to the modified state. Since the display content was changed in #141, in order to update the display, set b1= of 5TATUS3.
1 and a display request flag is set. Then #142
Based on the values of 5TATUSO and 5TATUS4, it is determined which data corresponds to the switch 21, and the corresponding data is corrected. Details will be described later.

When the modification process is completed, the process proceeds to #201.

On the other hand, in #105A, if it is determined that the switch state after the switch state change is off, 5TATLJ is determined in #143.
Set b3=o in S2 to reset the correction state, and set b1=1 in STATU S3 to set the display request flag in #144. #1 for switch 22゜23
06. The processing after the change in each switch state is confirmed in #107 is the same as that for the switch 21, and will therefore be omitted. In the case of switches 22 and 23, the modification process also proceeds to #201.

Now, if the switch 24 is pressed next (16-6
In FIG. 10, when it is determined in #108 that the state of the switch 24 has changed, the state of the switch 24 after the state change is determined in #160. If it is determined that the switch 24 is on, the interval timer mode cancel subroutine RTCANCM is called at #170, and the interval timer is canceled. This subroutine RTCANCM will be described later.

Thereafter, in #171, 5TATLJS is set to the PA mode reference date setting state, and in #172, the display mode is set to PA mode reference date setting display. At #173, a subroutine EXTDSP for controlling mode display other than normal display is called.

After that, proceed to #201.

On the other hand, if the switch 24 is off after the state change in #160, it is determined in #161 whether it is in the PA mode reference date setting state, and if it is in the setting state, it is set to the PA mode elapsed time display mode in #162, and # At 163 (STATUS2) 1=O
and cancel the PA mode reference date setting status, #2
Proceed to 01.

Next, regarding the process when the switch 25 is pressed down, when it is determined in #10 that the state of the switch 25 has changed, it is determined in #110 whether the interval timer is already in an operating state.

Therefore, if it is determined that the interval timer is not in the operating state, it is further determined in #111 whether the interval timer is in the timer time setting state. If the interval timer is not in the time setting state, proceed from #121 → #201 #
At step 121, the program jumps to subroutine TRMS for setting the interval timer mode.

Therefore, the interval timer mode setting process will be explained first with reference to FIG. 16-11. 5TAT with #121
Set the US to the interval timer time setting state, and press #
In step 122, all the digits from the first second digit to the tenth digit of the hour on the timer's counting watch are cleared to O, and in step #124, the EXTDSP subroutine for performing display processing other than the normal mode is called. This subroutine will be described later. Next, in #124, it is determined whether the mode is interval mode and the data imprinting mode is PA mode, and if the data imprinting mode is other than PA mode, it is further determined in #125 whether the display state is PA mode elapsed time display. If the elapsed time is displayed, 5TAT is displayed in #126.
The third and second bits of US4 are set and 5TA
Set the TUS to the interval timer setting state and the data imprint mode to the PA mode state. #124
The same applies when the third bit of 5TATLJS4 is determined to be set. On the other hand, if it is determined in #125 that the imprint mode is a non-PA mode, the interval timer setting display state is set in #127.

After completing the interval timer mode setting, the process advances to #201. If it is determined in #111 that the interval timer time is set, #113. The process advances to #114, and the interval timer starts operating from then on. At #113, the 1NTACT subroutine that activates the iNT boat is called.

The i-NTACT subroutine begins at #730 (Figures 16-18). In #731, the iNT boat-H is output, and in #732, the iNT boat output time is counted. i
The initial value of the NTCNT counter is set, and the iNT boat-day output status flag is set in #733.

Next, in #114, the interval timer time setting state flag is reset, and in #115, 5TATUS is set to the main switch state signal input wait state according to the serial code at the time of starting the interval timer, which will be described later.In #116, the timer is set to the operating state. are doing. Next, set the display request flag in #117, clear the interval timer's first and tenth digits to 0 in #118, and #
At step 119, the timer time from the first minute digit to the hour tenth digit of the interval timer setting time stored when the timer was started is copied to the RAM area where it is actually counted down. After that, proceed to #201.

Here, a method for determining each mode and correcting data when the above-mentioned correction switches 21, 22, and 23 are pressed will be explained in detail with reference to FIGS. 16-3, 16-4, and 16-5.

First, in the case of modification at switch 21, the 16th
In Figure 3, it is determined whether the MSB of 5TATtJSO is set at #800, and if it is set, it is determined that the display is in a mode other than normal mode. On the other hand #80
1, if the PA mode is determined and the display format is "month, day, year", the corresponding digit of switch 21 is "°".
Since it becomes "Month", the upper digit PMONTH of the elapsed time reference date is incremented in #804. On the other hand, if the display format is "day/month/year", the corresponding digit is "day"
Then, in #805, the day digit PDAY of the elapsed time reference date is incremented. If the display format is neither "month/day/year" or "day/month/year", the reference date display format in PA mode will be "year/month/day", so the corresponding digits will be the year digits. , #803, the year digit PYEAR is incremented. On the other hand, if it is determined in #800 that the display mode is the normal display mode, the process in #806. #807. #808, #809
The display mode is determined in #811. #812
．． #813. At #814, the corresponding digit of the switch 21 is incremented.

Next, regarding the correction process when the switch 22 is pressed, the first
5T at #820 in the same way as the process of switch 21 in Figure 6-4.
If the MSB of ATUSO is set, it is determined that the display content is outside normal mode, and if the display content in #821 is the interval timer time setting display, #825
The timer hour digit TRXHOUR, which is the digit corresponding to the switch 22 displaying the timer time setting, is incremented.

On the other hand, #823. #826 or #823-#824
The correction of the corresponding digit of the PA mode reference date by the switch 22 is the same as that for the switch 21.

On the other hand, when it is determined in #820 that the mode is normal display mode, the display mode is determined to be in #827 as in the case of the switch 21 described above. #
828. #829. The display mode is determined in #830, and the corresponding digit of the switch 22 is incremented in #831. #8
32. #833. This is done in #834.

Finally, regarding the correction process when switch 23 is pressed, the 16th
-5 figure, #840. As in the case of the switch 22, the interval timer time setting mode is determined in #841, and the timer minute digit (TRXM i N) corresponding to the switch 23 is incremented in #845. On the other hand, #847 in case of normal display. #848.
#849° #850. Determine the display mode with #851,
#852, #853. #854. #855. The digit corresponding to switch 23 is incremented at #856, as in the case of switches 21 and 22.

Next, when the monitoring processing of the switches 20 to 25 described above is completed, the 32H2 interrupt processing continues to the watch increment processing and timer down-count processing from #201 onwards (Figure 16-7). .

[That is, in #201, it is determined whether the iNT boat is in the active state. If the iNT boat is active, the iNT boat output time counter i NTCN is set in #202.
Increment T by 1 day and set this 1NTCNT at #203
If i_NTCNT=O, the i_NTSTP subroutine is called in #204 to set i_NTCNT=O. This iNTSTP subroutine will be explained from #750 in Figures 16-18.

In #751, iNT boat = H, and in #752, i
Canceling NT boat active state. Here, the iNT boat output time is the initial value of the 1NTCNT counter, which is 7, so 1/32Hz x 7 times = 2
18 m5ec.

Next, steps #205 to #210 perform watch and calendar increment processing for data imprinting. #
Increment C0UNTO of the 32Hz counter for watch in 205, output 411277) carry if C0UNTO-8 in #206, and output 4112 in #207.
At the same time as the counter C0UNT1 is incremented by 1, C0UNTO is cleared to 0 in #207A. Next, in #208 it is determined whether C0UNT1=4, and if it is 4, a carry of 1 second is output in #210, and in #21
At 0, the watch and calendar are incremented.

In #211, it is determined whether the timer is in operation. If the timer is in operation, the determination in #212 as to whether the REC port is in the output state is not performed. In other words, while the interval timer is operating, a separate counter is used to count down the timer setting time while the above-mentioned watch counter from #213 onwards is used, and on the other hand, the data imprinting confirmation mark (REC boat) is used.
When outputting, it is used to count the output time, so if the interval timer is running or the REC boat is
If H is not being output, the process jumps to the steps from #250 onwards without counting from #213 onwards. Here, if the interval timer is operating or the REC port is outputting H, the 32 Hz counter C0UNT3, which is separate from the C0tJNT1 mentioned above, is incremented by 1 in #213, and it is determined in #214 whether C0UNT3=8.

If C0UNT3=8, 4111 carries will occur,
4111 counter C0UNT at #215 in Figure 16-8
Increment 4 and set 3211z counter C at #216
0UNT3 is cleared to 0. Next, #218, #21
At step 9, it is determined whether the counter content of C0UNT4 is 4 or more, and if it is 4 or more, the timer generates a carry of 1 second. In this state, it is determined in #220 whether the interval timer is in an operating state. If the interval timer is in the operating state, in step #221, it is determined whether the main switch state is the "signal input wait state" based on the serial code at the time of starting the timer. If it is not in the wait state, the process proceeds to #222, and after the display request flag is set, the subroutine RLTiMER for performing countdown processing of the interval timer is called in #223. Next, regarding this RLTiMER, the 16th
-10 To explain, RLTiMER is #301
Processing begins, and since the timer counter generates a carry of 1 second in the above-mentioned #219, in #302, the first digit of the second digit TR3ECO of the interval timer is subtracted by 1, and in #303, the first digit of the second is determined. In the case of 0, 1 is subtracted from the 10th digit of the second. Next, #304
As a result of subtraction from the 10th digit of the second, it is determined whether the zero flag of the microcontroller is set, and if it is set,
In #305, if the zero flag is set as a result of the calculation in the minute digit and then the minute digit, the hour digit is sequentially decremented. Next is #306. #307. In #308, it is determined whether the minute digit = O1, the hour digit = 0, the 10th digit of the second = 1, the 1st digit of the second - 01, that is, 10 seconds before the interval timer count up, and if it is 10 seconds before, # At 309, the 1NTAcT subroutine that activates the iNT boat described above is called. For example, if the self-timer of the camera body is 10 seconds, the time 10 seconds ago is determined, and the iN
By setting the T-boat to H level, the self-timer starts counting.

Next, in #310, set 5TATUS so that the interval timer has less than 10 seconds left, and in #311, set 5TATUS
TtJso (7) 3rd H'/G (H8B) By setting OLJ, the display of the data imprinting contents is returned from the display of the countdown of the interval timer. Next, since a change occurs in the display contents, a subroutine MDCLR for clearing the data display area is called in #312. This MDCLR processing is #3 in Figure 16-15.
95. It is processed in #396, a display request flag is set in #395, and a blank is output to each display digit in #396 to clear the display area.

On the other hand, in #225, it is determined whether C0UNT4 of the 4Hz counter is greater than 8. If it is, a 2-second carry occurs as shown in #226, and in #227, it is determined that the data imprinting confirmation mark is output (REC port-H). Then #2
At #28, the REC port is set to L, the RFC mark 37 is turned off, and at #229, 5TATUS is reset to the data imprinting confirmation mark output status flag. Next, #250
It is determined whether C0LJNTO=O (Figure 16-9), and O
If not, check the state of the display request flag in #251 and if the request flag is set, 5 TATU is returned in #259.
The display mode is determined based on the states of SO and 5TATUS 4, and display contents according to the mode are output to the LCD driver 9. Thereafter, the display request flag is reset in #260, and the HALT state is entered in #280. On the other hand, if C0UNTO=O in #250, a carry of 4117 occurs, and in #252 it is determined whether the interval timer has less than 10 seconds left, and if there is less than 10 seconds left, it is determined in #253. Furthermore, it is determined whether the interval timer is in a countdown state, and if it is not in operation, the timer's first digit of seconds TR8EC is determined in #254.
Increment O by 1. Next, #255FTR8E
It is determined whether CO has reached 8, and if it is 8, #256
Increments the 10th digit of the timer by 1, and at the same time #
TR8ECO is cleared to 0 at 256Δ.

In #257, it is determined whether this TR8ECI is greater than 10. If it is greater than 10, more than 20 seconds have passed since the timer counted up (4Hz x 80 counts), so in #258 the RTCANCM subroutine to cancel the interval timer is executed. will be called. RTC
The ANCM subroutine will be described later. After interval timer mode is canceled, 5T is set in #259.
The mode is determined based on the values of ATUSO, 5TATtJS4, a display is made according to each mode, and the IHALT state is entered. If the display request flag is not set in #251, the display contents are not changed and a HALT state is entered.

Next, the process when a serial code is input from the camera body will be explained with reference to FIGS. 16-12.

When the serial interrupt signal of CPtJ 1 is input, the program starts the processing operation from 5iOiNT#501. In #501, it is determined whether the content of the S i CNT counter that counts the number of pulses of the serial synchronization clock is 16 or not, and if it is other than 16, the serial data input at that time is invalidated and a HALT state is entered. Conversely, if the number of clocks is 16 and the data is valid, the contents of each serial buffer are divided into four parts of 4 bits each in #502.
The 6 bits are 5ilo, 5ill, 5i02. SiO
3iCNT in each RAM area in #503.
The contents of the counter are cleared. Next, in #504, the state of the 3 bits (MSB) of 5iD2 is determined, and if it is 1, it is determined that it is a data imprint signal, and in #550, the imprint lamp 14 is turned on, and the subroutine LAMPON is executed.
call.

Here, this lamp lighting process will be explained with reference to FIGS. 16-13. #601. #602. In #603, it is determined whether the lamp is already lit (TRi boat 1), the data is being corrected using the correction switch, or the PA mode reference date is set (switch 24 is pressed), and if any of these conditions is present, the lamp is prohibited from lighting. , the lamp will not turn on.

Next, in #604, it is determined whether 5TATUS has less than 10 seconds remaining on the interval timer. If it is less than 10 seconds, it is determined in #630 whether the data display mode is off mode, and if it is off mode, the next A subroutine PH0TOEND is called to perform preparation processing for starting interval time counting, and if the mode is not off, the process proceeds to the actual lamp lighting processing from #608 onwards.

Next, the aforementioned subroutine PH0TOEND will be explained with reference to FIGS. 16-14. At PH0TOEND,
First, in #661, clear the 1st and 10th digits of seconds in the interval timer counter, and in #662, move the interval time setting time stored at the start into the area where the actual countdown is performed from the 1st digit of minutes. Copying up to the 10th digit. Next, in #663, a subroutine EXTDSP is called which performs display processing other than normal data imprinting content display.

EXTDSP restarts from #350 in Figure 16-16, sets 5TATtJS to a display state other than normal mode in #351, sets the display request flag in #352 because the display content is changed, and sets the display request flag in #353. Clears the display by outputting a blank to each digit in the display area.

Next, after ExTDsP processing, ite 5TAT to #665
The status of the US interval timer remaining within 10 seconds is reset, and the flag is set to the interval timer countdown operating state again in #666. Next, #667
, determines whether the data imprinting mode is PA mode elapsed time display, and if it is elapsed time mode, #66
Proceeding to step 8, STΔTUS is set to interval timer mode, data imprint mode is set to PA mode, and a flag is set to display a down count while the timer is operating. On the other hand, if the data imprinting mode is not PA in #667, only a flag is set to indicate that the display content is the down count of the timer. This completes the PH0TOEND process and returns to the original process. Further, if the data imprinting mode is the off mode, the CPU 1 enters the 1-I ALT state returned from the LAMPON subroutine.

Next, if the interval timer is not within 10 seconds in #604 in the LAMPON subroutine,
#605. In #606, it is determined whether the 5TATtJS is in the process of counting the interval timer or setting the time of the interval timer, and if it is in either state, cancel processing of the interval timer mode is performed in #606.
Perform after 620. This process will be described later. Next, if it is determined in #605 and #606 that neither of the above states exists, it is determined in #607 whether the data imprinting mode is off mode, and if it is off, the data imprinting lamp lighting process is not performed and the return is returned. After doing HA
Enters LT state. On the other hand, if it is determined in #607 that the mode is not off mode, the process proceeds to #608, where the time of the TRi timer is set based on the value of the lower 3 bits of 5iD2, and the timer starts counting. Next, in #609, T
By setting Ri boat=H, the lamp 14 actually starts lighting from this time. #610, 5TA
Set TLJS to TRi boat = H output state, #
Turn on the REC mark 37 at 611, and REC at #612.
The port is set to the H output state and the lamp lighting process is completed. After that, it returns to 3iQiNT) and enters the -IALT state.

On the other hand, #605 first. If the interval timer is operating or setting the interval timer time in #606, 5TAT is determined in #620.
It is determined whether the US is an interval timer and the data imprinting mode is the PA mode, and the interval timer's reset cell means are divided into two. First of all, set the data imprinting mode to PA mode using the interval timer.
In other words, if the MSB of 5TATUS4 is 1, #
Proceeding to 621, the RTCANCM subroutine is called. In the RTCANCM subroutine, the interval timer operating state flag is reset in #391 in FIG. 16-15, and the interval timer time setting state flag is reset in #392. Next, in #393, the interval timer remaining 10 seconds remaining status flag is also reset, and then the process returns.

Next, in #622, the display after canceling the interval timer is set to display the PA mode elapsed time, and in #623, since a change has occurred in the display contents, a flag for display request is set. In step #623, the previous subroutine MDCLR is called to clear the display area, and then the LAMPON subroutine returns. Lateral,
MS of S T A T' U S 4 in #620
If B is 0, that is, the data imprinting mode is other than the PA mode, a subroutine RTCANCL for canceling the interval timer mode is called in #640. In the subroutine RTCANCL, the 16th-
5TATUS in #381 in Figure 15
By resetting the MSB of O, the contents of normal data imprinting are restored. At this point, it enters the interval timer mode or PA mode, and the 5TATUSO M
Even if SB is set, the value of the lower 3 bits does not change, so if you reset the interval mode or PA mode, reset the MSB and enter the interval timer mode or PA mode by always determining the value of the lower 3 bits. It is configured so that it can return to the previous data imprinting mode state (display). Then RTCANCL
The subroutine jumps to RTCANCM, resets each of the 5 TATUS flags in the interval timer mode as described above, returns from the LAMPON subroutine, and enters the HALT state.

Next, regarding the 5iOiNT interrupt processing, Section 16-1
In Figure 2, if it is determined in #504 that it is not a lamp lighting signal, in #505 the PIM mark port is set to rHJ or r depending on the state of the 2nd bit of 5iD2.
#506 to LJ. It is set in #507. Next #50
At step 8, the state of the first bit of 5iD2 is determined, and the processing is divided depending on the state of the main switch 53 of the camera body. When the main switch 53 is initially turned on,
#509. In #510, it is determined whether 5TATUS is in the operating state of the interval timer and in the state signal input wait state of the main switch 53 based on the serial code. If it is in the wait state, clear the first and tenth digits of the timer counter in #511 and return 5TATUS.
The wait state is reset in #512, the interval timer is set to the operating state in #513, and the next three
The timer is set to start counting down from the time of 2Hz interrupt processing. Next, in order to notify the camera body of the end of the wait state, in #514, the iNTSTP subroutine is called to set the iNT boat to L, and then the camera enters the HALT state.

i In the NTSTP subroutine, #7 in Figures 16 to 18
At step 51, the iNT boat-L is output from the I10 port 17, and at #752, the iNT boat active flag is reset at 5TATUS.

Next, if the main switch 53 is determined to be off in #508, it is determined in #515 whether the interval timer is in an operating state, and if it is in an operating state, the above-mentioned LAMPON subroutine (16th-13th Figure) #6
20. #621. #622, #623. Similar to #624 or #620° #640, #516. #51
7. #518, #519. Interval timer cancellation X processing is performed in two parts depending on whether the data imprinting mode is the PA mode or not in the order of #520, #516, and #530. After the interval timer cancellation process, it enters the HALT state.

Next, timer interrupt processing (RT i NT) that occurs when the TRi timer counts up will be explained with reference to FIGS. 16-17.

When a timer interrupt occurs, CPU 1 starts operating from #701. Set TRi boat = L in #701,
Stops lamp lighting. Next, 5TAT at #702
Clear US TRi boat = H output status, #703
In this step, it is determined whether there are 10 seconds or less remaining on the interval timer, and if the remaining time is not 10 seconds or less, the RT i NT process ends and the HALT state is entered. On the other hand, if it is determined in #703 that the interval timer is in a state of 10 seconds or less, a subroutine PH0TOEND is called which performs preparation processing for counting the next interval time. PH0T
The OEND subroutine is as described in the 5iOiNT process above. Next, in #705, the first digit of the second and the tenth digit of the interval timer counter are cleared to O, and in #706, the first digit of the minute is placed in the RAM area where the interval timer setting time stored at the start is actually counted. Therefore, up to the 10th digit of the hour is copied. Next, in #707, a subroutine EXTD performs display processing other than normal data imprinting content display.
Calling SP. The processing of EXTDSP is as described above.

The sequence then enters the HALT state.

Next, a method for monitoring the state of the main switch 53 of the camera when starting the interval timer will be outlined.

Since the camera release method using a timer during interval timer operation is configured to start the self-timer, the camera control circuit uses (1) a timer start signal, (2) a timer release signal, and (3) activation of the self-timer using a self-switch. , must be distinguished. FIG. 17 shows the circuit configuration of the connection between the iNT port terminal of the interval timer and the 5ELF terminal of the camera control circuit in this embodiment, and the left half inside the broken line shows the configuration inside the control circuit on the interval timer side. , the right half shows the control circuit configuration on the camera body side.

In the figure, 40 is an iNT output terminal of an interval timer control circuit 43, which will be described later, and 41 is an N channel MOS l.
- transistor, same as 18 shown in Figure 3, 42 is iN
T signal output buffer, 43 is the interval timer control circuit built in the microcomputer, 50 is the camera self-timer switch, 55 is the 5ELF terminal of the camera control circuit, 56
is a self-signal input inverter, 57 is a resistor that pulls up the input of the inverter 56, and 58 is a camera body control circuit.

Next, the timing of each signal will be explained according to the timing chart in FIG. When inverter 50 is turned on, the input of inverter 56, which is normally pulled up by pull-up resistor 57, becomes L level. Here, the configuration of the camera control circuit 58 is such that the 5ELF terminal 55 is sampled at a constant period (T), and the self-timer is activated when the L level is detected twice, for example. In addition, at that time, the 5ELF terminal 55
After the first sampling when the L level of the main switch is detected, a serial code including a state signal of the main switch is sent out via the one serial interface.

In other words, when starting the self-timer on the camera side, the self-timer switch 50 is pressed for a time longer than the sampling period T.

Next, at the time of starting the interval timer, the interval timer control circuit 43 turns on the MOS transistor 41 to set the 5ELF terminal 55 to L, as shown in the timing chart (a), and then the camera side turns on the 5ELF terminal 55 for the first time. Outputs the main switch status signal in serial code by sampling. The interval timer control circuit 43 receives this and at the same time sets the iNT boat to L. If this occurs before the next sampling of the SEL F terminal, the self-timer of the camera body will not start. Since the interval timer control circuit 43 receives the status signal of the main switch 53 in the form of a serial code, it is possible to determine whether or not to start the interval timer by determining the code.

Regarding the discrimination process, refer to 5iOiNT in Figure 16-12 above.
As explained in the section.

Finally, when the interval timer counts up and starts the self-timer, as shown in the timing chart (b), unlike the start case described above, the timer side does not set the iN port to H by inputting the serial code. ,
In this case, a certain period of time (200m5ec in the example)
[By setting it to LJ level, the camera body starts the self-timer when it detects the rLJ level of the 5ELF terminal twice. Here, 5E of the camera body control circuit 58
LFE sample sampling) is this 20 Q m5
Needless to say, it is much shorter than ec.

<Effects of the Invention> As explained above, in the present invention, the interval timer time is set in hours and minutes, and seconds are also displayed while the timer is operating, so there is no need to set the timer time in seconds. , when the timer is operating, the seconds are displayed so that it can be clearly determined that the timer is operating.

[Brief explanation of drawings]

FIG. 1 is a rear view of a camera according to an embodiment of the present invention, FIG. 2 is a sectional view of the main part of the date mechanism on the rear side, FIG. 3 is a block diagram of the electronic control circuit for its operation, and FIG. 4 are LCD segment layout diagrams for monitors, Figures 5 to 14.
Each figure is an explanatory diagram of the display state of the monitor LCD.
The figure is a flowchart explaining the software for control.
Figures 16-1 to 16-18 are detailed diagrams of the flowcharts, Figure 17 is a circuit diagram of the interval timer and camera body connection section, and Figure 18 is a timing chart of the timer operation. be. 10... LCD for monitor, 11... LCD for data imprinting, 20... data imprinting mode changeover switch, 21, 22. 23... imprinting data and interval timer time correction switch, 24... - Elapsed time imprint mode selection switch, 25... Interval timer mode switch, 35... Film counter display section, 36... R shadow status display mark on camera body, 37
...Imprint confirmation mark, 38...Display section for confirming imprint data Fig. 1 53: Main switch, Fig. 2 Fig. 4 Fig. 18? ;10 Figure 12 13 Figure □ Figure 14 Figure 15 Figure 16-1 #007 8ALT Figure 16-8 #250 16-9 [,71 HALT Figure 16-10 RLTiMER ↓ RET 'JE, 16- Old Symphony RET RET i Hashi 1 Figure 16-14 RET Figure 16-15 ET Figure 16-17 RT iNT ALT Figure 16-18 iNT ACT iNT 5TI) ET Figure 17 Figure 18 (a) At timer start (b) At timer release (C) Camera self-timer oil

Claims (1)

[Claims] 1. In an interval photographing device that performs a shutter release operation based on a release signal output from an interval timer circuit at predetermined intervals, a display means is provided on the outer surface of the device, and the display means displays hour and minute values when the timer is set. An interval photographing device characterized in that, during operation of the interval timer, the display switches to display minute and second values as they change successively.