JPS6157593B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a calendar display day setting device that is incorporated into a clock that electronically counts time.

For example, by dividing and counting the reference oscillation signal, the hours, minutes,
2. Description of the Related Art Electronic watches are known that obtain time information such as seconds and date information such as month, day, day of the week, etc., and display these information digitally. However, in daily life, not only the time and date, but also various schedules,
When making plans, date information for one month, that is, a calendar table is required. Therefore, it is conceivable to incorporate a calendar table into the above-mentioned electronic clock, but when incorporating a calendar table, the day of the week must also be indicated in each column at the same time, which increases the size of the device and makes it difficult to use a small watch such as a wristwatch. It could not be applied to electronic watches. Therefore, as shown in Fig. 1, seven indicators a to g are provided at the top of each column of 5 rows and 7 columns numbered from 1 to 31, and a column corresponding to a specific day of the week, for example, Sunday. The day of the week in each column is indicated by driving the display. For example, in FIG. 1 above, by driving the display C, the day of the week in each column is announced in the following order: Sunday in the column for the 3rd, Monday in the column for the 4th, Tuesday in the column for the 5th, and so on. .

Therefore, in a calendar display device like the one shown in FIG.
In order to display ~g, for example, JP-A-51-
As shown in Publication No. 55266, a hexadecimal day-of-the-week standard counter is provided corresponding to the seven display bodies a to g, and the seven display bodies 1 to g are set according to the counted value of the day-of-the-week standard counter. The configuration is configured so that it lights up selectively, and each time the month changes, the day of the week is displayed by the difference between the specific day of the week column of the previous month and the next specific day of the week column, depending on conditions such as whether the previous month was a large month or a small month. A reference counter is counted up to clearly indicate the specific day of the week for the next month. Therefore, when initializing such a device after battery replacement, it is necessary to preset the standard day of the week counter to a value corresponding to a specific day of the week column of the current month using an external operating mechanism, which is troublesome. be.

The object of the present invention has been made in view of the above circumstances. For example, after replacing the battery, the Sunday column of the calendar table can be set without using an external operation mechanism to initialize the Sunday column, and the device itself can be set. An object of the present invention is to provide a calendar display day setting device that can be downsized.

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 2, reference numeral 1 denotes an oscillation circuit that generates a reference pulse signal, and its output signal is frequency-divided by a frequency dividing circuit 2 into a signal with a period of 1 second. 3, 4, and 5 are set by setting signals from a setting circuit (not shown),
A counting section that sequentially counts the output signal of the frequency dividing circuit 2 to obtain second information, minute information, and hour information, respectively. and is sent to the digital display section 7. 8 is a day of the week counter consisting of a hexadecimal counter,
The count values 0, 1, 2...6 indicate Sunday, Monday, Tuesday...Saturday, respectively, and this day of the week information is sent to the display switching circuit 6 and the reference day of the week setting section 9. This standard day of the week setting section 9, details of which will be described later, displays a calendar table on the calendar display section 13 when the calendar display switch _S2 is operated, and also serves as a standard for clearly indicating the column for the standard day of the week, for example, Sunday. It outputs day of the week information. Further, numeral 10 is a daily counting section that counts the daily cycle signal outputted from the clock counting section 5, and 11 is a monthly counting section, which is controlled by the month-end control section 12. That is, the month-end control unit 12 controls large months with the last day of the month on the 31st, small months with the last day of the month on the 30th, and months with the last day of the month on the 28th or 29th (〓
year) to control the end of the month of the month counting section 11.
Further, the outputs of the day counting section 10 and the month counting section 11 are sent to the display switching circuit 6. The outputs of the day of the week counting section 8, day counting section 10, and month counting section 11 are output from the switch _S1 .
While the closing operation is being performed, the signal is sent to the digital display section 7 via the display switching circuit 6 and displayed.

Next, details of the day of the week counting section 8 and reference day of the week setting section 9 will be explained. Calendar display switch
The output of _S2 is passed through the delay circuit 14 to the AND circuit 16.
It is further applied to an AND circuit 16 via a delay circuit 15 and an inverter 17. The output of this AND circuit 16 is applied to AND circuits 17, 18, and 19 together with each bit output of the first 7-ary counter 20 having a 3-bit configuration. The counter 20 receives the clock number section 5 and the date setting signal via an OR circuit 21 as a count-up signal, and receives a signal from the month-end control section 12 via an OR circuit 22 as a reset signal. Also, 7
Each bit output of the digit counter 20 is sent to an AND circuit 2.
3 and the OR circuit 22 to its own reset input terminal. However, the above AND circuit 1
The outputs of 7, 18, and 19 are the second 7 of 3-bit configuration.
The signal is input to each bit of the advance counter 24 as a set signal. This heptadium counter 24 includes an AND circuit 25, a flip-flop 26, and a heptadium counter 24.
7. Consists of inverters 28 to 30, decoder 31, and OR circuit 32, and receives the output of a calculation circuit that receives day of the week information from day of the week counter 8A and calculates a value that adds up to 7. The output of the flip-flop 26, for example, a 64 Hz pulse signal, is input to the input terminal of the heptadary counter 24 via an AND circuit 25 as a count-up signal. The flip-flop 26 is set by the fall of the output of the AND circuit 16. Further, the output of the AND circuit 25 is inputted to the heptadary counter 27 as a count-up signal. This heptadary counter 27 is reset by the output of the AND circuit 16, and the output of each bit is sent to the decoder 31 either directly or via inverters 28-30. Also, this decoder 3
Each bit output of the hexadecimal counter 8A of the day of the week counter 8 is input to the input circuit 1 directly or via inverters 8a to 8c. The AND output of each bit is input to the heptadary counter 8A as a reset signal. The decoder 31 is equipped with seven output lines 31a to 31g, and the hexadecimal counter 8A and the hexadecimal counter 27 have a predetermined relationship, that is, the value obtained by subtracting the count value of the counter 8A from the numerical value "7". When the content of 27 is reached, a "1" signal is output from any of the output lines 31a to 31g, and the output signal is sent to the OR circuit 3.
2 to the reset terminal R of flip-flop 26. Further, each bit output of the counter 24 is applied to its own reset terminal via an AND circuit 33 and an OR circuit 34. moreover,
The reset terminal of the counter 24 has an AND circuit 1
The Q side output of the flip-flop 35, which is inverted in response to the output signal of 6, and the output of the AND circuit 16 are inputted via the AND circuit 36 and the OR circuit 34. Then, each bit output of the counter 24 is
The signal is sent to a decoder 37 operated by the Q side output of the flip-flop 35, and the output of this decoder 37 is sent to the calendar display section 13 as a reference day of the week display drive signal. Further, the Q side output of the flip-flop 35 is sent to the calendar display section 13 as an operation command.

FIG. 4 shows the configuration of the digital display section 7 and the calendar display section 13. The digital display section 7 includes an hour display section 7A, a minute display section 7B, and a second display section 7.
It starts with C. In this case, the seconds display section 7C has a configuration in which the 10th digit is a square-shaped electrode and the 1st digit is a square-shaped electrode, and in addition to the second display, the symbol for the day of the week is "SU".
"MO", "TU", "WE", "TH", "FR", and "SA" can be displayed. The digital display section 7 is driven by signals from the display switching circuit 6 inputted through terminals 7a, 7b, . . . . In addition, the calendar display section 13 displays "1".
A calendar table 13A in which date display numbers up to "31" are arranged in 5 rows and 7 columns is provided, and day of the week display bodies 13a to 13g are provided above the calendar table 13A to correspond to each column of the calendar table 13A. . The calendar table 13A is driven for display by the output of the flip-flop 35 inputted through the terminal 13h, and the day of the week display bodies 13a-13g are supplied with the output of the decoder 37 through the terminals 13i-13o.

Next, the operation of the present invention configured as described above will be explained. In FIG. 2, the seconds counting section 3, minute counting section 4, and clock counting section 5 are initially set by the second setting signal, minute setting signal, and hour setting signal, and then from the frequency dividing circuit 2. Time information is obtained by counting the output one second signals. This time information is sent to the digital display unit 7 via the display switching circuit 6 during normal times, that is, when the switches S ₁ and S ₂ are not operated, and is displayed, for example, as shown in FIG. The time will be displayed as ``minutes 35 seconds''. Furthermore, when the switch _S1 is closed, the contents of the day of the week counter 8, the day counter 10, and the month counter 11 are selected by the display switching circuit 6 and sent to the digital display section 7, for example, the fifth As shown in Figure b, the time of "Friday, December 30th (FR)" is displayed. Further, when the calendar display switch _S2 is operated, the reference day of the week setting section 9 operates to drive the calendar display section 13. The operation of the reference day of the week setting section 9 shown in FIG. 3 will be explained below. When the calendar display switch _S2 is operated, one signal is output from the AND circuit 16. This signal is applied as a gate release signal to one input terminal of the AND circuits 17, 18, and 19, and transfers the count value of the heptadary counter 20 to the heptadary counter 24 as well. The hexadecimal counter 20 counts based on the date setting signal and the carry signal from the clock counting section, and when the signal from the month-end control section 12 and the count value reaches "7", the AND circuit 2
3 is applied via OR circuit 22 as a reset signal. That is, this 7
The input and reset input signals of the advance counter 20 are as follows:
It is exactly the same as the day counter 10, so the count values of the day counter are “0”, “7”, “14”, “21”, “28”.
”
At this time, the count value of the heptadium counter 20 is "0", and the count value of the day counter is "1", "8", "15",
“22” and “29” correspond to the date columns a, b, c, d, e, f, and g shown in Figure 1 so that the count value of the hexadecimal counter 20 becomes “1”. The counted values are 0, 1, 2, 3, 4, 5, and 6, respectively.

Further, the output signal of the AND circuit 16 is passed through a flip-flop 26 which is set at the fall of this output signal.
is input to the set terminal of As a result, a 64 Hz pulse signal is output from the AND circuit 25 and counted by the hexadecimal counter 24. Further, the 64 Hz pulse signal outputted from the AND circuit 25 is counted by a counter 27, and each bit output of this counter 27 is sent directly and via inverters 28, 29, and 30 to a decoder 31. This decoder 3
1 is also given day-of-the-week information from the day-of-the-week counter 8, and a signal corresponding to this day-of-the-week information and the count value of the counter 27 is sent to the reset terminal of the flip-flop 26 via the OR circuit 32. By resetting , the output of the 64 Hz pulse signal from the AND circuit 25 is stopped. That is, the number of pulses of the 64 Hz pulse signal output from the AND circuit 25 is determined by the day of the week information. For example, on Sunday, when the day of the week information is "0", the number of pulses of the 64 Hz pulse signal output from the AND circuit 25 is determined by the day of the week information.
When the count value of 7 reaches "7", the signal 31a is output from the decoder 31, and the flip-flop 26 is reset at the fall of this signal, so the AND circuit 25 outputs seven 64Hz pulse signals. , are counted by the counter 24.
In this way, the count value of the day of the week counter becomes “1”,
When the numbers are "2", "3", "4", "5", and "6", that is, Monday, Tuesday, Wednesday, Thursday, Friday, and Saturday, the AND circuit 25 fires 6 shots, 5 shots, 4 shots, respectively. Three, two, and one 64 Hz signals are output and counted by the counter 24. The count value of the counter 24 is decoded by a decoder 37 which is operated by receiving the Q side output of the binary flip-flop 35 and sent to the calendar display section 13. Then, when the binary counter 35 is in the set state, the operation switch is pressed.
When _S2 is operated, a signal is output from the AND circuit 36 and the counter 24 is reset.

For example, if the current day is Friday, December 30th, as shown in Figure 5b, then the day of the week counter 8
The count value of the counter 20 is "5", and the count value of the counter 20 is "2" (30 days). When the switch _S2 is operated at this time, the binary flip-flop 35 is set and the Q side output is inputted through the input terminal of the calendar display section 13.
The numeric characters "1" to "31" of the calendar table 13A are displayed. Further, the count value "2" of the counter 20 is transferred to the counter 24, and a pulse signal from the AND circuit 25 is given to the counter 24. The pulse signal from the AND circuit 25 is also counted by the counter 27, and since the count value of the day of the week counter 8 is "5", when the counter 27 counts two pulse signals, a signal is output from the output line 31f, and the flip-flop 26 It is reset and the gate of AND circuit 25 is closed. In other words, since two pulse signals are output from the AND circuit 25, the count value of the counter 24 becomes 4, and this count value 4 is decoded by the decoder 37, and the count value of 4 is decoded by the decoder 37.
is given to the calendar display section 13 via
The display body 13d is driven to display. In other words, it is displayed as shown in FIG. 6, and since the column numbered 4 indicates Sunday, it is possible to know which day of the week the other dates are.

Next, a description will be given of another embodiment shown in FIG. 7, that is, a case where the present invention is applied to an electronic timepiece using a microprogram. In FIG. 7, 41 is a reference signal oscillator such as a crystal oscillator. The output of this reference frequency oscillator 41 is applied to a frequency divider 42, and the frequency divider 42 is connected to the reference frequency oscillator 41.
The frequency of the output is divided and a 1 second signal (a signal output every 1 second) is output. This one-second signal is applied to a one-shot circuit 43, which outputs a one-shot pulse every time the one-second signal is applied, and this output is applied to an AND circuit 45.

On the other hand, 46 is a storage unit that permanently stores microprograms for controlling the operation of each circuit, and in this embodiment, a ROM (read-only memory) is used. However, this ROM46
RAM (Random Access Memory) stores various data for calculations and timekeeping.
Bus line B consists of an address signal that specifies the address of 47, an operation signal that specifies the operation of each circuit, a code such as a numerical value necessary for calculation or time measurement, and a next address signal that specifies the next address of the bus line B. ₁ , _B2 , _B3 and _B4 . The next address output via the bus line _B4 is sent to the ROM 46 via the address change circuit 48 together with the output of the AND circuit 5.
The ROM 46 outputs the microprogram written in the address outputted from the ROM address section 49 via the respective bus lines _B1 to _B4 .

Furthermore, the data in the RAM 47 specified by the address signal applied via the bus line B ₁ is output via the bus line B ₅ to the arithmetic circuit 50.
Enter. The arithmetic circuit 50 executes various operations based on the data input from the RAM 47 or the numerical code input via the bus line _B3 .
The result is output to the RAM 47, OR circuit 51, and display buffer (not shown) via the bus line _B6 . Therefore, the output of the OR circuit 51 is stored in the data judgment latch 52a of the judgment latch circuit 52, and the carry and borrow from the arithmetic circuit 9 is stored in the carry and borrow judgment latch 52b of the judgment latch circuit 52. be done. The respective outputs of these judgment latches 52a and 52b are applied to an address change circuit 48 via a predetermined logic circuit (not shown), and this address change circuit 48 outputs the next address given via bus line _B4 . By sending the changed signal to the ROM address section 49, the ROM address section 49 outputs an address different from the next address sent from the bus line _B4 .

Further, a calendar display designation signal from a switch circuit (not shown) is applied to an AND circuit 53 via a bus line _B7 , and the output of this AND circuit 53 joins the bus line _B3 . Furthermore, the bus line
B ₇ is also applied to an AND circuit 55 via the OR circuit 54, and the output of this AND circuit 55 is applied to the address change circuit 48.

Each of the above circuits is controlled by the operation signal outputted via the bus line _B2 being decoded and outputted by the operation decoder 56. That is, control signals are applied from the operation decoder 56 to the AND circuits 45 and 55 via the signal line O ₁ and to the AND circuit 53 via the signal line O ₂ to control the opening and closing of the gate circuit. In addition to the signal lines O ₁ and O ₂ described above, a plurality of control signal lines O ₃ to O _o are provided from the operation decoder 56 to output various control signals.

FIG. 8 shows the storage area of the RAM 47. Each address consists of 4 bits, and addresses A ₀ to A _o are assigned to each address. Then, time information is stored in addresses _A0 to _A4 , AM/PM classification information is stored in _A5 , and day of the week, date information, and year information are stored in _A6 to _A12 . Address _A13 and subsequent addresses are for storing other information, such as time measurement information, alarm time information, etc. in devices equipped with functions such as a stopwatch and an alarm. Also, address A
_X , _AY , and _AZ are storage areas for calculations.

Next, the operation of the above embodiment will be explained according to the time measurement flow shown in FIG. If the one shot pulse (1 second signal) is not output from the one shot circuit 43, "HALT" is selected as shown in step _S1 in Fig. 9.
(standby state), and operation decoder 5
With the signal O ₁ being output from 6, leave it in a state where the signal can be received for 1 second. When a 1 second signal is output in this state, this 1 second signal is sent to the address change circuit 48 via the AND circuit 45, and the address change causes the process to proceed to the next step _S2 . In this step _S2 , the address _A0 that specifies the second information storage section in the RAM47 is output from the ROM46 via the bus line _B1 , and the contents of the address _A0 are transferred to the RAM47.
is read out to the arithmetic circuit 50. At this time, an "addition instruction" is output from the operation decoder 56, and a code "1" is output to the bus line _B3 . Therefore, in the arithmetic circuit 50, “A ₀
+1” operation is executed and the result is sent to the bus line.
It is stored again at address _A0 in RAM 47 via _B6 . When this process is completed, the process proceeds to step _S3 , where it is determined whether the content of address _A0 is "10" or not. This is used to determine whether or not to carry forward to the next 10 seconds. In this case, a signal specifying the address A ₀ of the RAM 47 is output via the bus line B ₁ as described above, and the data at this address A ₀ and the code "10" output via the bus line B ₃ are calculated. A circuit 50 performs subtraction and determines whether the result is "0" or not. In other words,
The output of the arithmetic circuit 50 is input to 2-bit judgment latches 52a and 52b, and if the result of the above operation is "0", the latches 52a and 52b are inputted.
2b stores "0,0", and if there is a mismatch, "1,0" or "0,1" is stored. Depending on the state, the address is changed by the address change circuit 48 and the next step is performed by the ROM address section 49. The correct address is determined. If the above subtraction result is "0", that is, the judgment result is "YES", then the process proceeds to step _S4 and " ₁ " is added to the contents of the address A1 storing the 10 second information. The operation at this time is almost the same as "A ₀ +1" above, and the bus line
The signal applied via _B1 specifies address _A1 . And this step S ₄
When this is completed, the process advances to step _S5 and the contents of address _A0 are cleared. This clearing operation is performed, for example, by writing "0" into the contents of address _A0 . When this step _S5 is completed, the process proceeds to step _S6 , and it is determined whether or not the 10 second information of address _A1 is 6. If the judgment result is ``YES'', the process proceeds to steps _S6 and _S7. After adding 1 to the minute information for address A ₂ , clear the 10 second information for address A ₁ . Do the same for 10 minutes, hour, week, day, month, year, etc.
〓 Change information such as year. Furthermore, if the judgment result in steps _S3 , _S6 , etc. is "NO", each piece of information is sent to the display buffer, that is, if "hours, minutes, seconds" are normally displayed, step _S9 is performed. The contents of A ₀ to _{A 4} are stored in the display register and the displayed contents are changed.

Next, the operation when the calendar table display command is given from the switch circuit via the bus line _B7 in FIG. 7 will be explained with reference to the flowchart in FIG. 10. When a calendar table display command is given from the switch circuit, this display command is sent to the address change circuit 48 via the OR circuit 54 and the AND circuit 55, and as a result of the address change, the 10th
Proceed to step _S11 in the diagram. In this step S ₁₁
The information of "day of the week", "day", "10th" stored in addresses A ₆ , A ₇ , A ₈ of RAM 47 is transferred to address A
The data is transferred to _X , _AY , and _AZ, respectively, and when the transfer process is completed, the process proceeds to the next step _S12 based on the next address output from the ROM 46 via the bus line _B4 . In this step _S12 , address A of RAM47 is
It is determined whether the content of _Z , that is, the content of the "10th" digit, is "0". If the judgment result in step _S12 is NO, the process proceeds to step _S13 , where "1" is subtracted from the contents of the address _AZ , and at the same time, in step _S14 , the contents of the address _AY of the RAM 47, that is, "day" are subtracted. Add "3" to the information. In other words, the date information one week before the current day is obtained through steps _S13 and _S14 , and then the step
Returning to _S12 , it is again determined whether the content of address _AZ is "0" or not, and if the determination result is NO, the processes of steps _S13 and _S14 are repeated. That is, by performing the processing in steps S ₁₂ , S ₁₃ , and S ₁₄ above, the day information of the current day is changed to "3" to "3" on the same day of the week.
It is converted to day information for the "9th". For example, if the current date is Friday, December 30th, the 30th is converted sequentially from the 23rd to the 16th to the 9th. and step
If the judgment result in _S12 is YES, the process proceeds to step _S15 , and it is judged whether the content of the address _AY in the RAM 47, that is, the information on "day" is "8" or more, and the judgment result is
If NO, the process advances to step _S16 , "7" is subtracted from the contents of address A _Y , and the process returns to step _S15 . In steps _S12 to _S16 , it is detected in which column of the calendar table 13A in FIG. 4 the current day is located based on the day information. However, in step _S15
If the determination is NO, the process advances to the next step _S17 , and "6" is added to the contents of the address _AY . Next, the process proceeds to step _S18 , where the contents of the address _A.sub.X , that is, the day of the week information, are subtracted from the contents of the address _A.sub.Y , and the result of the subtraction is stored in the address _A.sub.X. That is,
If the day of the week information is subtracted from the column information for the current day in which column out of the seven columns the current day is found in steps _S12 to _S16 , the result may be negative, so in step _S17 , the column for the current day is 6 is added to the information, and the day of the week information of the current day is subtracted in step _S18 to obtain Sunday column information of any value from 1 to 13 and stored at address _AX . Thereafter, as shown _in step _{S19 ,} it is determined whether the contents of address _A Then proceed to the next step _S21 . That is, in step _S18 , column information for Sunday is determined within the range of 1 to ₁₃ and stored in address _A. The column information is corrected by subtracting 7 and stored at address _A.sub.X. Also, the judgment result of step _S19 is
If NO, immediately proceed to step _S21 . In step _S21 , the column information stored at address _A.sub.X is sent to the display buffer and displayed. For example, in the case of Friday, December 30th as described above, when the content of address A _Y becomes "9" day in step _S14 , the judgment result in step _S12 becomes YES, and the step
The process proceeds to step _S16 via _S15 , where a subtraction of "9-7" is performed. The program then proceeds to step _S17 via step _S15 again, where "6" is added to the content "2" of address _AY . Then, the addition result "8" is subtracted from the day of the week information of the address _AX in step _S18 . The day of the week information is ``5'' for Friday, and in step <sub>S18</sub> , ``8-5=3'' is subtracted, and the subtraction result ``3'' is stored at address _AX . Then step S ₁₉ and step
Proceeding to _S21 , the content "3" of the address _A.sub.X is sent to the display buffer, the display 13d in FIG. 4 is driven to display, and the column of the 4th is displayed as Sunday.

As described above, according to the present invention, in a calendar display device that displays a calendar table in which the numerical values for the date of one month are arranged in seven columns and the column corresponding to Sunday is clearly displayed among the seven columns, after replacing the battery, Since the Sunday column of the current month is automatically set without initializing the Sunday column of the calendar table, etc., a calendar display day setting device that is easy to handle can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing an example of the configuration of a calendar table in an electronic watch, Fig. 2 is a block diagram showing an embodiment of the present invention, and Fig. 3 is a circuit configuration diagram showing details of the standard day of the week setting date in the same embodiment. , FIG. 4 is a configuration diagram showing details of the digital display section and calendar display section in the same embodiment, and FIGS. 5 a, b, and 6 show the display state of the display section for explaining the operation of the same embodiment. 7 is a block diagram showing another embodiment of the present invention, FIG. 8 is a diagram showing the storage contents of the storage device in the same embodiment, and FIGS. 9 and 10 are diagrams showing the operation of the same embodiment. This is a flowchart for explanation. 9...Reference day of the week setting section, 14, 15...Delay circuit,
20, 24, 27... hexadecimal counter, 31, 37...
Decoder, 47... Random access memory (RAM), 52... Control latch circuit.

Claims (1)

[Scope of Claims] 1. In a calendar display device that displays a calendar table in which numerical values for the date of one month are arranged in seven columns and one of these seven columns corresponds to Sunday, the reference clock signal is A clock circuit that counts and outputs a daily cycle signal, and a clock circuit that counts the date setting signal supplied when adjusting the time, and receives the output of the clock circuit and counts the daily cycle signal to obtain day information of the current day. a day counting circuit that receives the output from the clock circuit and counts signals of one day's cycle to obtain the day of the week information of the current day; and a day counting circuit that receives the day setting signal and counts it, A first hexadecimal counting circuit that receives the output from the clock counting circuit and counts the signal of the daily period; and a first hexadecimal counting circuit that receives the day of the week information from the day of the week counting circuit and calculates the value at which the sum of the two counts becomes 7. a calculation circuit that performs the calculation, and a second heptadium counting circuit to which the count value of the first heptadium counting circuit is transferred and set, and which adds the calculated values from the calculation circuit to obtain Sunday column information; The seventh hexadecimal counting circuit is connected to this second hexadecimal counting circuit and corresponds to the Sunday column information.
1. A calendar display day setting device comprising: a means for clearly indicating Sunday columns among the columns. 2. In a calendar display device that displays a calendar table in which numerical values for the date of one month are arranged in seven columns, and the column corresponding to Sunday among these seven columns is clearly displayed, the daily period is determined by counting the reference clock signal. a clock means for outputting a signal; a day counting means for counting a daily periodic signal outputted from the clock means and also counting a set signal supplied at the time of time adjustment to obtain day information of the current day; day of the week counting means that counts the daily cycle signal output from the clocking means to obtain day of the week information of the current day, and subtracting 7N (N is an integer) based on the day information of the current day obtained from the day counting means. Today's column information calculating means for calculating the current day's column information indicating which column of the seven columns the current day is in by obtaining the following values, and the current day's column information obtained by the current day's column information calculating means. After adding "6" to , the day of the week information from the day of the week counting means is subtracted, and when this value indicates 7 columns or more, 7N (N is an integer) is subtracted to correct the column information of 7 columns, and Sunday column information is obtained. a Sunday column information calculation means for obtaining the Sunday column information; a storage means for storing the Sunday column information obtained by the Sunday column information calculation means at a predetermined address in RAM; and a storage means for receiving the column information stored in the storage means and calculating the column information A calendar display day setting device characterized in that a microcomputer is used, and a microcomputer is used to specify a Sunday column among the seven columns corresponding to Sunday.