JPS63260308A - Radio receiver - Google Patents

Radio receiver

Info

Publication number
JPS63260308A
JPS63260308A JP9557587A JP9557587A JPS63260308A JP S63260308 A JPS63260308 A JP S63260308A JP 9557587 A JP9557587 A JP 9557587A JP 9557587 A JP9557587 A JP 9557587A JP S63260308 A JPS63260308 A JP S63260308A
Authority
JP
Japan
Prior art keywords
circuit
gain
signal
level
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9557587A
Other languages
Japanese (ja)
Inventor
Sakae Sugayama
菅山 栄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP9557587A priority Critical patent/JPS63260308A/en
Publication of JPS63260308A publication Critical patent/JPS63260308A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the noise at the time of no signal and a weak electric field of a prescribed level or below by decreasing the gain of a 2nd intermediate frequency IF amplifier circuit when the reception signal reaches the prescribed level or below. CONSTITUTION:When the electric field strength is lower than a level (y), a 1st automatic gain control AGC circuit 13 is inactive and a 1st IF amplifier circuit 9 applies amplification by a prescribed gain. On the other hand, an output signal of a 2nd smoothing circuit 15 is impressed to a gain reduction circuit 16 and in this case the gain reduction circuit 16 reduces the gain of the 2nd IF amplifier circuit 10 in response to the output signal. Thus, the total gain to the IF signal from a mixer circuit 4 is decreased thereby reducing noise.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、IF(中間周波)AGC(自動利得制御)回
路を有するラジオ受信機に関するもので、特に弱電界時
におけるノイズの低減を計ったラジオ受信機に関する。
Detailed Description of the Invention (a) Industrial Application Field The present invention relates to a radio receiver having an IF (intermediate frequency) AGC (automatic gain control) circuit, and is designed to reduce noise particularly in the case of a weak electric field. related to radio receivers.

(ロ)従来の技術 AMラジオ受信機においては、弱電界の放送から強電界
の放送迄歪無く受信出来る様RF(ラジオ周波)及びI
 FAGC回路が設けられている。
(b) Conventional technology AM radio receivers use RF (radio frequency) and I
A FAGC circuit is provided.

前記RF及びI FAGC回路を備えるAMラジオ受信
機は、第2図の如く示される。第2図において、アンテ
ナ(1)に受信されたRF倍信号、RF増幅回路(2)
で増幅され、混合回路(4)で局部発振回路(5)の出
力信号と混合され、IF倍信号周波数変換される。45
0 KHzの周波数を有するIF倍信号、IF増幅回路
(6)で増幅された後、検波回路(8)で検波され、低
周波信号となって後段に伝送される。その際、受信信号
の電界強度に応じてRFAGC回路(3)及びIFAG
C回路(7)が動作し、利得制御が行なわれる。
An AM radio receiver including the RF and I FAGC circuits is shown in FIG. In Figure 2, the RF multiplied signal received by the antenna (1), the RF amplification circuit (2)
The signal is amplified by the mixing circuit (4), mixed with the output signal of the local oscillation circuit (5), and subjected to IF times signal frequency conversion. 45
The IF multiplied signal having a frequency of 0 KHz is amplified by the IF amplifier circuit (6), then detected by the detection circuit (8), and transmitted to the subsequent stage as a low frequency signal. At that time, depending on the electric field strength of the received signal, the RFAGC circuit (3) and the IFAG circuit
The C circuit (7) operates to perform gain control.

第2図の如きAMラジオ受信機は、昭和60年3月20
日付でCQ出出版上り発行された「′85三洋半導体ハ
ンドブックモノリシックバイボーラ集積回路」編第82
頁に記載されている。
The AM radio receiver as shown in Figure 2 was installed on March 20, 1985.
"'85 Sanyo Semiconductor Handbook Monolithic Bibolar Integrated Circuits" edition No. 82, published by CQ Publishing on the date
It is written on the page.

(ハ)発明が解決しようとする問題点 ところで、最近のAMラジオ受信機においてはAGCF
OMと呼ばれる特性が重要視されている。AGCFOM
とは、アンテナ入力が74dBμの標準入力と、該標準
入力時の出力レベルよりも10dB低下した出力が得ら
れる時の入力レベルとの幅を示し、その幅が広い程、弱
電界受信時の出力信号レベルをAGCレベル近傍に保つ
ことが出来、安定な出力信号を得ることが出来る。前記
ACCFOMの幅を広げる為には、チューナのトータル
ゲインを高く設定すれば良い。しかしながらそうすると
、無信号時におけるノイズや信号離調時におけるノイズ
が増大するという問題がある。
(c) Problems to be solved by the invention By the way, in recent AM radio receivers, AGCF
A characteristic called OM is considered important. AGCFOM
indicates the width between the standard input of the antenna input of 74 dBμ and the input level at which an output that is 10 dB lower than the output level at the standard input is obtained, and the wider the width, the lower the output when receiving a weak electric field. The signal level can be kept close to the AGC level, and a stable output signal can be obtained. In order to widen the width of the ACCFOM, the total gain of the tuner may be set high. However, if this is done, there is a problem that noise when there is no signal and noise when the signal is detuned increases.

そこで、一般にはノイズレベルとAGCFOMの幅との
妥協点を見い出しその特性を決定している。その様子を
第3図に示す。第3図において横軸はアンテナへの入力
信号レベルを示し、縦軸は出力信号のレベルを示してい
る。第3図実線aは従来、一般に用いられる入出力特性
を示している。図から明らかな様に実線aではAGCF
OMの幅がA、と比較的狭く、弱電界において安定な出
力信号を得ることが出来ない。そこで、チューナのトー
タルゲインを高く設定すれば、その特性は第3図実線す
の如くなり弱電界においても出力信号レベルをAGCレ
ベル近傍に保つことが出来る。
Therefore, in general, a compromise between the noise level and the width of the AGCFOM is found and its characteristics are determined. The situation is shown in Figure 3. In FIG. 3, the horizontal axis indicates the input signal level to the antenna, and the vertical axis indicates the output signal level. A solid line a in FIG. 3 shows input/output characteristics commonly used in the past. As is clear from the figure, in solid line a, AGCF
The width of the OM is A, which is relatively narrow, and a stable output signal cannot be obtained in a weak electric field. Therefore, if the total gain of the tuner is set high, its characteristics will become as shown by the solid line in FIG. 3, and the output signal level can be maintained near the AGC level even in a weak electric field.

ところで、第3図において一点鎖1aa及びbは、実線
a及びbの出力信号に対応するノイズレベルをそれぞれ
示しているが実線のbの如き特性にすると、そのノイズ
レベルが一点鎖線すの如くなり、弱電界及び無信号時に
おけるノイズレベルが上昇してしまうという欠点がある
By the way, in FIG. 3, the dashed dots 1aa and b indicate the noise levels corresponding to the output signals of the solid lines a and b, respectively.If the characteristics are as shown in the solid line b, the noise level becomes as shown by the dashed dot line. However, there is a drawback that the noise level increases when there is a weak electric field or no signal.

(ニ)問題点を解決するための手段 本発明は上述の点に鑑み成されたもので、混合回路の出
力IF倍信号増幅する第11F増幅回路と、該第11F
増幅回路の出力IF倍信号更に増幅する第2IF増幅回
路と、該第2IF増幅回路の出力IF倍信号検波する検
波回路と、該検波回路の出力信号を平滑する第1平滑回
路と、該第1平滑回路の出力信号に応じて前記第1IF
増幅回路の利得を制御するAGC回路とを備えるラジオ
受信機において、受信信号のレベルを検出する受信信号
レベル検出回路と、該受信信号レベル検出回路の出力信
号を平滑する第2平滑回路と、該第2平滑回路の出力信
号に応じて前記第2IF増幅回路の利得を低減させる利
得低減回路とを設けたことを特徴とする。
(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and includes an 11th F amplifier circuit for amplifying the output IF signal of the mixing circuit;
a second IF amplifier circuit that further amplifies the output IF multiplied signal of the amplifier circuit; a detection circuit that detects the output IF multiplied signal of the second IF amplifier circuit; a first smoothing circuit that smoothes the output signal of the detection circuit; The first IF according to the output signal of the smoothing circuit.
A radio receiver including an AGC circuit that controls the gain of an amplifier circuit, a received signal level detection circuit that detects the level of a received signal, a second smoothing circuit that smoothes an output signal of the received signal level detection circuit, and a second smoothing circuit that smoothes an output signal of the received signal level detection circuit. The present invention is characterized by further comprising a gain reduction circuit that reduces the gain of the second IF amplifier circuit in accordance with the output signal of the second smoothing circuit.

(ホ)作用 本発明に依れば受信信号が所定レベル以下になると第2
IF増幅回路の利得を低下させているので、前記所定レ
ベル以下の弱電界及び無信号時におけるノイズを低減き
せることが出来る。
(E) Effect According to the present invention, when the received signal falls below a predetermined level, the second
Since the gain of the IF amplifier circuit is lowered, it is possible to reduce noise in a weak electric field below the predetermined level and when there is no signal.

(へ)実施例 第1図は、本発明の一実施例を示す回路図で、(9)は
混合回路(4)からのIF倍信号増幅する第1IF増幅
回路、(10)は第1IF増幅回路(9)で増幅された
IF倍信号更に増幅する第21F増幅回路、(11)は
第2IF増幅回路(10)の出力IF倍信号検波する検
波回路、(12)は前記検波回路(11)の出力信号を
平滑する第1平滑回路、(13)は前記第1平滑回路(
12)の出力信号に応じて前記第1IF増幅回路(9)
の利得を制御する第1AGC回路、(14)は混合回路
(4)からのIF倍信号レベルを検出する受信信号レベ
ル検出回路、(15)は前記受信信号レベル検出回路(
14)の出力信号を平滑する第2平滑回路、及び(16
)は前記第2平滑回路(15)の出力信号に応じて前記
第2IF増幅回路(10)の利得を低減させる利得低減
回路である。第1図において、混合回路(4)より前段
の回路構成は第2図と同様であるので省略し、又第2図
と同一の回路素子については同一の符号を付しその説明
を省略する。尚、第1図におけるトータルゲインは、第
3図の実線すの場合と同様高く設定されている。
(v) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which (9) is a first IF amplification circuit that amplifies the IF multiplied signal from the mixing circuit (4), and (10) is a first IF amplification circuit. A 21st F amplifier circuit further amplifies the IF multiplied signal amplified by the circuit (9), (11) a detection circuit that detects the output IF multiplied signal of the second IF amplification circuit (10), and (12) the detection circuit (11). (13) is a first smoothing circuit that smoothes the output signal of the first smoothing circuit (13).
12) according to the output signal of the first IF amplifier circuit (9).
(14) is a received signal level detection circuit that detects the IF multiplied signal level from the mixing circuit (4); (15) is the received signal level detection circuit (
a second smoothing circuit for smoothing the output signal of (14); and (16)
) is a gain reduction circuit that reduces the gain of the second IF amplifier circuit (10) according to the output signal of the second smoothing circuit (15). In FIG. 1, the circuit configuration before the mixing circuit (4) is the same as that in FIG. 2, and will therefore be omitted, and circuit elements that are the same as those in FIG. Incidentally, the total gain in FIG. 1 is set high as in the case of the solid line in FIG. 3.

次に動作について説明する。混合回路(4)からのIF
倍信号、第1及び第2IF増幅回路(9)及び(10)
で増幅された後、検波回路(11)で検波され出力端子
(17)に導出される。一方、混合回路(4)からのI
F倍信号、受信信号レベル検出回路(14)に印加され
、そのレベルが検出される。そして、前記レベルに応じ
た出力信号が第2平滑回路(15)で平滑され、その出
力信号でシグナルメータ(31)が駆動される。この場
合において、その入力信号レベルが第3図の点Xのそれ
より大きい場合、検波回路(11)の出力信号は第1平
滑回路(12)で平滑された後、第1AGC回路(13
)に印加される。すると、第1AGC回路(13)は、
平滑された前記出力信号に応じて第1IF増幅回路(9
)の利得を制御する。一方、第2平滑回路(15)の出
力信号は利得低減回路(16)に印加きれる。すると、
利得低減回路(16)は不動作となり、第21F増幅回
路(10)は所定の利得で増幅を行なう。
Next, the operation will be explained. IF from mixed circuit (4)
Double signal, first and second IF amplifier circuits (9) and (10)
After being amplified, the signal is detected by a detection circuit (11) and output to an output terminal (17). On the other hand, I from the mixing circuit (4)
The F-fold signal is applied to the received signal level detection circuit (14), and its level is detected. Then, the output signal corresponding to the level is smoothed by a second smoothing circuit (15), and the signal meter (31) is driven by the output signal. In this case, if the input signal level is higher than that at point X in FIG.
) is applied to Then, the first AGC circuit (13)
The first IF amplifier circuit (9) responds to the smoothed output signal.
) controls the gain. On the other hand, the output signal of the second smoothing circuit (15) can be applied to the gain reduction circuit (16). Then,
The gain reduction circuit (16) becomes inactive, and the 21F amplifier circuit (10) performs amplification with a predetermined gain.

従って、第1図の回路は、第2図と同一の動作を行なう
ことが出来る。
Therefore, the circuit of FIG. 1 can perform the same operation as that of FIG. 2.

次に電界強度が第3図の点Xより低くなった場合につい
て説明する。この場合も検波回路(11)の出力信号が
第1平滑回路(12)で平滑された後、第1 AGC回
路(13)に印加される。しかし、前記平滑回路(12
)の出力電圧のレベルが低い為第1AGC回路(13)
は動作せず、第1IF増幅回路(9)は所定の利得で増
幅を行なう。一方、第2平滑回路(15)の出力信号が
利得低減回路(16)に印加きれるが、利得低減回路(
16)は前述の場合と同様に不動作となり、第21F増
幅回路(10)は所定の利得で増幅を行なう。
Next, a case where the electric field strength becomes lower than point X in FIG. 3 will be explained. In this case as well, the output signal of the detection circuit (11) is smoothed by the first smoothing circuit (12) and then applied to the first AGC circuit (13). However, the smoothing circuit (12
) since the level of the output voltage is low, the first AGC circuit (13)
does not operate, and the first IF amplifier circuit (9) performs amplification with a predetermined gain. On the other hand, although the output signal of the second smoothing circuit (15) is completely applied to the gain reduction circuit (16), the gain reduction circuit (
16) is inoperative as in the above case, and the 21F amplifier circuit (10) performs amplification with a predetermined gain.

従って、混合回路(4)からのIF倍信号十分に増幅す
ることが出来、AGCFOMを広げることが出来る。
Therefore, the IF multiplied signal from the mixing circuit (4) can be sufficiently amplified, and the AGCFOM can be expanded.

更に電界強度が第3図の点yより低下した場合について
説明する。この場合も前述の場合と同様に第1AGC回
路(13)は、不動作となり第11F増幅回路(9)は
所定の利得で増幅を行なう。一方、第2平滑回路(15
)の出力信号が利得低減回路(16)に印加されるが、
この際、利得低減回路(16)は前記出力信号に応じて
第2IF増幅回路(10)の利得を低下させる。
Further, a case where the electric field strength decreases from point y in FIG. 3 will be explained. In this case as well, the first AGC circuit (13) is inoperative and the 11F amplifier circuit (9) performs amplification with a predetermined gain, as in the case described above. On the other hand, the second smoothing circuit (15
) is applied to the gain reduction circuit (16),
At this time, the gain reduction circuit (16) reduces the gain of the second IF amplifier circuit (10) according to the output signal.

従って、混合回路(4)からのIF倍信号対するトータ
ルゲインが低下し、それによってノイズを低減させるこ
とが出来る。上述の特性は、第3図Cの実線の如く示さ
れる。すなわち、点Xから点yまでの電界強度において
は、IF増幅回路が所定の利得で増幅を行なうので、A
GCFOMをA。
Therefore, the total gain for the IF multiplied signal from the mixing circuit (4) is reduced, thereby making it possible to reduce noise. The above-mentioned characteristics are shown as solid lines in FIG. 3C. That is, in the electric field strength from point X to point y, the IF amplification circuit performs amplification with a predetermined gain, so A
A for GCFOM.

の如く広げることが出来、点y以下の電界強度になると
、IF増幅回路の利得を低下させているので、一点鎖線
Cの如くノイズを低減させることが出来る。
When the electric field strength becomes below point y, the gain of the IF amplifier circuit is reduced, so that the noise can be reduced as shown by the dashed line C.

第4図は、第1図の具体回路例を示す回路図で、第11
F増幅回路(9)からのIF倍信号、差動型の第21F
増幅回路(10)で増幅され、トランジスタ(18)の
コレクタからトランジスタ(19)を介して検波回路(
11)に印加きれ検波される。ここで、前記出力信号は
抵抗(20)及びコンデンサ(21)から成る第1平滑
回路(耳)で平滑され、その出力信号が第1AGC回路
(13)に印加される。そして、第1AGC回路(13
)は前記出力信号に応じて第11F増幅回路(9)の利
得を制御する。この状態において、混合回路(4)から
発生したIF倍信号、受信信号レベル検出回路(14)
に印加され、そのレベルが検出される。そして、前記レ
ベルに応じた出力信号が抵抗(22)及びコンデンサ(
23)から成る第2平滑回路(廷)で平滑され、利得低
減回路(16)内のトランジスタ(24)のベースに印
加され、基準電源(25)の基準電圧と比較される。こ
こで、今電界強度が第3図の点yより大きいとすると、
第2平滑回路(長)の出力電圧は、前記基準電圧より大
となり、トランジスタ(26)がオフとなる。その為、
トランジスタ(28)もオフとなり、第2IF増幅回路
(10)は所定の利得で増幅を行なう。
FIG. 4 is a circuit diagram showing a specific example of the circuit shown in FIG.
IF multiplied signal from F amplifier circuit (9), differential type 21st F
It is amplified by the amplifier circuit (10) and sent from the collector of the transistor (18) to the detection circuit (
11) is applied and detected. Here, the output signal is smoothed by a first smoothing circuit (ear) consisting of a resistor (20) and a capacitor (21), and the output signal is applied to the first AGC circuit (13). Then, the first AGC circuit (13
) controls the gain of the 11th F amplifier circuit (9) according to the output signal. In this state, the IF multiplied signal generated from the mixing circuit (4) and the received signal level detection circuit (14)
is applied and its level is detected. Then, the output signal corresponding to the level is transmitted to the resistor (22) and the capacitor (
The voltage is smoothed by a second smoothing circuit (23), which is applied to the base of the transistor (24) in the gain reduction circuit (16), and compared with the reference voltage of the reference power supply (25). Now, assuming that the electric field strength is greater than point y in Figure 3,
The output voltage of the second smoothing circuit (long) becomes higher than the reference voltage, and the transistor (26) is turned off. For that reason,
The transistor (28) is also turned off, and the second IF amplifier circuit (10) performs amplification with a predetermined gain.

又、電界強度が第3図の点yより小となると、第2平滑
回路(15)の出力電圧は、前記基準電圧より小となり
、両型圧の差に応じた電流が、トランジスタ(26)及
びダイオード(27)を流れるようになりそれと等しい
電流がトランジスタ(28)に流れるようになる。する
と、第2IF増幅回路(1o)内の共振子(毅)のQが
低下しその利得が低減する。
Moreover, when the electric field strength becomes smaller than point y in FIG. The current flows through the diode (27) and the same current flows through the transistor (28). Then, the Q of the resonator (Ki) in the second IF amplifier circuit (1o) decreases, and its gain decreases.

それ故、基準電源(25)の基準電圧を適当に設定すれ
ばノイズの低減が計れるとともにAGCFOMを広げる
ことが出来、第3図Cの如き特性を得ることが出来る。
Therefore, by appropriately setting the reference voltage of the reference power source (25), it is possible to reduce noise and widen the AGCFOM, thereby obtaining the characteristics shown in FIG. 3C.

(ト)発明の効果 以上述べた如く、本発明によれば受信信号が所定レベル
以下に低下すると第21F増幅回路の利得を低下させて
いるので、前記所定レベル以下の弱電界及び無信号時に
おけるノイズの低減を計ることが出来る。又、本発明に
よれば、前記所定レベル以上の信号を受信している時に
は第2IF増幅回路自体の利得で増幅を行なっているの
で、十分にIF侶号を増幅することが出来、AGCFO
Mの拡大を計ることが出来る。更に、実施例の如くSメ
ータ出力は、利得低減回路が動作しても変化はないので
自動同調時の受信感度にも影舌を与えずかつ実用感度へ
の影響もない。
(G) Effects of the Invention As described above, according to the present invention, when the received signal falls below a predetermined level, the gain of the 21F amplifier circuit is reduced, so that when a weak electric field is below the predetermined level and there is no signal, It is possible to measure noise reduction. Further, according to the present invention, when a signal of the predetermined level or higher is being received, amplification is performed using the gain of the second IF amplification circuit itself, so that the IF signal can be sufficiently amplified, and the AGCFO
It is possible to measure the expansion of M. Furthermore, as in the embodiment, the S meter output does not change even if the gain reduction circuit operates, so it does not affect the reception sensitivity during automatic tuning and has no effect on practical sensitivity.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例を示す回路図、第2図は従
来のラジオ受信機を示す回路図、第3図は本発明の説明
に供する為の特性図及び第4図は第1図の具体叩路例を
示す回路図である。 (9)・・・第1IF増幅回路、 (10)・・・第2
IF増幅回路、 (11)・・・検波回路、 (12)
・・・第1平滑回路、 (13)・・・第1AGC回路
、 (14)・・・受信信号レベル検出回路、 (15
)・・・第2平滑回路、 (16)・・・利得低減回路
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional radio receiver, FIG. 3 is a characteristic diagram for explaining the present invention, and FIG. 4 is a circuit diagram showing a conventional radio receiver. FIG. 2 is a circuit diagram showing a specific example of the hitting path shown in FIG. 1; (9)...First IF amplifier circuit, (10)...Second
IF amplifier circuit, (11)...detection circuit, (12)
...first smoothing circuit, (13) ...first AGC circuit, (14) ...received signal level detection circuit, (15
)...second smoothing circuit, (16)...gain reduction circuit.

Claims (1)

【特許請求の範囲】[Claims] (1)混合回路の出力IF信号を増幅する第1IF増幅
回路と、該第1IF増幅回路の出力IF信号を更に増幅
する第2IF増幅回路と、該第2IF増幅回路の出力I
F信号を検波する検波回路と、該検波回路の出力信号を
平滑する第1平滑回路と、該第1平滑回路の出力信号に
応じて前記第1IF増幅回路の利得を制御するAGC回
路とを備えるラジオ受信機において、受信信号のレベル
を検出する受信信号レベル検出回路と、該受信信号レベ
ル検出回路の出力信号を平滑する第2平滑回路と、該第
2平滑回路の出力信号に応じて前記第2IF増幅回路の
利得を低減させる利得低減回路とを設けたことを特徴と
するラジオ受信機。
(1) A first IF amplifier circuit that amplifies the output IF signal of the mixing circuit, a second IF amplifier circuit that further amplifies the output IF signal of the first IF amplifier circuit, and an output I of the second IF amplifier circuit.
A detection circuit that detects the F signal, a first smoothing circuit that smoothes the output signal of the detection circuit, and an AGC circuit that controls the gain of the first IF amplifier circuit according to the output signal of the first smoothing circuit. In a radio receiver, a received signal level detection circuit detects the level of a received signal, a second smoothing circuit smoothes an output signal of the received signal level detection circuit, and a second smoothing circuit that smoothes an output signal of the second smoothing circuit. A radio receiver comprising a gain reduction circuit that reduces the gain of a 2IF amplifier circuit.
JP9557587A 1987-04-17 1987-04-17 Radio receiver Pending JPS63260308A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9557587A JPS63260308A (en) 1987-04-17 1987-04-17 Radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9557587A JPS63260308A (en) 1987-04-17 1987-04-17 Radio receiver

Publications (1)

Publication Number Publication Date
JPS63260308A true JPS63260308A (en) 1988-10-27

Family

ID=14141388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9557587A Pending JPS63260308A (en) 1987-04-17 1987-04-17 Radio receiver

Country Status (1)

Country Link
JP (1) JPS63260308A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002151984A (en) * 2000-11-13 2002-05-24 Asahi Kasei Microsystems Kk Variable gain amplifier

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5652310B2 (en) * 1976-07-30 1981-12-11

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5652310B2 (en) * 1976-07-30 1981-12-11

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002151984A (en) * 2000-11-13 2002-05-24 Asahi Kasei Microsystems Kk Variable gain amplifier

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