JPS63258039A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to provide a flat-surfaced deep isolation region with small stress by a method wherein the recessed part formed on a substrate is filled up by reflowing low melting point silicate glass, and after unnecessary silicate glass has been removed, a cap insulating film is formed on the silicate glass left in the recessed part. CONSTITUTION:A multilayered film, consisting of a nitride film 2 and a polycrystalline semiconductor film 3, is deposited on a semiconductor substrate 1, said multilayered film is selectively etched into the prescribed width, and at the same time, a recessed part 10 of the prescribed width and depth is provided in the substrate 1. Then, a thermally oxided film 51 is formed on the sidewall and the bottom face of the recessed part 10, a low melting point silicate glass 6 is deposited in one half of the prescribed width above-mentioned or in the prescribed depth above-mentioned or more. Then, the silicate glass 6 on the multilayered film is removed by performing overall etching on the silicate glass 6, and at the same time, the silicate glass is left in the recessed part 10 in the thickness less than the depth of the recessed part 10. Then, an insulating film 7 is deposited, and after the upper surface of the insulating film 7 in the recessed part 10 has been brought in the same level as the surface of the substrate 1 or more in thickness, a surface flattening film is deposited thereon, and an etching back is performed until the polycrystalline film 3 is exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing isolation regions of semiconductor devices, particularly integrated circuits.

[Summary of the invention]

The method of manufacturing a minute 1 jill fil area according to the present invention is as follows:
A recess is formed in the substrate using the o1y/SiN polyN film as a mask, and the recess is filled with siligate glass such as PSG or BPSG. A cap insulating film is formed on silicate glass. Deep isolation regions can be provided with low stresses and yet with flat surfaces.

[Conventional technology]

The conventional #region is the so-called LOGOS using selective oxidation.
(Loaf Oxidation or Si) was exclusively used. However, LOGOS has limitations in miniaturization of the isolation region due to the presence of bird's beaks, and also has protrusions on the substrate surface that are about half the thickness of the selective oxide film, which also poses problems in terms of microfabrication. On the other hand, recently there has been a trench isolation method in which deep grooves are dug, but this method is advantageous for narrow isolations but disadvantageous for wide isolations.

[Problem that the invention seeks to solve]

The present invention provides a method for manufacturing a separation region that can be applied to any separation width and has a substantially flat surface.

[Means for solving problems]

The manufacturing method of the minute MSN region according to the present invention includes a first step of depositing at least a PolySi/SiN multilayer film on a substrate, selectively etching the multilayer film to a predetermined width, and forming a recess to a predetermined depth in the substrate. A second step of forming a thermal oxide film on the side walls and bottom of the recess, a third step of forming a thermal oxide film on the side walls and bottom of the recess, and
A fourth step of depositing the material to a thickness equal to or more than half the width of the recess or the depth of the recess, and reflowing the psc by heat treatment;
A fifth step of etching the entire surface of the PSG to remove unnecessary PSG on the multilayer film and leaving the PSG in the recess to a thickness less than the depth of the recess, and depositing an insulating film so that the upper surface of the insulating film in the recess is a sixth step of making the thickness at least flush with the substrate surface, depositing a surface flattening film, and depositing at least the poly
The process consists of a seventh step in which an etch bank is performed until the Si film is exposed, and an eighth step in which the polySi/SiN is removed to expose the substrate surface. A channel cut fiI region can be formed in the substrate at the bottom of the recess after the second or third step. Further, a coated insulating film such as SOG can also serve as the insulating film and the surface flattening film.

[Effect]

In the fourth step, the PSG glue flow fills the recesses and makes the surface almost flat. If the PSG is etched in the fifth step, the PSG on the multilayer film can be removed, and the PSG can be etched into the recess.
can be left behind. Similarly, in the seventh step, it is possible to leave the insulating film in the recess.

PSG is used as an example of a reflow insulating film, but BSG
.

Low melting point silicate glasses such as BPSG and ^aSG can be used. Autodoping of impurities from these siligate glasses into the substrate is prevented by a thermal oxide film on the bottom surface of the recess and an insulating film on the upper surface of the recess.

〔Example〕

The present invention will be explained in detail below using the drawings.

(11 First embodiment [Fig. 1 + al to (h)] Fig. 1 (M
l~(hl is the manufacturing method of the first embodiment of the present invention. M'
It is shown as a process cross-sectional view of the 611 area. Figure 1 (Al is, for example, a nitride film (SiN) on an n-type S+5 plate l from the bottom layer.
2. This is a cross section in which a polyN film made of a polycrystalline Si film (polySi) 3 is provided. polySi3. SiN2
are, for example, 0.3 μm and 0.1 μm, respectively. It is un. In Fig. 1 fbl, an opening is made in the resist 4 in the width of the separation 9I region in a mask process, and this resist 4 is used as a mask to form poly3/
After etching the SiN2 multilayer film, a recess 1 is formed in the substrate 1.
FIG. This series of steps can be performed by anisotropic etching such as reactive ion etching (RIB). For example, the recess 10 has a width of 1.5 μm and a depth of 1 μm. If necessary, a p-type head region 11 is formed at the bottom of the recess 10 by ion implantation. In FIG. 1C, after the resist 4 is removed, thermal oxidation 11151 is formed on the sidewalls and bottom of the recessed portion 1O, and at the same time, an oxide film 53 is grown on the polySi3. It is sufficient that the thickness of the oxide film 51 is 0.2 μm or more.

Figure 1 (dl is BPSG 6 as silicate glass)
Figure 1 shows the reflowed state. The thickness of the BPSG 6 is enough to fill the recess 10, and in this example, it is more than half the width (0.8 μm). When the width is more than twice the depth, Br'SG 6 is deposited more than the thickness.

Reflow is done at a temperature of 900℃ or higher, and BPSG 6
surface becomes sufficiently flat. Figure 1 (') is BPSG 6
The state is shown in which BPSG 6 is left in the recess 10 by etching back the entire surface. Etch back is plasma etch or III
E etc., and the thickness of the remaining BPSG 6 is the recess 1o.
(in this example, 1.0 μm or less).

FIG. 1 (gl is a state in which an insulating film 7 such as SiO□ is deposited by CVD or the like. The thickness of the insulating film 7 is such that the upper surface of the insulating film 7 in the recess 10 is higher than the height of the surface of the substrate 1, BPSG
It needs to be thick enough to mask impurities from 6, and in this example it is 0.2 μm or more. After this, a surface flattening film such as a resist is deposited, and the surface flattening film and the insulating film 7 are deposited.
Figure 1 +h shows the state in which the
It is l. This etchback was performed until at least poly2 was exposed, and in this example, 5il12 was exposed. After this, SiN2 is removed to expose the substrate 1, and a gate oxide film, for example, is formed.

P-type? ■Formation of region 11, as shown in FIG.
For example, a P-well may be provided in front.

(2) Second embodiment [Fig. 2 (al to (d))] Fig. 2 (a
) to (dl show the second embodiment of the present invention.

Figure 2 (al and (bl) correspond to fbl and (C1 in Figure 1, so their explanations are omitted. 5OG (spin on glass)
) is applied. Figure 2 (dl shows the state where SoG was etched and banked, and the etch bank was performed until poly3 was exposed. After this, poly3.SiN
2 can be easily removed and the substrate 1 can be exposed. However, SiN
If the second etch is just etched or the insulating film 7 is not etched again after the surface of the substrate 1 is exposed, the overlap between the insulating film 7 and SiN2 will remain as an overhang of the insulating film v7.

(3) Third embodiment [Fig. 3 (al to (d)] Fig. 3 (a)
Figure 3 (δ) corresponds to Figure 1 (bl). A film 21 is laid down. Fig. 3 (bl shows a state in which only SiN2 is side-etched with phosphoric acid, etc., and the end of SiN2 is positioned inside the poly3 end and the side wall of the recess 10. C
1 is oxide II grown on the substrate 1 in a thermally oxidized state 5
The oxide film 53 grown on the bottom surface of poly3 and SiN2
The end is shown covered. Fig. 3 fd+ is Fig. 1 (h
This is a cross section corresponding to i or fdl in FIG. Regardless of the presence or absence of the thin oxide film 21, according to this step, even if poly3 and SiN2 are removed after the insulating film 7 is etched, the filling area between the exposed surface of the substrate 1 and the oxide film 51 will not become inverted tapered. That is, the above-mentioned problems regarding post-treatment of the fdl shown in FIG. 2 can be solved.

〔Effect of the invention〕

The present invention has been described above in detail, but since the silicate glass that fills the recess generally has low stress with Si, it is possible to suppress the occurrence of defects due to the formation of the isolation region.

Furthermore, even in the manufacture of ICs having various widths, isolation regions with flat surfaces can be formed by making the thickness of the siligate glass greater than the depth of the recess. The present invention is a MOS.

It can be applied not only to CMO5 (bipolar IC separation), but also to semiconductor ICs other than Si.

[Brief explanation of the drawing]

1 fa) to fhl are step-by-step sectional views according to the isolation region forming method according to the first embodiment of the present invention, and FIG.
Figures +a) to fdl are enlarged cross-sectional views of the third embodiment of the present invention. 1...Si substrate 2...SiN film 3...poly Si film 4...resist 6...Siligate glass 7... ... Insulating film lO ... Concavity 11 ... P layer region 21.51.53 ... Oxide film or more Present invention ^Yu I (precedent 14) Atsugaki 7J, A? Sappaku inner view 87

Claims (4)

[Claims] (1) A first step of sequentially depositing a multilayer film consisting of a nitride film and a polycrystalline semiconductor film on a semiconductor substrate from at least the bottom side, selectively etching the multilayer film to a predetermined width using a mask step, and etching the multilayer film to a predetermined width within the substrate. a second step of forming a recess with the predetermined width and a predetermined depth; a third step of forming a thermal oxide film on at least the side walls and bottom of the recess; and a half of the predetermined width of the low melting point silicate glass. Alternatively, a fourth step of depositing the siligate glass to a thickness equal to or greater than the predetermined depth and reflowing the siligate glass by heat treatment; etching the entire surface of the siligate glass to remove the siligate glass on the multilayer film; a fifth step of leaving the insulating film in the recess at a thickness equal to or less than the depth of the recess; and a sixth step of depositing an insulating film so that the upper surface of the insulating film in the recess is at least flush with the surface of the substrate. a seventh step of depositing a surface flattening film and etching back until at least the polycrystalline film is exposed; and an eighth step of removing the polycrystalline film and the nitride film to expose the substrate surface. A method for manufacturing a semiconductor device. (2) The semiconductor device according to claim 1, further comprising the step of selectively adding impurities into the substrate at the bottom of the recess after the second step or the third step. Production method. (3) Claim 1 or 2, characterized in that a coated insulating film serves as the insulating film and the surface flattening film.
A method for manufacturing a semiconductor device according to section 1. (4) In the second step, the end portion of the nitride film is located inside the polycrystalline film and the sidewall of the recess, and in the third step, the end portion of the nitride film is located under the thermal oxide film on the substrate and the polycrystalline film. 4. A method of manufacturing a semiconductor device according to claim 1, wherein the thermal oxide films on the sides are connected to each other.