JPS63240680A - Image extension processing circuit - Google Patents

Abstract

PURPOSE:To accelerate the operation of the extension processing of the content in an image memory device by operating a simple extension circuit, a luminance decision circuit and a level conversion circuit in a pipeline system. CONSTITUTION:An image is stored as the set of picture elements in a memory device 2 which has the two areas of an original image area 23 and an extension image area 24. By an image extension circuit 1, the image is read out in nine picture elements unit from the original image area 23 with a 3X3 window including the adjacent periphery of the picture element to be processed while sequentially moving the window. Then by the simple extension processing circuit 40, the luminance decision processing circuit 50 and the level conversion processing circuit 60 which are connected in the pipeline system, the processing of the picture element is executed in a window unit and the processed picture element is sequentially written in the extension image area 24 of the memory device 2. The image in the respective areas is read out in a picture element unit and displayed on a display device 3B.

Description

[Detailed Description of the Invention] [(Installation)] The present invention provides a method for changing, modifying, and modifying images in an image processing system.
The present invention relates to an image processing circuit that performs enlargement, etc., and particularly relates to a circuit that executes image enlargement processing and associated image brightness determination at high speed.

[Industrial application field]

There are image processing systems that input images from television cameras, video tape recorders, etc., perform processing such as correction and enlargement, and output the results as displays, prints, etc., such as computer graphs. It is widely used for processing output images of inks, meteorological satellites, medical X-ray v devices, etc.

BACKGROUND ART In recent years, as the performance of devices has improved, there has been a demand for shorter processing times, and the need for faster image processing devices has increased.

[Conventional technology]

When an image is enlarged and displayed in an image processing system, the enlarged image is created by inserting multiple new pixels between each pixel of the original image. When inserted, unnatural contour-like brightness differences may occur on the enlarged screen. In order to prevent this and generate images with smooth brightness changes, each pixel is averaged by applying a "weight" to the brightness of neighboring pixels and performing a sum-of-products operation. It needs to be executed every time. The details of this calculation process will be explained in the embodiment section of the present invention, but since the product-sum calculation is necessary for all pixels of the enlarged image, m
To enlarge ×n times, at least m×n times the total number of pixels of the original image.
This requires a large number of calculations, resulting in an enormous amount of processing time.

FIG. 4 shows a schematic configuration example of a conventional image enlargement processing circuit. The storage device 2 stores images in pixel units, and stores brightness, color, etc. in each pixel as data of about 8 to 16 bits per word. ing. Both the original image and the enlarged image are stored in separate areas, and the human output of the storage device 2 is connected to a write bus 31 and a read bus 32, and the simple enlargement circuit 4 and the A determining circuit 5, a level converting circuit 6, and a display device 3 are connected.

This circuit receives commands from a control device (not shown), and each circuit uses the well-known direct memory access method (DM^
) to operate independently. When a command from the control device is received, one pixel is read out from the original image area of the storage device 2, processed, and written to the processed image area.

According to this method, each circuit needs to have an image area for one circuit, and if they are operated simultaneously, there will be competition for the cycle of the t0 device 2, and the lotuses 31 and 32 will become congested. On the contrary, each circuit is operated in sequence, since this leads to a decrease in performance.

For example, first, the control device starts the simple enlarging circuit 4 by instructing the enlargement ratio m x n and the X and Y coordinates of the range to be enlarged in the original image. The simple enlargement circuit 4 reads out pixels from the original image area, enlarges them to an m×n range, writes them to the processed image area, and notifies the control device when the processing of the specified range is completed, and the control device performs the next processing. A similar command is given to the brightness determining circuit 5 to execute the process. In this way, the ;) circuits each proceed with their processing in sequence.

In such a system, the control device and each circuit usually use a program control system using a high-speed microprocessor.

Here, if the original image is composed of a total number of P pixels, if this is multiplied by m×n, the number of pixels is p x rn x
Ω, and since three circuits use two storage cycles to read and write, the time required to process a full pixel cannot be less than P x m x n x 3 x 2 times the cycle time. In addition, if a program control method using a microprocessor is adopted, even more time is required. Therefore, even if a high-speed memory element is used, the processing time will be long.

For example, the 6
When multiplying an image composed of 00 x 400 pixels by 4 x 4, even if the cycle time of the storage device is 100 nS, the result is 600 x 400 x 100 x 4 x 4 x
3 x 2 x 10-9 = 2.3 (seconds), which is several times longer than this in practice, so a time of 5 to 10 seconds is required.

[Problem that the invention seeks to solve]

As explained above, in a conventional image enlargement processing circuit, each circuit that makes up the circuit performs processing independently and serially in time, so as the original image becomes more precise, the number of constituent pixels increases. Accordingly, the processing time becomes enormous, and there is a demand for its reduction.

[Means for solving problems]

As a means to solve the problems of the conventional image enlargement processing circuits as described above, the present invention uses an image enlargement processing circuit whose principle is shown in FIG.

The image is stored in the storage device 2 as a collection of pixels. Furthermore, the storage device 2 has an area for storing the original image to be enlarged and an area for storing the enlarged image.

Images in each area of the storage device 2 are sequentially read out pixel by pixel by the display device 3 and displayed on a CRT screen.

The image enlargement processing circuit 1 extracts 9 pixels from the original image area of the storage device 2 by a 3×3 window including the adjacent periphery of the pixel to be processed.
The window is sequentially moved and read out in units of pixels.

In the image enlargement processing circuit 1, a simple enlargement circuit 4, a brightness determination circuit 5, and a level conversion circuit 6 are connected in a pipeline manner, and perform pixel processing on a window-by-window basis. The processed pixels are sequentially written into the processed image area of the storage device 2.

[Effect]

The image enlargement processing circuit 1 can achieve high-speed processing by processing pixels in units of windows using a pipeline method.

(Embodiment) Fig. 2 shows an embodiment of the image enlargement processing circuit according to the present invention.The image enlargement processing device 1 selects nine adjacent pixels around the pixel to be processed from the original image area 23 of the storage device 2. A 3×3 area containing the data is simultaneously read out and processed as a window.

The order of execution of image enlargement processing will be explained with reference to FIG. FIG. 3 (8) shows a method of extracting an image to be processed from the original image. If the pixel to be processed from dirt is ■, then the 3×3 pixels including its adjacent pixels ■～■ are
The area surrounded by dotted lines is defined as a window. The image enlargement processing circuit 1 sequentially scans and reads out the original image area 23 in the storage device 2 using such a window using an address circuit (not shown), and reads out the original image area 23 in the storage device 2 using an address circuit (not shown), and reads out the original image area 23 in the simple enlargement processing circuit 40. Load into a circuit 4I. Win 1- moves one pixel to the right or left when the processing of one pixel is completed, so it actually moves 1 pixel.
There is no need to read 9 pixels at a time, and once ■ in Figure 3 (A) is processed, next, for example, ■ is processed, so next pixel 3 to the right of each pixel in ■, ■, ■ is processed. It is sufficient to read out the pixels and rearrange them in the buffer storage circuit 41 centering on the pixel ■. This can be done with a simple shift scan.

The window stored in the buffer storage circuit 41 is multiplied by m×n in size by the simple expansion circuit 40 and is stored in the expansion buffer storage circuit 51. The examples shown in FIGS. 3(8) to 3(B) are examples of multiplying by 2×2. Practically speaking, if the enlargement buffer storage circuit 51 has one each of the surrounding pixels (2) to (4), the brightness determination calculation described below can be executed, so there is no need to store rrlXn of each of them in this manner.

In the next brightness determination processing circuit 50, the pixel ■ is expanded to m×n.
The brightness of each pixel in the window is compared to that of the adjacent pixel ~
■Determined based on the relationship with. This is essentially an operation equivalent to taking a weighted average of adjacent pixels, and there are various methods, but one example will be given here.

The brightness of each pixel in the original image is indicated by ■ to ■, and the calculation result is indicated by ■. ~■3 indicates.

■. -4×■ ■, -2×■+2×■ ■2-2×■+2×■ ■3-■+■+■-to■ The result of this calculation is sent to the brightness determination buffer circuit 61 as shown in FIG.
C). This operation is performed sequentially as the window moves, and the operations performed here are constant multiplication and repetition of addition.

The brightness of the contents of the brightness determination buffer circuit 61 completed here is all multiplied by m×n, but the accuracy is reduced if the lower digits are truncated during the calculation, so this is a means to prevent this. be.

In the next level conversion processing circuit 60, as an operation to correct the luminance multiplied by m×0 as described above, the luminance determination buffer 6
The pixels within 1 are sequentially read out pixel by pixel, divided by mXn, returned to normal values, and written into the enlarged image area 24.

The enlarged image area 24 or the original image area 23 is read out by the display control device 38 according to an operator's selection, and displayed on the CRT display device 3B by TV scanning.

All of the above operations are executed using the breadface set signal 71 from the timing signal generation circuit 70 and the processing clock 72. The buffer sent signal 71 is a pulse that sets input data to the buffer sofa 41, 51, 61 of each processing circuit, and the processing clock 72 is a clock for executing internal calculations of each processing circuit. 4～
Make it 16 times faster. By doing this, the original image f
The windows read out from the Jn area 23 are processed one after another and completed as an enlarged image in the enlarged image area 24.

In this circuit, the buffer circuit only needs to have the length of the window, and a high-speed memory circuit of a small star can be used, so it can be said to be a suitable application example of the pipeline system, in addition to the simplicity of calculation.

〔Effect of the invention〕

By carrying out the present invention, it has become possible to realize a means for quickly executing calculations for enlarging the contents of an image recording tα device.

[Brief explanation of drawings]

FIG. 1 is a principle diagram of an image enlargement processing circuit according to the present invention. FIG. 2 shows an embodiment of an image enlargement processing circuit according to the present invention. Figure 3 shows the execution order of image enlargement processing. FIG. 4 shows a conventional image enlargement processing circuit. In the figure, ■Image enlargement processing circuit, 2 is a storage device 3 is a display device; 4 is a simple expansion circuit, 5 is a brightness determining circuit; 6 is a level conversion circuit; 41.51J1 is a buffer storage circuit, 70 is a timing signal generation circuit; 7I is a buffer cent signal, 72 is a processing clock.

Claims (1)

[Scope of Claims] A storage device (2) that stores an image consisting of a set of a plurality of pixels having multilevel luminance, and a display device that displays the image stored in the storage device (2) on a CRT screen. (3); and an image enlargement processing circuit (1) that performs arithmetic processing on the image in the storage device (2) on a pixel-by-pixel basis to change, modify, enlarge, etc. the image; The image processing circuit (1) includes a simple enlargement circuit (4) that enlarges the image by m×n times, and a product-sum operation on the luminance of each pixel of the enlarged image and the pixels around it to calculate the value of each pixel. It consists of a brightness determining circuit (5) that determines the brightness, and a level converting circuit (6) that performs constant integration on the pixels whose brightness has been determined, and the pixel processing in the image processing circuit (1) is as follows: , an image enlargement processing circuit characterized in that the image enlargement processing circuit is executed in units of windows cut out in a size of 3×3 from a pixel set of an original image, and the above three circuits operate in a pipeline system.