JPS63237393A - Discharge lamp lighter - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a discharge lamp lighting device for parallel lighting using a single-stage separately excited inverter circuit.

(Background Art) A zero lighting circuit 10, a conventional example of which is shown in FIG. 9, includes a rectifying and smoothing circuit that rectifies and smoothes an alternating current power supply AC and converts it into a direct current voltage, and an inverter circuit that converts this direct current voltage into a high frequency voltage. The discharge lamps DL, DL2 are lit in parallel using a high frequency voltage. The discharge lamps DL, DL2 are connected in parallel via a balancer BT, and preheating capacitors C, , C are connected in parallel on the non-power side of the discharge lamps DL, DL2, respectively.

The detection circuit 11 detects the number of discharge lamps DL, DL, installed. The control circuit 12 controls the oscillation of the inverter circuit in the lighting circuit 10 according to the detection result by the detection circuit 11. In this conventional example, each discharge lamp D L
Current transformers CT, CT2 are provided to detect the current flowing through the current transformers CT+, CT2, and the mounting state of the discharge lamp is detected by the voltage induced on the secondary side of the current transformers CT+, CT2. Control is performed according to the mounting state of the discharge lamp. in particular,
If voltage is induced on the secondary side of both current transformers CT, CT2, two lamps are installed, and if voltage is induced in only one of them, one lamp is installed.
The mounting state of the discharge lamp is detected by the voltage induced on the secondary side of the current transformers CT, CT2, such as a no-load state if no voltage is induced in either of them. However, in this conventional example, in order to detect the current flowing through the discharge lamps DL, DL1, current transformers CT, , C
T2 is required, the detection circuit is expensive, and the device is large.

FIG. 10 shows another conventional example. In this conventional example,
Resistors r, +'ffi are connected in series to the discharge lamps D L, , D L,. When the discharge lamps D L and D L t are turned on, a current that is a combination of the filament current and the lamp current flows through the resistor rl+'2, and a voltage is generated across the resistor rl+rl. The detection method is the same as the previous conventional example, with two resistors rl+r! 2 if voltage is generated at both
If a voltage is generated in only one resistor, it is determined that a lamp is attached. If no voltage is generated in either resistor, it is determined that a no-load condition is established.

However, in the case of this method, when the discharge lamps DL, DL, are lit, a composite current of the filament current and the lamp current flows through the resistor r, 2, and a considerably large amount of power is generated by the resistor. It has the disadvantage of incurring losses.

(Object of the invention) The present invention has been made in view of the above points, and
The purpose is to provide a discharge lamp lighting device that can detect the number of discharge lamps connected in parallel with low loss, with a simple and inexpensive configuration, and can perform control according to the number of lamps. be.

(Disclosure of the Invention) The discharge lamp lighting device according to the present invention will be described with reference to the embodiment shown in FIG.
In a single-stone separately excited inverter circuit 1 that lights up in parallel via T, an element voltage detection circuit 2 detects the voltage VC generated across the main switch element (transistor T'1).
and a negative back discrimination circuit that discriminates the mounting state of the plurality of discharge lamps DL + and DL 1 based on the detection outputs of the balancer voltage detection circuit 3 that detects the voltage generated in the balancer BT and the 5-car detection circuit 2.3. 4.

As described above, the present invention provides a discharge lamp lighting device for parallel lighting using a single-stage separately excited inverter circuit, in which a change in the mounting state of the discharge lamp changes the voltage across the main switch element in the inverter circuit and the voltage of the balancer. This appearance is used to determine the installed state of the discharge lamp.

Examples of the present invention will be described below.

K1 craftsmanship I2I is a circuit diagram of an embodiment of the present invention.

The t source voltage of the AC power source AC is rectified by the diode bridge DB, smoothed by the capacitor C0, and made into a DC voltage. This DC voltage is! Discharge lamps D L I and D L 2 are connected in parallel to the secondary side of the six oscillating transistors, which are applied to the series circuit of the primary side of the e-oscillating transformer OT and the transistor Trl, via the capacitor C1 and the balancer BT. , each discharge lamp DL,.

There is an actance element (capacitor C) on the non-power side of DL.
,,C,) are connected to form a discharge lamp filament preheating circuit. For the transistor Tr.

Diode D1 is connected in antiparallel. Further, a capacitor C1 that resonates with the inductance component of the circuit is connected in parallel to both ends of the transistor Tr. The position where this capacitor C5 is connected is 1 of the oscillation transformer OT.
It does not matter if it is at both ends of the next coil.

The transistor Tr is turned on and off by the output of the control circuit 5. When the transistor T r + is turned on, current flows through the primary side of the oscillation transformer OT.

When the transistor Tr is turned off, the oscillating transformer OT resonates with the capacitor C1 due to the energy stored in the LC component of the circuit, a resonant capacitor current flows, and the common FRTi pressure is applied across the transistor Tr. arise.

When this resonance voltage becomes zero, the resonance ':4 current flows through the diode D, and when the diode current becomes zero, the separately excited signal causes a current to flow through the transistor Tr+ as in the previous cycle. In this way, one oscillation continues, and the voltage generated on the secondary side of the oscillation transformer OT due to this resonance is passed through the oscillation transformer OT, the cage inductance, and the capacitor C2 to the discharge lamp D L
+, DL2 is applied to turn on 1 light.

Balancer BT, when one discharge lamp lights up.

Due to the unbalance of the current flowing through each winding, a high voltage is applied to the other discharge lamp, making it possible for both lamps to stably light.When both lamps are lit, each winding The currents flowing through the lines are almost the same, and the balancer BT has almost no inductance component. Also, when only one lamp is installed, the balancer BT acts as an inductance component.

The balancer BT is provided with a detection winding.

The balancer voltage detection circuit 3 detects the voltage generated in the balancer BT by detecting the induced voltage in the detection winding of the balancer BT. The voltage generated across the transistor Tr is detected by the element voltage detection circuit 2. The load determination circuit 4 determines the connection state of the discharge lamps D L r and D L 2 based on the detection outputs of these two detection circuits 2 and 3 . The control circuit 5 separately excites the transistor Trl based on the determination result in the load determination circuit 4.

In such a single-stone separately excited type inverter circuit, when there is no load or when one lamp is lit, the oscillation period of the load becomes long and the width of the voltage VCH across the transistor Trl becomes wide. Also,
When one lamp is lit, a voltage is generated across the balancer BT. Therefore, the load discrimination circuit 4 uses the transistor Tr
When the width of the + terminal voltage ■cε becomes wider, when the voltage across the balancer BT is large, it is determined that one lamp is lit, and when the voltage across the balancer BT is small, it is determined that there is no load, transistor Tr,
The voltage across both ends of vcI! If the width is narrow, it is determined that two lights are on.

K1 Takumi 1 FIG. 2 is a circuit diagram of another embodiment of the present invention.

This embodiment is a more specific embodiment of the embodiment shown in FIG. 1, and the element voltage detection circuit 2 uses a voltage dividing circuit including resistors R1 and R2. A Zener diode Z for regulating the output of the element voltage detection circuit 2 is connected to the resistor R2.
D+ are connected in parallel.

A detection output of the element voltage detection circuit 2 (hereinafter referred to as "vcE detection signal") is connected to one input of an AND gate G. The output of the separately excited signal generation circuit 6 is connected to the other input of the AND gate G1. This separately excited signal generation circuit 6 includes a transistor Trl in the control circuit 5.
It generates the same signal as the passive signal generated to control on/off.

The detection winding of balancer BT is connected to capacitor C6 via diode D2 and resistor R5.

The capacitor Cs includes a resistor R1 and a Zener diode 2D2.
are connected in parallel. The voltage developed across capacitor C2 is applied to the non-inverting input terminal of comparator CP. The control unit power supply voltage Vec is divided by a series circuit of resistors Rs and R*, and is applied as a reference voltage to the inverting input terminal of the comparator CP1. Comparator C
The output of P1 is input to the control circuit 5 as the output of the balancer voltage detection circuit 3. This control circuit 5
It also functions as the load discrimination circuit 4 in the circuit shown in the figure.

FIG. 3 is an operational waveform diagram of this embodiment. The operation of this embodiment will be described below with reference to the same figure. first,
The waveform width of the element voltage ■cE when two lamps are installed is “
Although it is set to fall within the “Low” level period,
When one lamp is installed, the inductance of the balancer BT is inserted in series with the discharge lamp, so the vibration period of the load becomes longer and the waveform of the element voltage VCH becomes wider. In such a case, due to the design of the balancer BT, etc., vcIl! There are cases where the detection signal and the passive signal overlap and cases where they do not overlap.

In the former case, the AND output of the VCE detection signal and the passive signal by the AND gate G+ becomes a pulse output, and in the latter case, the AND output remains at the "Low" level.

In addition, in a no-load state, the secondary current of the oscillation transformer OT stops flowing, so its primary inductance increases, and therefore the element voltage VC determined by the capacitor C2 and the inductance seen from the primary side of the oscillation transformer OT
The waveform width of a is further expanded, and the VCE detection signal and separately excited signal always overlap each other, and the AND output of these two signals becomes a pulse output.

When the two lights are on, the balancer BT has almost no inductance, so only a small voltage is generated in the detection winding, and the voltage at the non-inverting input terminal of the comparator c P + is lower than the reference voltage at the inverting input terminal. Therefore, the output of comparator CP becomes LO-" level. Also, in no-load state, no current flows through balancer BT, so
No voltage is generated in the detection winding, and the output of comparator CP1 becomes "Los" level. However, when one lamp is lit, the balancer BT has an inductance, and a large voltage is generated in its detection winding. Therefore, the voltage at the non-inverting input terminal of the comparator CP+ becomes higher than the voltage at the inverting input terminal, and the output of the comparator CP becomes "Hi".
gh” level.Discharge lamp DL.

The input and output of the comparator CP1 in each state of DLi are shown in the fourth (21).

The output of the comparator CP+ allows one lamp lighting state to be distinguished from other states. This signal is also sent to the control circuit 5. Discharge lamp DL 5. AND output of the VCE detection signal and separately excited signal in each state of D and L1, and
FIG. 5 shows the waveform of the output of comparator CP1.

These two signals make it possible to distinguish between two lights on, one light on, and a no-load state. That is, the AND output of the vce detection signal and the separately excited signal is a pulse signal, and when the output of the comparator CPI is "Low" level, there is no load, and when the AND output is "Los" level, the comparator C
When the PI output is at 'High+N' level, one light is on, and when both signals are at 'Low' level, two lights are on.
It can be determined that the light is on.

Although it does not specify how to determine the load condition of the discharge lamp and perform specific control, for example,
If a two-lamp lighting state is detected, the control continues as it is. In addition, when one lamp lighting condition is detected, two lamps are lit.
Since the light output is lower than when the lamp is on, it may be possible to control the light output to increase it. Furthermore, when a no-load condition is detected, the output of the control circuit 5 is changed to °'L.
Inverter times W@ by lowering to OS level
Control such as stopping the oscillation of 1 is also conceivable. .

In addition, in the above explanation, when one lamp is lit, vcε
Even if the AND output of the detection signal and the passive signal becomes a "Low" level, or even if this AND output becomes a pulse output, it should be determined by combining it with the comparator cp and i outputs in the balancer voltage detection circuit 3. It is clear that it is possible to distinguish between a two-lamp lighting state, a one-lamp lighting state, and a no-load state.

6 is a circuit diagram of still another embodiment of the present invention. In this embodiment, when starting the discharge lamps DL, DL,
In a discharge lamp lighting device having a control circuit 5 that gradually lowers the oscillation frequency of the inverter circuit 1 and gradually increases its output voltage, the discharge lamps DL, DL2 are turned on at a certain frequency. In addition to the load state detection function, a single lighting detection function is added, and during dimming, the lighting is performed at the frequency at which lighting is detected. In general, in a discharge lamp lighting device that has a dimming function, the gas pressure and component constants of the discharge lamp vary by %'sL2. may be difficult to maintain. In such a case, when starting the discharge lamp, the lighting detection circuit 7 memorizes the frequency at which the discharge lamp was turned on, and when dimming, set the frequency to this frequency, so that dimming can be maintained. becomes.

The lighting detection operation in the case where two lamps are installed in this embodiment will be explained below. Balancer voltage detection circuit 3 in each load state
The input and output waveforms of the comparator CP are the same as those shown in FIG. 4 described above. Discharge lamp D
When both L and DL lights are lit, balancer B
Since T has almost no inductance and only a small voltage is generated in its detection winding, the comparator CP
.

The output of is at "Low" level. However, discharge lamp D
When L,, DL, lights up, two discharge lamps DL,
, because there is a slight time difference between the lighting of DL2, the 70th
As shown in , a large voltage is temporarily generated in the balancer BT, and the voltage at the non-inverting input terminal of the comparator CP becomes higher than the voltage at the inverting input terminal.
The output of the comparator CPI goes to the 'Higb' level.When both lamps are lit, the output of the comparator CPI goes to the 'L' level.
ow"" level.

In this way, when lighting with two lamps installed, only one pulse is output from the comparator CP1.

Therefore, by detecting this pulse, lighting detection becomes possible. In addition, whether or not the two lamps are lit,
As mentioned above, it can be known from the output of the AND gate G1 and the output of the comparator CP.

K1 craftsman FIG. 8 is a circuit diagram of another embodiment of the present invention.

This embodiment is a discharge lamp lighting device using a three-lamp parallel lighting method. The discharge lamps DL2 and DL are connected in parallel via the balancer BT2, and this parallel circuit and the discharge lamp DL
, and are connected in parallel via a balancer B T +. The detection winding is provided only in one balancer BT1. Note that a capacitor C6 for supplying preheating current is connected in parallel to the non-power supply side of the discharge lamp DL. The other configurations are the same as the embodiment shown in FIG.

Comparator CP in balancer voltage detection circuit 3
+ output state layer is "Low" level when three lamps are on or no load, and becomes 'Higb' level when one or two lamps are on.VCE detection signal and separate excitation in each load condition The AND output with the signal and the comparator output are shown in Table 1. However, here, we will deal with the case where the AND output of the vcE detection signal and separately excited signal becomes a pulse output only in a no-load state.

As is clear from Table 1, when both the AND output and the comparator output are at the "Low" level, 3 lights are on, and when the AND output is at the "Low" level and the comparator output is at the "High" level, 1 light is on. Or, when two lights are on, the AND output is a pulse output and the comparator output is “Lo”.
It is possible to determine the loaded state, such as when it is at the "Wisdom" level, it is in a no-load state.

Although it is not specified what kind of control is to be performed by determining the load state of the discharge lamp, it is conceivable that the same control as in the case of the discharge lamp lighting device for two lamps described above may be performed. .

(Effects of the Invention) In the present invention, as described above, in the discharge lamp lighting device for parallel lighting using a single-stone separately excited inverter circuit,
The mounting state of the discharge lamp is determined by utilizing the fact that a change in the mounting state of the discharge lamp appears in the voltage across the main switch element in the inverter circuit and the voltage of the balancer. It is easier and cheaper to use Jll imaginary than that of Jll. In addition, since the element snow pressure can be detected using the Raisho fin resistance, high resistance can be used.
Therefore, compared to the conventional example using a current detection resistor, there is an effect that the number of lamps can be detected with lower loss.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of one embodiment of the present invention, Fig. 2 is a circuit diagram of another embodiment of the invention, Fig. 3 is an operation waveform diagram of the same as above, and Fig. 4 is a circuit diagram of another embodiment of the invention.
5 and 5 are explanatory diagrams of the same operation as above, FIG. 6 is a circuit diagram of still another embodiment of the present invention, and FIG. 7 is an operation waveform diagram of the same as above,
FIG. 8 is a circuit diagram of another embodiment of the present invention, FIG. 9 is a circuit diagram of a conventional example, and FIG. 10 is a circuit diagram of another conventional example. 1 is an inverter circuit, 2 is an element voltage detection circuit, 3 is a balancer voltage detection circuit, 4 is a load discrimination circuit, BT is a balancer, DL, DL2 is a discharge lamp, and Tr. is a transistor.

Claims (1)

[Claims] (1) In a single-stone separately excited inverter circuit that lights multiple discharge lamps in parallel via a balancer, an element voltage detection circuit that detects the voltage generated across the main switch element;
A discharge lamp lighting device comprising: a balancer voltage detection circuit that detects a voltage generated in a balancer; and a discrimination circuit that discriminates the mounting state of a plurality of discharge lamps based on detection outputs of both detection circuits.