JPS63234705A - Differential amplifier - Google Patents
Differential amplifierInfo
- Publication number
- JPS63234705A JPS63234705A JP6930187A JP6930187A JPS63234705A JP S63234705 A JPS63234705 A JP S63234705A JP 6930187 A JP6930187 A JP 6930187A JP 6930187 A JP6930187 A JP 6930187A JP S63234705 A JPS63234705 A JP S63234705A
- Authority
- JP
- Japan
- Prior art keywords
- differential amplifier
- threshold voltage
- fet
- resistance
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 claims description 12
- 230000003321 amplification Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、電界効果型トランジスタを利用した差動増幅
器に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a differential amplifier using field effect transistors.
従来の技術
化合物半導体、就中、ガリウム・ヒ素(GaAs)を基
体とする半導体装置は、電界効果型トランジスタが注目
の回路要素であり、シジットキー接合ゲートを界効果型
トランジスタ(以下、MESFICTと略称する)が差
動増幅器に使用されている。従来、MKSFET を用
いた差動増幅器は、第3図に示されるような回路構成が
知られており、差動対構成の第1.第2の1llcsF
ET1.2に対して、負荷図面筒3.第4のMKSFE
T3,4が、それぞれ、自己のソース、ゲートを共通接
続して、抵抗要素として結合されたものである。なお、
差動対のMKSFICTl 、 2の共通ソースに結合
された第6のMKSFKTsおよび抵抗6は電流源回路
構成要素である。Conventional technology In semiconductor devices based on compound semiconductors, especially gallium arsenide (GaAs), field-effect transistors are the most notable circuit element, and the sysget-key junction gate is used as a field-effect transistor (hereinafter abbreviated as MESFICT). ) are used in differential amplifiers. Conventionally, a differential amplifier using MKSFET has been known to have a circuit configuration as shown in FIG. Second 1llcsF
For ET1.2, load drawing cylinder 3. 4th MKSFE
T3 and T4 are connected as a resistance element by connecting their sources and gates in common. In addition,
The differential pair MKSFICTl, the sixth MKSFKTs coupled to the common source of 2 and the resistor 6 are current source circuit components.
発明が解決しようとする問題点
第3図示の従来例の回路構成によると、MKSFETに
電流が流れるようにするためには、回路構成上、しきい
値電圧が零電位付近のMKSFET でないと最適な電
流が流れない。また負荷として用いたMKSFET の
等価抵抗値が小さくなってしまうという欠点がある。し
きい値電圧は、プロセスの影響により大きくばらつき、
ウェハ内でしきい値電圧が零電位付近のMESFICT
を全面にわたって作ることは困難である。このため、
従来の回路構成では、ウェハ全面にわたって、増幅機能
の同じMIC8FET を形成することができず、集
積回路を構成したときに特性がばらつくという問題点を
もっていた。Problems to be Solved by the Invention According to the conventional circuit configuration shown in Figure 3, in order for current to flow through the MKSFET, the MKSFET must have a threshold voltage near zero potential due to the circuit configuration. No current flows. Another drawback is that the equivalent resistance value of the MKSFET used as a load becomes small. Threshold voltage varies widely due to process effects,
MESFICT whose threshold voltage is near zero potential within the wafer
It is difficult to create this over the entire surface. For this reason,
In the conventional circuit configuration, it was not possible to form MIC8FETs with the same amplification function over the entire surface of the wafer, and there was a problem that the characteristics varied when an integrated circuit was constructed.
本発明は上述の問題を解消し得る回路構成を提供するも
のである。The present invention provides a circuit configuration that can solve the above-mentioned problems.
問題点を解決するための手段
本発明は、差動対構成の第1.第2の電界効果型トラン
ジスタの各ドレインと第1電源との間に、それぞれ、ソ
ース側に直列抵抗を有し、その抵抗端をゲートに接続し
た第3.第4の電界効果トランジスタをそなえた差動増
幅器である。Means for Solving the Problems The present invention provides the first . The third field-effect transistor has a series resistor on the source side between each drain of the second field-effect transistor and the first power supply, and the resistor end is connected to the gate. This is a differential amplifier equipped with a fourth field effect transistor.
作用。Action.
本発明によると、差動増幅器を構成している電界効果型
トランジスタがそのしきい値電圧の広い範囲で動作可能
になる。According to the present invention, field effect transistors forming a differential amplifier can operate over a wide range of threshold voltages.
実施例
本発明の実施例回路構成を第1図に示す。この実施例構
成では、負荷用MIC5FIET3.4のソース側に、
それぞれ、直列抵抗7,8が接続され、各ゲートはこれ
らの抵抗端からバイアスが印加される構成になっている
。MKSFET を流れる電流をl05g、ソース側に
直列に接続される抵抗をR3とするとゲートバイアスは
ソース源の電位よシI、88・Rs だけ低い電位と
なる。従って、MIESFETの動作可能なしきい値電
圧は−よりR8・R8から0まで取り得る事が出来る。Embodiment A circuit configuration of an embodiment of the present invention is shown in FIG. In this embodiment configuration, on the source side of the load MIC5FIET3.4,
Series resistors 7 and 8 are connected to each gate, and a bias is applied to each gate from the terminals of these resistors. Assuming that the current flowing through the MKSFET is 105g and the resistor connected in series on the source side is R3, the gate bias becomes a potential lower than the potential of the source source by I, 88·Rs. Therefore, the operable threshold voltage of the MIESFET can range from - to R8/R8 to 0.
たトエば、I、、、=1nム、R5=600Ω とする
と動作可能なしきい値電圧は、−〇、6〜Ovという範
囲になる。第2図に本発明の実施例回路の特性を実線で
示し、併せて、従来例の特性を破線で示す。横軸にしき
′い値電圧、縦軸に増幅度をとっている。図に示される
様、本発明の効果が確認できる。For example, if I, . . . = 1 nm and R5 = 600Ω, the operable threshold voltage will be in the range of −0.6 to Ov. In FIG. 2, the characteristics of the circuit according to the embodiment of the present invention are shown by solid lines, and the characteristics of the conventional example are shown by broken lines. The horizontal axis shows the threshold voltage, and the vertical axis shows the amplification degree. As shown in the figure, the effects of the present invention can be confirmed.
なお、実施例では、増幅度をQdB以上にとったが、増
$1110dBのデジタル用の差動アンプであってもよ
い。In the embodiment, the amplification degree is set to be QdB or more, but a digital differential amplifier with an increase of $1110 dB may be used.
発明の効果
本発明によれば、MIESFETのしきい値電圧にばら
つきがあってもその広い範囲で、差動増幅器を構成して
十分に動作する。したがって、MKSFETは拡散プロ
セスでしきい値電圧がばらついても高い歩留で動作可能
な差動アンプが得られるという効果が奏される。Effects of the Invention According to the present invention, even if the threshold voltages of MIESFETs vary, a differential amplifier can be configured and operate satisfactorily over a wide range. Therefore, the MKSFET has the effect of providing a differential amplifier that can operate with high yield even if the threshold voltage varies due to the diffusion process.
第1図は本発明の実施例構成の回路図、第2図は同実施
例構成の特性図、第3図は従来例構成の回路図である。
1〜5・・・・・・MESFICT 、 e〜8・・・
・・・抵抗。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a characteristic diagram of the embodiment, and FIG. 3 is a circuit diagram of a conventional structure. 1~5...MESFICT, e~8...
···resistance. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
figure
Claims (1)
ドレインと第1電源との間に、それぞれ、ソース側に直
列抵抗を有し、その抵抗端をゲートに接続した第3、第
4の電界効果トランジスタをそなえた差動増幅器。A third field-effect transistor having a series resistance on the source side is connected between the drain of the first field-effect transistor and the second field-effect transistor having the differential pair configuration and the first power supply, and a third field-effect transistor having a resistor end connected to the gate. A differential amplifier equipped with 4 field effect transistors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6930187A JPS63234705A (en) | 1987-03-24 | 1987-03-24 | Differential amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6930187A JPS63234705A (en) | 1987-03-24 | 1987-03-24 | Differential amplifier |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63234705A true JPS63234705A (en) | 1988-09-30 |
Family
ID=13398607
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6930187A Pending JPS63234705A (en) | 1987-03-24 | 1987-03-24 | Differential amplifier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63234705A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0720296A3 (en) * | 1994-12-26 | 1997-04-16 | Oki Electric Ind Co Ltd | Buffer circuit and bias circuit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5168753A (en) * | 1974-12-11 | 1976-06-14 | Sansui Electric Co | fet baiasukairo |
JPS61129920A (en) * | 1984-11-29 | 1986-06-17 | Sony Corp | Semiconductor circuit device |
-
1987
- 1987-03-24 JP JP6930187A patent/JPS63234705A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5168753A (en) * | 1974-12-11 | 1976-06-14 | Sansui Electric Co | fet baiasukairo |
JPS61129920A (en) * | 1984-11-29 | 1986-06-17 | Sony Corp | Semiconductor circuit device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0720296A3 (en) * | 1994-12-26 | 1997-04-16 | Oki Electric Ind Co Ltd | Buffer circuit and bias circuit |
US5739719A (en) * | 1994-12-26 | 1998-04-14 | Oki Electric Industry Co., Ltd. | Bias circuit with low sensitivity to threshold variations |
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