JPS6323444A - Automatic transmission speed adjusting system for digital communication - Google Patents

Abstract

PURPOSE:To automatically adjust the data transmission speed to that corresponding to the reception quality by controlling the clock frequency of a clock pulse generated at a sender side in response to the reception quality measured by a receiving side continuously so as to apply automatic adjustment to the transmission band width of a digital filter continuously variably. CONSTITUTION:A table representing the characteristic between a bit error rate and a transmission speed ratio is obtained in advance, its characteristic data is stored in a speed setting circuit 12, the transmission speed is decided in response to the measuring result of a reception quality check circuit 2 to give a command to an opposite station. The receiving side is provided with a switching command identification circuit 4 identifying the speed switching command requested from a sending station from the output signal of a digital demodulator 10 and the frequency of the clock pulse of the clock generator 9 is changed in response to the command of the circuit 4. Thus, the transmission speed of the sender is changed continuously in response to the deteriorated state of the signal quality and adjusted to an optimum value, then the communication efficiency and economy are improved.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to digital communications, and particularly to a transmission rate switching system for digital communications that changes the transmission rate on the transmitting side depending on the signal quality result on the receiving side.

(Prior art and its problems) Digital communications such as data and facsimile are generally performed at a transmission speed suitable for the characteristics of the transmission path from the viewpoint of transmission efficiency and economy. However, the characteristics of the transmission path are not always constant; in particular, in wireless lines, space is used as the transmission path medium, so the propagation conditions of the space change depending on the size. Therefore, if communication is performed at a high speed as initially set even though the characteristics of the transmission path have deteriorated, the probability of errors in received data increases and communication efficiency decreases. Therefore, conventionally, the receiving station measures the signal quality, and depending on the deterioration of the signal quality, selects a specific speed from among multiple transmission speeds predetermined by the transmitting and receiving stations to improve communication efficiency. There is.

FIG. 1 is a schematic diagram of a conventional transmission rate switching system, where 1 indicates a rate a at a transmitting station X and a receiving station Y.

a multi-speed modem capable of switching to multiple speeds of b, c, ---1i (lower speed as it goes from speed a to speed i);
2 is the bit error rate of the received signal at receiving station Y (hereinafter,
3 is a multi-speed modem 1 based on the determination result of the reception quality verification circuit 2;
A speed switching command circuit 4 determines which speed is optimal among speeds a, b, ---, i, and instructs the transmitting station X to use the determined speed; 4 is a speed switching command circuit 3 in the transmitting station A switching command identification circuit 5 and 6 is a transmission line connecting the transmitting station X and the receiving station Y.

For example, when the BER measured by the reception quality verification circuit 2 increases and the reception quality deteriorates, the speed switching command circuit 3 changes the transmission speed from the current speed a to a lower speed according to the reception quality. sends commands to the transmitting station. When the transmitting station X decodes that the command from the speed switching command circuit 3 is speed b, it issues a control signal to the multispeed modem 1 to switch the transmission speed to b.

In this way, conventionally, the other station (transmitting station) automatically switches to a predetermined transmission rate depending on the reception quality of its own station (receiving station). However, in this conventional method, the multi-speed modem 1 has a speed a=9600 bPS, for example.

Speed b = 7800 bPS, , ---111 speed i
= x2oobps, which is only configured to be able to switch to one of a plurality of predetermined transmission speeds.

That is, these multiple speeds are determined in advance by the modulation/demodulation method of the multi-speed modem 1. However, the transmission path characteristics do not necessarily deteriorate in accordance with the above-described plurality of predetermined speeds, but change in continuous values. Therefore, in the conventional speed switching method, it is difficult to adjust the transmission speed to the optimum transmission speed for reception quality, and there are problems in terms of communication efficiency and economy.

(Objects and Features of the Invention) The present invention has been devised in view of the drawbacks of the prior art described above. The purpose is to provide an automatic transmission speed adjustment method for communication.

A feature of the present invention is that the transmission rate necessary for the reception quality of the reception station to exceed a predetermined standard reception quality is determined, and a command is sent to the transmission station to switch to that transmission rate. The system decodes the command, changes the clock frequency of the clock generator based on the decoding result, and automatically adjusts the transmission speed to an arbitrary transmission rate depending on the reception quality.

(Structure of the invention) The present invention will be described in detail below using the drawings.

FIG. 2 is a block diagram for explaining an embodiment of the transmission rate switching system according to the present invention. Note that components that are the same as those of the prior art are given the same numbers and redundant explanations will be omitted. In addition, in the conventional example shown in Fig. 1, the transmitting station and receiving station were explained separately, but here, in order to clarify the relationship between the modulator and demodulator, one station (transmitting station X in Fig. 1) is explained. The explanation will focus on the transmitted signal and received signal within the receiving station Y).

In the figure, 7 is a memory for temporarily storing the input digital signal and reading it out in synchronization with the repetition frequency of clock pulses from a clock generator 9, which will be described later. 9 is a clock generator that changes the repetition frequency of the clock pulse according to the command of the switching command identification circuit 4 explained in FIG. This is a speed information creation circuit that creates speed information to be transmitted to the partner station based on the determination result, and up to this point has had the function of the transmission side.

On the receiving side, 10 is a digital demodulator for demodulating the modulated received signal, and 4 identifies the speed switching command requested by the transmitting station from the output signal of the digital demodulator 10, as in FIG. switching command identification circuit, 1
1 is a memory for temporarily storing the demodulated digital signal and reading it out in synchronization with the reproduced clock signal; 2 is the first memory;
Similar to the figure, the reception quality verification circuit 12 measures the reception quality from BER, C/N ratio, etc., and 12 determines the transmission speed of the receiving station based on the reception quality result, and sets it, almost the same as in Figure 1. This is a speed setting circuit for sending information to the speed information creation circuit 13 mentioned above.

Figure 3 shows the bit error rate (BER) and E b / when two-phase or four-phase PSK signals are synchronously detected.
The theoretical characteristic diagram with NO is BER and transmission speed ratio (vX/V
. ) is an example converted into a characteristic diagram.

However, E is the energy per 1 bit of the PSK signal at the input of the reception filter, and No is the power density of Gaussian noise at the input of the reception filter. is the standard transmission rate at the standard reception quality (here, the standard BER is 1X10-6), and VX is the transmission rate necessary for the measured reception quality to become the standard reception quality.

Therefore, the speed setting circuit 12 has a characteristic diagram as shown in FIG.
For example, the speed setting circuit 12 sets the BER of the reception quality verification circuit 2 to 1xio-' at a certain point in time.
If so, the standard transmission speed ■. However, the standard transmission speed is approximately 0.815 times the lower value, and if the BER is 5 x 0-4, the standard transmission speed is ■. It is configured to select a transmission speed that is approximately o.72 times lower than that of the transmission speed, and to send the speed ratio to the speed information generation circuit I3.

In this way, a table or the like showing the characteristics of BER and transmission speed ratio is obtained in advance and the characteristic data is stored in the speed setting circuit 12, and the transmission transmission speed is adjusted according to the measurement result of the reception quality verification circuit 2. The difference from the conventional speed switching circuit 3 is that the speed switching circuit 3 determines the speed. That is, in the speed setting circuit 12 used in the present invention, each reception quality and each transmission speed are set to correspond to each other at each point, so that commands can be sent to the partner station.

Next, when the transmission speed (bit rate) changes,
The configurations of the modulator 8 and demodulator 10 that can accommodate continuous changes in transmission speed without replacing the demodulator will be described in more detail.

FIG. 4 is a block diagram of a digital modulator/demodulator according to the present invention, and FIG. 4(a) shows the configuration of the digital modulator, and FIG.
b) shows the configuration of the digital demodulator.

First, in the digital modulator shown in FIG. 4 (al), 20 is the binary N RZ (Non Return
nt.

21 is a D/A converter for converting the digital signal into an analog signal, and 22 is for removing unnecessary waves and extracting only signal components. A low-pass p-wave filter (hereinafter referred to as rLPFJ), 23 is a binary phase shifter (Binary Ph) for phase-shifting a binary signal.
ase 5hift Keytng;hereinafter referred to as “BP
24 is a highly stable oscillator for oscillating a carrier wave with a highly stable frequency, 25 is a bandpass filter (hereinafter referred to as SKJ) for removing unnecessary waves such as harmonic components of the modulation signal.
rBPFJ) from the D/A converter 21 to BP
Up to F25 are normal modulators. Therefore, the following discussion describes how digital filter 20 changes the transmission rate.

As is well known, a digital signal consisting of "1" and "O" has a wide occupied bandwidth (which makes it impossible to construct an efficient communication line. Also, as the occupied bandwidth increases, noise power increases on the receiving side). As a result, the reception C/N decreases, making it difficult to achieve sufficiently good signal quality.For this reason, it is generally recommended to perform waveform shaping using a well-known Nyquist filter to obtain the required bandwidth on the transmitting side. At the same time, a method is used on the receiving side to prevent interference between codes in determining the demodulated signal (“1”, “O”).There are various ways to configure this waveform shaping filter. However, with the recent development of digital technology, it is now possible to construct a filter through digital processing.In the present invention, waveform shaping is performed using a digital filter.

FIG. 5 is a schematic diagram for explaining the operation of a typical digital filter, and 201 is an N multiplication circuit (however,
N is the number of samples per 1 bit of the signal), 202 is a shift register for giving the input signal the required delay time, and 203 is a shift register for each output with a different delay time obtained at each output tap of each shift register 202. Weighting for desired amplitude control (weighting) is a resistance.

In the digital filter, the analog quantity 1 weighting of each tap output is all digitally processed, and each sample value is quantized and the weighting etc. are all digitally processed. Therefore, this output must finally be converted into the original analog quantity by a D/A converter.

Note that 204 is an LPF for removing unnecessary wave components from the output signal of the weighted resistor 203.

Here, if the delay time for a signal to pass between taps is T, then the transfer function of this filter is expressed as follows.

H (ω) = Σ C, e ~ Jre 0...
-----・-(1) C7: Weighting for each tap is amount.

n: tap A predetermined filter characteristic can be achieved by adjusting the number of taps and the tap weight amount from formula (1).

In digital communication, the signals I'' and @Q11 are controlled or transmitted by a clock synchronized with the signal speed.

From this, if the delay amount T per tap of the digital filter is changed, the transmission characteristic of H(ω) will also change accordingly. The form of this change is that each tap is weighted by the amount C7.
If is fixed, the relative shape of the transmission characteristic H(ω) does not change, only the bandwidth of the filter changes.

The present invention uses this principle to configure a modulator that can continuously change the transmission rate without switching the modulator.

Next, in the configuration of the digital demodulator in Figure 4 (bl), 3
0 is a BPF for extracting necessary signals from the IF multiplied signal that is the input signal to the demodulator, 31 is a phase detector for demodulating the BPSK signal by the output from the carrier regeneration circuit 35, which will be described later, and 32 is a wave detector. 31 is an A/D converter used to shape the waveform of the output; 33 is a digital filter that operates in the same way as the digital filter that constitutes the modulator 23; 34 is a clock pulse that is regenerated from the output of the detector 31. 35 is a carrier wave regeneration circuit for regenerating the carrier wave used by the detector for synchronous detection; 36 is a D/A converter for converting the output waveform of the digital filter 33 back into an analog signal. , 37
is an LPF for extracting demodulated signal components.

When the transmission speed is changed, the clock regeneration circuit 34
The clock frequency of the digital filter 33 changes in the same way, and the bandwidth of the digital filter 33 is determined in the same way as the modulator 23, making it possible to follow changes in transmission speed without disconnecting the line.

Next, the operating procedure for changing the transmission rate will be described in more detail.

(1) When requesting a change in transmission rate (for example, assuming receiving station Y in FIG. 1) (2) Measure the reception quality of the output signal of the digital demodulator 10 with the reception quality verification circuit 2.

■If the BER measurement result is, for example, lXl0-' and the reference BER is lXl0-', then the speed setting circuit 1
2, for example, the deterioration of the C/N ratio is 2.1 from the characteristic diagram in Figure 3.
dB (10,5-8,4), the transmission speed is set to be small (both l/1.62 or less (1,62 is an antilogous number of 2.1 dB).

(2) The set transmission speed is converted into a digital signal by the speed information creation circuit 13 and sent to the digital modulator 8.

■The digital modulator 8 modulates the input signal from the memory 7 and the speed information signal from the speed information generation circuit 13 under the control of the clock frequency from the clock generator 9, and modulates the input signal from the memory 7 and the speed information signal from the speed information generation circuit 13,
transmitting station).

(2) When adjusting the transmission transmission speed (for example, assuming transmitting station decipher.

(2) Change the clock frequency of the clock generator 9 according to the decoding result. For example, if the decoding result of the speed information signal from receiving station Y is the aforementioned 1/1.62, the clock frequency is similarly changed to 1/1.62.

(2) When the clock frequency is changed to the above value, the delay amount T of the digital filter 20 in the digital modulator 8 changes, resulting in a transmission characteristic H(ω) determined from equation (1). That is,
The filter bandwidth changes to approximately 1/1.62, and the transmission rate becomes a value obtained by multiplying the current transmission rate by 1/1.62.

As described above, the present invention allows the transmission speed to be changed to any desired speed in response to a request from the other station. Note that even if the reception quality is higher than a certain standard value, the receiving side can always create and send speed information, or the speed information can be set only when the reception quality is below the standard value. It may also be a method of creating information.

In addition, in the above explanation, we talked about the case where the transmission transmission rate is reduced when the measured reception quality deteriorates more than the predetermined standard reception quality, but if the upper and lower limit ranges are set for the standard reception quality, then the measurement It is also possible to reduce the transmission transmission speed as described above when the received reception quality falls below the lower limit standard reception quality, and conversely increase the transmission transmission speed when it exceeds the upper limit standard reception quality. It is. In this way, more effective communication can be achieved by automatically adjusting the transmission transmission rate so that the reception quality is within the upper and lower limits of the reference reception quality.

In addition, in the above explanation, BER was used as an example to measure signal quality, but C/N is not limited to this.
A ratio etc. may also be used. For example, if the C/N ratio deteriorates by 2 dB, the transmission transmission rate may be reduced by about 1/1.58.

(Effects of the Invention) As explained above, the present invention is capable of determining the signal quality of a received signal and continuously changing the transmission speed on the transmitting side according to the deterioration status of the signal quality to adjust it to an optimal value. This makes it possible to improve communication efficiency and economic efficiency, and it can also be applied to e-mail and facsimile communication, which are digital communications, and the effects are extremely large.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a system of a conventional transmission rate switching system, and FIG. Fig. 3 is a characteristic diagram showing the relationship between BER and transmission rate used in the present invention, Fig. 4 is a block diagram showing a configuration example of a digital modulator and a digital demodulator used in the present invention, and Fig. 5 is a characteristic diagram showing the relationship between BER and transmission rate used in the present invention. This is a schematic diagram of the digital filter used in the following.

Claims (1)

[Claims] On the receiving side, a receiving quality measuring means for measuring the receiving quality of the received signal and information indicating a transmission speed at which the measured receiving quality is better than a reference receiving quality inputted in advance are transmitted to the transmitting side. and a speed switching determination means for detecting the determined information, and a clock for outputting a clock pulse whose clock frequency is variable according to the detected command. comprising a pulse generation means, a storage means for reading out the stored input signal in synchronization with the clock frequency, and a digital modulation means incorporating a digital filter whose transmission bandwidth is determined according to the clock frequency, By continuously controlling the clock frequency of the clock pulses generated on the transmitting side according to the reception quality measured on the receiving side, and automatically adjusting the transmission bandwidth of the digital filter in a continuously variable manner. . A digital communication transmission speed automatic adjustment system configured to perform signal transmission at a transmission speed that conforms to the reference reception quality.