JPS63234311A - Voltage transmitting circuit for coordinate reader - Google Patents

Abstract

PURPOSE:To prevent the variance of an induced voltage level by connecting plural 2nd analog switches to the outputs of plural analog block connected to the outputs of plural sense lines. CONSTITUTION:When a coordinate indicator 6 is driven, the voltage is induced on a sense line 7 set close to the indicator 6. The analog switch blocks 2 and 3 are successively selected by a control signal 11 received from a coordinate arithmetic circuit 9 and the internal switches are successively closed. The voltage if induced on the line 7 at this time point is supplied to the circuit 9. If the block 3 is selected under such conditions, an internal switch 14 of an analog switch block 1 corresponding to the block 3 is closed with other internal switches opened respectively. Therefore, the output side of the block 3 is separated from the output side of the block 2 at the inside of the block 1. Thus, the parasitic capacities 4 of blocks 2 and 3 are never connected in parallel with each other. As a result, the influence of the variance of the ON resistance of a switch is reduced to the signals to be transmitted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a coordinate reading device, particularly an analog switch for scanning a sense line.

[Summary of the invention]

In the present invention, the voltage induced on the sense line is the capacitance of the parasitic capacitance of the analog switch Hti! In order to prevent the level from changing due to the large value and variations in the ON resistance of the switch, which would deteriorate the calculation accuracy of the coordinate values,
An additional general analog switch was installed on the output side of the analog switch block connected to each sense line on the coordinate reading plane to separate the signal line from the parasitic capacitance of the analog switch block directly connected to the sense line. .

[Conventional technology]

The prior art will be explained with reference to FIG.

The voltage induced in the sense line 7 is transmitted to the coordinate calculation circuit 9 by closing each switch inside the analog switch blocks 2 and 3, and the coordinate calculation circuit 9 performs coordinate calculation and sends it to the external device 10. Coordinate values are output. At this time, since each switch output inside the analog switch block 2.3 is short-circuited and the output of each block is short-circuited, the parasitic fields pfk4 of many switches are all connected in parallel. was.

As a result, a large amount of capacitance is connected to the transmission line 8, and the impedance due to parasitic capacitance is reduced. On the other hand, there were variations in the ON resistance of the switches, which caused variations in the induced voltage level.

[Problem that the invention seeks to solve]

According to the conventional technology described above, by sharing the output side of each analog switch and the output side of each analog switch block, all the parasitic capacitances of the analog switches are connected in parallel, resulting in a reduction in impedance. Ta. Further, there are variations in the ON resistance of the switches, and the variations directly result in variations in the induced voltage level, which has an adverse effect on the calculation accuracy of coordinate values.

[Means for solving problems]

``Another stage of analog switch was provided for each analog switch block on the output side of a plurality of analog switch blocks having a plurality of analog switches, and the parasitic capacitance of the analog switch was separated for each analog switch block.

[Effect]

Multiple analog switch blocks connected to the sense line and multiple analog switches connected to their output sides are controlled by control signals from the coordinate calculation circuit, and the output side of each of the multiple analog switch blocks connected to the sense line is controlled by the control signal from the coordinate calculation circuit. This prevents parasitic capacitance between analog switch blocks from being connected in parallel, and prevents a drop in impedance caused by parasitic capacitance.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail based on the drawings. Although a large number of analog switches are used in an actual coordinate reading device, in this embodiment, a case will be explained in which two analog switches are used.

FIG. 1 is a block diagram showing one embodiment of the present invention.

When the coordinate indicator 6 is driven by the coil drive circuit 5, a voltage is induced in the sense line 7 near the coordinate indicator. Analog switch block 2.3 is coordinate calculation circuit 9
When the internal switches are sequentially selected by the control signal 11 from the
is transmitted to the coordinate calculation circuit 9. At this time, if the control signal 11 selects the internal switch of the analog switch block 2, only the internal switch 13 corresponding to the analog switch block 2 is closed among the internal switches of the analog switch block 1, and the other internal switches are closed. When the analog switch block 3 is selected, the internal switch 14 corresponding to the analog switch block 3 is closed and the other internal switches are opened. Therefore, the analog switch block l is provided. The output side of the analog switch block 2 and the annular port (the output side of the switch block 3) are separated from each other by the control signal 11. The internal switch of the analog switch block 2 is closed by the control signal 11, and the sense line 7 is closed.
The induced voltage of passes through analog switch block l,
When input to the coordinate calculation circuit 9 through the transmission line 8, the internal switch of the analog switch block 1 is 13
Control signal 11 so that only one is closed and the others are open
controlled by.

Therefore, the output side of the analog switch block 3 is separated from the output side of the analog switch block 2 inside the analog switch block l. Furthermore, when the internal switch of the analog switch block 3 is closed, the internal switch 14 of the analog switch block 1 is closed and the other internal switches are controlled by the control signal 11 to open. It is separated from the output side circuit. In this way, the parasitic capacitance of analog switch block 2 and analog switch block 3 are
The parasitic capacitances of are no longer connected in parallel. For this reason, the impedance due to parasitic capacitance increases, so
Even if there is variation in the ON resistance of the analog switch, the influence of the variation on the transmitted signal is reduced.

In this embodiment, a case has been described in which two analog switch blocks are connected to the sense line, but it goes without saying that even if there are n analog switch blocks, the same operation and effect can be achieved.

〔Effect of the invention〕

As described above, according to the present invention, by separating the parasitic capacitance on the output side for each analog switch block, it is possible to prevent variations in the ON resistance of each analog switch from affecting the transmitted induced voltage. became. Therefore, since the induced voltage level no longer varies, the accuracy of calculating coordinate values has been significantly improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a conventional configuration diagram. 1.2.3...Analog switch pronk 7...
...Sense line 8...Transmission line 9...Coordinate calculation circuit 11...Control signal and above Applicant: Seiko Electronics Co., Ltd. An embodiment of the present invention Tohocho Arrow 77th Ward 1 (2)

Claims (1)

[Claims] A plurality of analogues having a plurality of sense lines that induce an excitation signal from a coil drive circuit and generate an induced voltage, and a first plurality of analog switches connected to the outputs of the plurality of sense lines. A voltage transmission circuit for a coordinate reading device, comprising: a switch block; and a second plurality of analog switches connected to outputs of the plurality of analog switch blocks.