JPS63229750A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To improve photosensitivity, by projecting a part of a dopant layer in the light receiving face of a photodetecting section or a interconnection member connected with the photodetecting section such that it projects into an i-layer region on the light receiving face so as to extend a depletion layer. CONSTITUTION:A part of a P<+> type diffusion layer constituting a gate region 4 is extended along opposite directions like an antenna to form projected diffusion regions 4a and 4b, whereby a depletion layer is extended all over a pixel. The depletion layer thus extended all over the pixel ensures uniform distribution of optical sensitivies and improvement of photosensitivity. Further, since the depletion layer can be extended all over the pixel, leakage to adjacent pixel can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state imaging device with improved photosensitivity.

[Conventional technology]

Conventionally, solid-state imaging devices include COD image sensors using charge-coupled devices such as CCDs, or MOS
) MOS image sensors using transistors are common. Each light receiving section (pixel) of these image sensors is formed of a pn junction photodiode at -C as shown in FIG. In this light-receiving section, electron-hole pairs are generated by light irradiation, but carriers generated within the depletion layer of the pn junction are caused by drift due to the electric field, and carriers generated outside the depletion layer are diffused into the depletion layer. and is stored in the storage capacitor as a signal charge.

In such a light receiving section, during a light receiving operation in which the pn junction is reverse biased, the depletion layer hardly expands, so the n' diffusion layer needs to cover the entire pixel. This is because if the n+ diffusion layer does not cover the entire pixel, carriers generated by light incident on the exposed p eff region will spread by diffusion, but will not reach the point of light incidence on the exposed p eff region and the depletion layer. This is because if the distance becomes equal to or larger than the carrier diffusion length, most of the carriers will disappear before reaching the depletion layer, making it impossible to obtain photosensitivity. Further, when forming the n' diffusion layer on the metal body within the pixel as described above, it is necessary to form the diffusion layer sufficiently thin in order not to reduce the short wavelength sensitivity.

On the other hand, as an image sensor with further improved light sensitivity,
Static induction transistor (StaticInd) in each pixel
A solid-state imaging device using a production transistor (hereinafter abbreviated as SIT) is known. Regarding solid-state imaging devices using such SIT, the present applicant has made many proposals, and a configuration example of one of them will be explained with reference to FIG. 9.

FIG. 9 is a structural diagram of one pixel of the solid-state imaging device, and S
An n-epitaxial layer 2 serving as a channel region is deposited on an n° silicon substrate 1 serving as a drain of the IT. A shallow n' source region 3 is formed in this epitaxial layer N2, which source region 3 is surrounded by a p' gate region 4 in the epitaxial layer II2. A MOS cabassic 5 is formed on the gate HI region 4, and a pulse is supplied via this capacitor 5. When the gate high region 4 is reverse biased, a depletion layer is formed outside the gate high region 4. When light enters the depletion layer and hole-electron pairs are generated, the electrons are swept out to the source 3 and drain regions 1, and the holes are accumulated in the gate region 4. Therefore, the gate potential rises, and the current between the drain and source is modulated by the voltage change, so that a light-dependent amplified signal can be obtained. Note that 6 in FIG. 9 is a separation area for separating each pixel.

In this way, the light receiving section (pixel) consisting of SIT has a gate and
Since the structure is p+-1-n'' between the drain and between the gate and source, the depletion layer expands significantly during light receiving operation, compared to the pn structure light receiving section in the aforementioned MOS or CCD image sensor.

Each pixel is separated by an isolation region 6 made of n0 diffusion isolation or trench isolation formed by embedding a dielectric material, and is separated by an n-ebitaxial layer 2.
The carriers generated by the incident light are diffused and spread, but are reflected (elastically scattered) by the 1iiiIt region 6 as described above, so that they efficiently reach the gate region 4. In addition, the diffusion length of holes determined from the impurity concentration of 4 degrees in the n-epitaxial layer 2 is larger than the diffusion length at the impurity concentration of the light receiving part of the MOS or CCD image sensor, which is advantageous for efficiently collecting photocarriers in the gate region 4. It is.

Furthermore, since most of the n-epitaxial layer of the pixel can be exposed, short wavelength sensitivity is extremely good.

As mentioned above, solid-state imaging devices using SIT as pixels have a p-1-n structure, compared to conventional CCD image sensors with p-n junction pixels.
The depletion layer expands easily and the carrier life is long.

■ Since the separation region is sufficiently deep, optical carriers can be efficiently collected in the GaHff region.

(2) By exposing the n-epitaxial layer, short wavelength sensitivity is extremely good.

It has the following advantages.

In Fig. 10, an A laser (λ-488 nm) focused to a spot diameter of approximately 2 μm is directed onto the pixel surface of a solid-state imaging device using SIT having the planar structure shown in Fig. 1O (B). , ■, ■, ■ is a diagram showing each photosensitivity distribution when scanning along each scanning trajectory indicated by ■. In Fig. 10^, the horizontal axis indicates the position of the pixel in the length direction, and a and b respectively indicate the positions corresponding to the left and right separation areas 6a and 6b in the pixel plane structure diagram of Figure 10 (old), and the first
7 in 0 times) indicates the wiring of the gate capacitor 5.

As shown in the photosensitivity distribution curve in FIG. 10, considerable photosensitivity is obtained even at a point 70 μm away from the gate 6M region.

[Problem that the invention seeks to solve]

By the way, as mentioned above, a solid-state imaging device using SIT, in which the light receiving part has a p-1-n structure and a separation region is provided, has a light receiving part with higher sensitivity than the pn junction light receiving part of a conventional CCD or MOS image sensor. However, as shown in the photosensitivity distribution curve diagram in FIG. 10, the photosensitivity decreases as the distance from the gate region increases.

The present invention provides a p-1-like solid-state imaging device using SIT.
It is an object of the present invention to provide a solid-state imaging device having a pixel structure that can prevent the above-mentioned decrease in photosensitivity in a solid-state imaging device having an n-structured light receiving section.

[Means and actions for solving problems] Conventional SIT
The reason why the photosensitivity of a light-receiving section with a p-1-n structure decreases as it moves away from the gate region, as shown in Diagram 10, is that the depletion layer spreads to that region. This is because there is no

In view of this point, the present invention provides a solid-state imaging device including a light receiving section with a p-1-n structure in which a single layer region is exposed on a part of the light receiving surface. A part of the layer or a wiring member to the light-receiving section is formed to protrude into one layer region on the light-receiving surface, so that the depletion layer is expanded.

With this configuration, the depletion layer spreads over the entire pixel, and the sensitivity distribution is flattened without decreasing, making it possible to improve the photosensitivity as a whole.

〔Example〕

Examples will be described below. FIG. 1 is a diagram showing a planar structure of one pixel portion of a first embodiment of a solid-state imaging device according to the present invention. In this embodiment, a part of the p diffusion layer constituting the gate region 4 is extended like an antenna on both sides to form protruding diffusion regions 4a and 4b. This p3 protrusion expansion r
The depletion layer can be expanded over the entire pixel by the Pi regions 4a and 4b.

The Ar laser spot was scanned on the pixel surface configured in this way in the same manner as shown in Figure 10 (■), and the photosensitivity distribution was measured. The results are shown in the second diagram. The trajectories ■, ■, ■ are shown in Figure 2 (Bl pixel plane structure diagram).As shown in the second diagram above, the sensitivity distribution becomes flat due to the spread of the depletion layer over the entire pixel, and the photosensitivity improves. This was confirmed.

In the embodiment shown in FIG. 1, the shape of the protruding diffusion region of the gate region is not limited to a straight line, but can have various shapes.

FIG. 3 is a diagram showing a planar structure of one pixel portion in a second embodiment of the present invention. In this embodiment, a wiring 7a made of polysilicon to a MOS gate capacitor 5 formed on a gate region 4 is disposed on an n'' epitaxial layer 2. On the pixel surface configured in this way, Figure 4 shows the results of measuring the photosensitivity distribution by scanning the Ar laser spot as shown in Figure 10 and If shown in Figure 4. As shown in this fourth diagram shown on the pixel planar structure diagram in Figure 81, in this example, the sensitivity distribution in the epitaxial layer 2 near the region where the distribution !7a is applied is flat. The potential of the wiring 7a to the gate capacitor 5 is ground (GND) during the optical signal accumulation period.
On the other hand, since the epitaxial layer 2 has a positive substrate (drain) potential, the region near the silicon surface under the wiring 7a is in a state close to a depletion or inversion state. it is conceivable that.

FIG. 5 is a diagram showing a modification of the second embodiment shown in FIG. An extension wiring section 7b is provided extending to the opposite side across the game BJ area 4. In this way, the wiring 7a and its extension wiring part 7b
By providing this, it is possible to flatten the photosensitivity distribution over the entire pixel and further improve the photosensitivity.

Furthermore, the photosensitivity can be further improved by using an extremely thin polysilicon layer as the wiring material or using ITO, SnO□, etc. as the transparent electrode so that the incident light is not absorbed.

FIG. 6^, 2) is a diagram showing the planar structure of one pixel portion of the third embodiment of the present invention, and a cross-sectional view thereof.

This embodiment can also be called a modification of the first embodiment shown in FIG. The thickness of the layer is formed to be thinner than the thickness of the p gate region 4. With this configuration, the p° protruding diffusion region 4a' is formed.

The light absorption at 4b' can be reduced, thereby further improving the photosensitivity.

Figure 7 ^, (81 is the 3rd line shown in Figure 6 8, (B)
FIG. 7 is a diagram showing a planar structure of one pixel portion of a modified example on the actual flow side, and a cross-sectional view thereof. Generally, the I-V characteristic of S[T is determined by the structure near the n source region, so in this modification, the desired I-V characteristic of the p gate tpJ region 4 near the n9 source region 3 can be obtained. The p'' region 4C forming the gate capacitor 5 is formed as thin as possible.This makes it possible to further reduce light absorption and improve photosensitivity.

In each of the above embodiments and their modifications, solid-state imaging devices using SIT have been described, but the configurations shown in FIGS. 1, 3, 5, and 6 p
The present invention can also be applied to a solid-state Iri image device having -1-n diode pixels, and similar effects can be obtained.

Furthermore, in each of the above embodiments, a solid-state imaging device that accumulates optical signals for a certain period of time has been described with a general solid-state imaging device in mind. It can also be applied to sensors, and their photosensitivity can be similarly improved.

〔Effect of the invention〕

As described above based on the embodiments, according to the present invention, the depletion layer can be expanded over the entire pixel, so that the photosensitivity distribution can be made uniform and the photosensitivity can be improved. Furthermore, if the depletion layer does not spread over the entire pixel, the generated carriers may spread through diffusion and leak into adjacent pixels, but in the present invention,
Since the depletion layer can be spread over the entire pixel, there is an advantage that there is no leakage into adjacent pixels.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a planar structure of one pixel portion of a first embodiment of a solid-state imaging device according to the present invention, and a curve diagram showing a light sensitivity distribution in the embodiment shown in FIG. Figure 2 (
Bl is a diagram showing the scanning locus on the pixel plane corresponding to each light sensitivity distribution curve shown to the second foreigner, and FIG.
A diagram showing the planar structure of one pixel portion of the example, for a fourth countryman,
The curve diagram showing the photosensitivity distribution in the example shown in FIG. is the third
The figure showing the planar structure of a modified example of the second embodiment shown in the figure, FIG. Figure 7^, (B) is
FIG. 6 is a diagram showing a planar structure of a modified example of the third embodiment shown in (old) and its cross-sectional view, FIG. 8 is a schematic cross-sectional view showing a light receiving part of a conventional image sensor, and FIG. , conventional SI
A perspective view showing an example of the configuration of one pixel portion of a solid-state imaging device using T, a curve diagram showing the light sensitivity distribution of the solid-state imaging device shown in FIG. 9, and FIG. 10(B), It is a figure which shows the scanning locus on the pixel surface corresponding to each photosensitivity distribution curve shown to the 10th nationalist. In the figure, 1 is an n4 silicon substrate, 2 is an n-epitaxial layer, 3 is an n' source region 4 is a p' gate region 4a
, 4b is a protruding diffusion region, 5 is a MOS capacitor, 6 is an ll1li region, 7 is a gate capacitor wiring, 7a is a wiring, and 7b is an extended wiring portion. 2n-epitaxial layer 5 MOS capacitor 3 ins gA region 6 min II region Fig. 3 1a 5 Fig. 2 I (A) Fig. 4 (A) 0 nm /a 5 Fig. 5 Fig. 7 (A) Old) Fig. 10 figure

Claims (1)

[Claims] In a solid-state imaging device equipped with a light-receiving section having a p-i-n structure in which an i-layer region is exposed on a part of the light-receiving surface, a part of the impurity layer within the light-receiving surface of the light-receiving section or a part of the impurity layer on the light-receiving section is A solid-state imaging device characterized in that a wiring member is formed to protrude into an i-layer region on the light-receiving surface so that a depletion layer expands.