JPS63227066A - Ballast type semiconductor light-emitting element and manufacture thereof - Google Patents

Abstract

PURPOSE:To inhibit a deterioration factor due to stress by bringing the thickness of an insulator to 3000Angstrom or less and bringing the thickness of a heat sink layer to 1-6mum. CONSTITUTION:Currents are constricted by SiO2 or SiNx as an insulating film 17 formed at a forming temperature of 350 deg.C or less and in thickness of 3000Angstrom or less, and a heat sink layer 21 shaped at a forming temperature of 200 deg.C or less and in thickness of 1-6mum is included. The title light-emitting element is manufactured in order of processes in which an insulating layer is shaped in order to reduce stress, the insulating film 17 is removed partially and a first electrode 19 is shaped, the heat sink layer 21 is formed, a second electrode 22 is shaped and a beam-extracting hole 23 is bored. Accordingly, stress resulting from structure deteriorating the light-emitting element and stress generated when the element is manufactured can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a structure for reducing stress in a ball-type semiconductor light emitting device and a manufacturing method thereof.

(Prior Art) Conventionally, in optical communication systems, short distance (<1(l)
Kw), small capacity (<100 Mb/s), and low-cost system light emitting sources are superior to semiconductor lasers (LDs) in terms of temperature stability, economy including drive circuits, and reliability. A light emitting diode (L[ED) is suitable.

The light source for optical communication systems has good characteristics and at the same time ffl
It needs to be highly reliable.

In order to extend the life of a light emitting diode, it is necessary to obtain a well-grown crystal and at the same time to minimize the occurrence of distortion, stress, etc.

It has become clear that distortion plays a role in limiting the lifespan of light emitting diodes. That is, there are distortions caused by slight lattice constant changes during heteroepitaxial growth or impurity doping, and distortions that are sometimes introduced when attaching electrodes of devices and attaching devices to heat sink materials.

By reducing these as much as possible, the light emitting diode can achieve a long life.

Strain, stress, etc. introduced into the crystal during the manufacturing process of light emitting diodes lead to the generation of dislocations, which are the source of dark lines observed in EL images, and also cause dark lines to appear during operation. promote the growth of

In double hetero (DH) junction type light emitting diode,
Rapidly degraded devices mainly have non-emissive dark line defects (hereinafter referred to as D
LD) was observed. Furthermore, it has been found that the causes of these DLDs differ depending on the direction in which they occur. In other words, <100> DLD is generated by multiplication of dislocations due to upward operation of point defects excited by a current and the light emitted by the light emitting diode element itself, and <11>
0>r) LDs are caused by stress such as strain caused by the difference in lattice constant and thermal expansion coefficient of a heterojunction, thermal strain caused by electrical conduction, etc., which cause the crystal to become flattened and dislocations to multiply. in general.

When electricity is applied while a stress of approximately 10'dyne/cJ is applied to a light emitting diode crystal, dislocations are introduced from weak parts of the crystal surface, reach the active layer, and then elongate.

Among these OLDs, for those with <100> orientation, it is possible to remove defects and suppress the occurrence of DLD by using a substrate with few dislocations and improving the integrity of the grown crystal. > directions are difficult to remove with current technology.

For example, FIGS. 4(a) and 4(d) show a typical manufacturing method for a conventional ballast type light emitting diode. FIG. 5 shows the stress distribution according to the conventional manufacturing method. First, Figure 4 (a
) <N-GaAs on the N-GaAs substrate 41
s buffer layer 42, N-GaAlAs cladding layer 43,
P-GaAs active layer 44, P-GaAlAs cladding layer 45. A P-GaAs contact layer 46 was successively grown. Next, as shown in FIG. 4(b), the back side of the substrate 41 is polished to reduce the thickness of the 300-350 μm substrate 41 to about 100 μm, and A
The N-side electrode 52 was formed by forming 5000 and 1000 pieces of uGe and Au, respectively. Next, as shown in FIG. 4(c), the N-side electrode 52 is removed by etching into a circular shape with a diameter of 150p using the photoresist as a mask. □
Using an etching solution, the substrate 41 and buffer layer 42 were etched away to a depth up to the cladding layer 43 using the N-side electrode 52 as a mask, thereby forming a light extraction window 53. Next, as shown in FIG. 4(d), the contact layer 4
After forming an insulating layer 5in2 film 47 to serve as a current confinement layer on the entire surface of the insulating layer 6 by CVD, the 5in2 film 47 is etched away in a circular shape with a diameter of 30 mm facing the light extraction window 53 using a photoresist as a mask. . Next, after forming an ohmic electrode (contact metal) 49 made of AuZn on the entire surface of the photoresist to a thickness of 2000 to 5000, the photoresist is removed and a Ps electrode 49 is formed. And on the entire surface of the SiO□ film 47, Cr (1000 people), A
After sequentially forming 5000 layers, Au51 is formed as a heat sink layer. Figures 5(a)-(b) are
They are a cross-sectional view of a ballad type light emitting diode used for stress analysis, and a stress distribution diagram in the <100> direction of the ballad type light emitting diode when a conventional manufacturing method is used. Three-dimensional stress analysis was performed using the finite difference method.

As shown in Figure 5(b), in the case of a ballad type light emitting diode formed using the conventional manufacturing method, it is not possible to reduce the stress generated from the current injection window (diameter 30 μm) of the 5in2 film and the stress generated from the light extraction window. , 10”dyne/a
A stress exceeding 1 is applied to the active layer. If current is applied in this state, dislocations will be introduced from the weak parts of the crystal surface, and the dislocations will extend to the active layer, resulting in deterioration.

(Problems to be Solved by the Invention) An object of the present invention is to provide a structure and a manufacturing method of a ball-type semiconductor light emitting device that is useful for suppressing the deterioration factors due to stress as described above.

[Structure of the invention]

(Means for Solving the Problems) The ball type semiconductor light emitting device of the present invention has a formation temperature of 350°C.
Hereinafter, S is an insulating film formed with a thickness of 3000 Å or less.
iO□ or 5iN) (current confinement was performed at a formation temperature of 20
The structure includes a heat sink layer formed at a temperature of 0° C. or less and with a thickness of 1 to 6 layers.

In addition, in order to reduce stress, in the manufacturing process, an insulating layer is formed, the insulating film is partially removed to form a first electrode, a heat sink layer is formed, a second electrode is formed,
Manufactured in the order of drilling holes for light extraction.

(Function) According to the present invention, it is possible to sufficiently reduce the stress caused by the structure that degrades the light emitting element and the stress generated during the manufacturing of the element.

(Example) The present invention will be described in detail below with reference to one drawing. FIG. 1 is a sectional view showing the structure of a ballad type light emitting diode according to an embodiment of the present invention, and FIGS. 2(a) to 2(f) are sectional views showing the manufacturing process of the light emitting diode. First, the second
As shown in Figure (a), (N-G
aAs buffer layer 12, N-GaAlAs cladding layer 1
3. MOCVD the P-GaAs active layer 14, P-GaAlAs cladding layer 15, and P-GaAs contact layer 16.
The above-mentioned types were grown and formed by the method. Here, the mixed crystal ratio, carrier concentration, thickness, etc. of each layer are as shown in Table 1 below.

Ss was used as the N-type dopant, and Zn was used as the P-type dopant.

In addition, next, as shown in the first ff(b), the controllers 591 to 591
An insulating film SiO□ film 1 serving as a current confinement layer is formed on the entire surface of the layer 16.
7 by the CVD method at a forming temperature of 300°C or less and a thickness of 30°C.
After forming the film to a thickness of 00 Å or less, the film 17 is etched away using an ammonium fluoride solution using the photoresist 18 as a mask in a circular shape with a diameter of 30 μm. In the first step, as shown in FIG. Ohmic electrode (contact metal) 1 made of AuZn on the entire surface of
9 to a thickness of 1,000 to 2,000 layers, the photoresist 18 is removed and a P-side electrode 19, which is a first electrode, is formed. Next, as shown in FIG. 2(d), the number of P-side electrodes 20 is counted out on the entire surface of the P-side electrode I9 and the Sin film 17.
After sequentially forming Cr (1000 people) and Au (5000 people).

Au21 is formed as a heat sink layer at a formation temperature of 200° C. or less and a thickness of 1 to 6 μm. After that, the back side of the substrate 11 was polished and the base Fill with a thickness of 300-350 Jun was reduced to a thickness of about 801 cm. Next, as shown in FIG. 2(e), AuGe and Au were respectively deposited on the back side of the base Fill 11. 5000 people and 1000 people were formed to form the N-side electrode 22 which is the second electrode. Next, using a photoresist as a mask, a diameter of 150. The N-side electrode 22 is etched away in a circular shape. Next, the second
As shown in FIG. 2(f), in the state shown in FIG. 2(e), Ni+4(4)1-■20. Using a system etching solution,
Using the N-side electrode 22 as a mask, the substrate 11 and the buffer layer 1 are
2 was removed by etching to a depth reaching the cladding layer 13 to form a light extraction window 23. Figure 3(a) -
(b) is a cross-sectional view of the ballad type light emitting diode used in the stress analysis, and stress distribution diagrams in the <110> direction of the ballad type light emitting diode in the case of the manufacturing method of the present invention and the case of the manufacturing method outside the scope of the present invention. It is. Three-dimensional stress analysis was performed using the finite difference method. As shown in FIG. 3(b), in the case of the present invention, the stress caused by the window of the S10□ film and the stress generated from the light extraction window can be sufficiently reduced. Note that the present invention is not limited to the above-mentioned GaAlAs-based semiconductor material.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to sufficiently reduce the stress caused by the structure that degrades one light emitting element and the stress generated during the manufacture of the element, and it is possible to obtain a highly reliable ballad type light emitting diode.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of a ballast type light emitting diode according to an embodiment of the present invention, Fig. 2 is a sectional view showing the manufacturing process of a ballast type light emitting diode according to an embodiment method of the present invention, and Fig. 3 is used for stress analysis. A cross-sectional view of a ballast type light emitting diode and a cross sectional view of a ballast type light emitting diode produced by the manufacturing method of the present invention.
110> direction stress distribution diagram, FIG. 4 is a sectional view showing the manufacturing process of a ballad type light emitting diode according to the conventional method,
FIG. 5 is a cross-sectional view of the ballad type light emitting diode used in the stress analysis and a stress distribution diagram in the <110> direction of the ballad type light emitting diode in the case of a conventional manufacturing method. 11, 4l-N-GaAs substrate 12, 42-N-GaAs buffer layer 13, 43=-N-GaAIAs cladding layer 14, 4''
1=P-GaAs active layer 15, 45-P-GaAIAs cladding layer 16, 46-
P-GaAs contact layer 17, 47...SiO□pus 18...Photoresist 19, 49...P@electrode 20, 50, which is the first electrode...P antistatic lateral extraction surface 21, 51 ... Heat sink layers 22, 52 ... N(II!I electrode 2 which is the second electrode)
3, 53...Light extraction window Figure 3 Figure 4 Figure 5

Claims (3)

[Claims] (1) In a ballast-type semiconductor light-emitting device made of a compound semiconductor and in which current confinement is performed using an insulator SiO_2 or SiN_x and a heat sink layer is provided, the thickness of the insulator is 3.
000 Å or less, and the thickness of the heat sink layer is 1 to 6 μm.
A ballad type semiconductor light emitting device characterized by the following. (2) In the manufacturing process of a ball type semiconductor light emitting device, there are a step of forming an insulator, a step of partially removing the insulator to form a first electrode, a step of forming a heat sink layer, and a step of forming a second electrode. 1. A method for manufacturing a semiconductor light-emitting element of a rosette type, characterized in that the manufacturing process is performed in the following order: 1. (3) The method for manufacturing a ball type semiconductor light emitting device according to claim 2, wherein the current confining insulator is formed at a temperature of 350° C. or lower and a thickness of 3,000 Å or lower. (4) The heat sink layer is formed at a temperature of 20°C.
3. The method of manufacturing a ball type semiconductor light emitting device according to claim 2, wherein the temperature is 0° C. or lower and the thickness is 1 to 6 μm.